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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h9
2 files changed, 0 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 96201e46aea..48755fcc7a4 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -69,7 +69,6 @@ brw_blorp_surface_info_init(struct brw_context *brw,
intel_miptree_get_image_offset(mt, level, layer,
&info->x_offset, &info->y_offset);
- info->array_layout = mt->array_layout;
info->swizzle = SWIZZLE_XYZW;
if (format == MESA_FORMAT_NONE)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index d60b9887368..7aa67be12a3 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -119,15 +119,6 @@ struct brw_blorp_surface_info
uint32_t y_offset;
/**
- * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
- * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
- *
- * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
- * prior to Gen7.
- */
- enum miptree_array_layout array_layout;
-
- /**
* Format that should be used when setting up the surface state for this
* surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
*/