4 files changed, 18 insertions, 12 deletions
diff --git a/src/mesa/state_tracker/st_atifs_to_tgsi.c b/src/mesa/state_tracker/st_atifs_to_tgsi.c
index 3aa7f8402f4..b28c55ceff9 100644
--- a/src/mesa/state_tracker/st_atifs_to_tgsi.c
+++ b/src/mesa/state_tracker/st_atifs_to_tgsi.c
@@ -66,7 +66,7 @@ static const struct instruction_desc inst_desc[] = {
    {TGSI_OPCODE_NOP, "UND", 0}, /* unused */
    {TGSI_OPCODE_ADD, "ADD", 2},
    {TGSI_OPCODE_MUL, "MUL", 2},
-   {TGSI_OPCODE_SUB, "SUB", 2},
+   {TGSI_OPCODE_NOP, "SUB", 2},
    {TGSI_OPCODE_DP3, "DOT3", 2},
    {TGSI_OPCODE_DP4, "DOT4", 2},
    {TGSI_OPCODE_MAD, "MAD", 3},
@@ -175,16 +175,16 @@ prepare_argument(struct st_translate *t, const unsigned argId,
    if (srcReg->argMod & GL_COMP_BIT_ATI) {
       struct ureg_src modsrc[2];
       modsrc[0] = ureg_imm1f(t->ureg, 1.0f);
-      modsrc[1] = ureg_src(arg);
+      modsrc[1] = ureg_negate(ureg_src(arg));
 
-      ureg_insn(t->ureg, TGSI_OPCODE_SUB, &arg, 1, modsrc, 2);
+      ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2);
    }
    if (srcReg->argMod & GL_BIAS_BIT_ATI) {
       struct ureg_src modsrc[2];
       modsrc[0] = ureg_src(arg);
-      modsrc[1] = ureg_imm1f(t->ureg, 0.5f);
+      modsrc[1] = ureg_imm1f(t->ureg, -0.5f);
 
-      ureg_insn(t->ureg, TGSI_OPCODE_SUB, &arg, 1, modsrc, 2);
+      ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2);
    }
    if (srcReg->argMod & GL_2X_BIT_ATI) {
       struct ureg_src modsrc[2];
@@ -211,11 +211,13 @@ emit_special_inst(struct st_translate *t, const struct instruction_desc *desc,
    struct ureg_dst tmp[1];
    struct ureg_src src[3];
 
-   if (!strcmp(desc->name, "CND")) {
+   if (!strcmp(desc->name, "SUB")) {
+      ureg_ADD(t->ureg, *dst, args[0], ureg_negate(args[1]));
+   } else if (!strcmp(desc->name, "CND")) {
       tmp[0] = get_temp(t, MAX_NUM_FRAGMENT_REGISTERS_ATI + 2); /* re-purpose a3 */
       src[0] = ureg_imm1f(t->ureg, 0.5f);
-      src[1] = args[2];
-      ureg_insn(t->ureg, TGSI_OPCODE_SUB, tmp, 1, src, 2);
+      src[1] = ureg_negate(args[2]);
+      ureg_insn(t->ureg, TGSI_OPCODE_ADD, tmp, 1, src, 2);
       src[0] = ureg_src(tmp[0]);
       src[1] = args[0];
       src[2] = args[1];
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 3daf60a31e6..df7a1bc0cfe 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -1702,7 +1702,8 @@ glsl_to_tgsi_visitor::visit_expression(ir_expression* ir, st_src_reg *op)
       emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
       break;
    case ir_binop_sub:
-      emit_asm(ir, TGSI_OPCODE_SUB, result_dst, op[0], op[1]);
+      op[1].negate = ~op[1].negate;
+      emit_asm(ir, TGSI_OPCODE_ADD, result_dst, op[0], op[1]);
       break;
 
    case ir_binop_mul:
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index 1768356413c..f906fedae18 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -481,8 +481,6 @@ translate_opcode( unsigned op )
       return TGSI_OPCODE_SIN;
    case OPCODE_SLT:
       return TGSI_OPCODE_SLT;
-   case OPCODE_SUB:
-      return TGSI_OPCODE_SUB;
    case OPCODE_TEX:
       return TGSI_OPCODE_TEX;
    case OPCODE_TXB:
@@ -566,6 +564,10 @@ compile_instruction(
       ureg_MOV(ureg, dst[0], ureg_abs(src[0]));
       break;
 
+   case OPCODE_SUB:
+      ureg_ADD(ureg, dst[0], src[0], ureg_negate(src[1]));
+      break;
+
    default:
       ureg_insn( ureg, 
                  translate_opcode( inst->Opcode ), 
diff --git a/src/mesa/state_tracker/st_tgsi_lower_yuv.c b/src/mesa/state_tracker/st_tgsi_lower_yuv.c
index e346b970855..6acd173adc9 100644
--- a/src/mesa/state_tracker/st_tgsi_lower_yuv.c
+++ b/src/mesa/state_tracker/st_tgsi_lower_yuv.c
@@ -258,13 +258,14 @@ yuv_to_rgb(struct tgsi_transform_context *tctx,
 
    /* SUB tmpA.xyz, tmpA, imm[3] */
    inst = tgsi_default_full_instruction();
-   inst.Instruction.Opcode = TGSI_OPCODE_SUB;
+   inst.Instruction.Opcode = TGSI_OPCODE_ADD;
    inst.Instruction.Saturate = 0;
    inst.Instruction.NumDstRegs = 1;
    inst.Instruction.NumSrcRegs = 2;
    reg_dst(&inst.Dst[0], &ctx->tmp[A].dst, TGSI_WRITEMASK_XYZ);
    reg_src(&inst.Src[0], &ctx->tmp[A].src, SWIZ(X, Y, Z, _));
    reg_src(&inst.Src[1], &ctx->imm[3], SWIZ(X, Y, Z, _));
+   inst.Src[1].Register.Negate = 1;
    tctx->emit_instruction(tctx, &inst);
 
    /* DP3 dst.x, tmpA, imm[0] */