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-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h16
-rw-r--r--src/mesa/drivers/dri/i965/gen8_ps_state.c8
2 files changed, 22 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index e6f2a2e0f2c..3c128aee809 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2266,6 +2266,21 @@ enum brw_pixel_shader_computed_depth_mode {
BRW_PSCDEPTH_ON_LE = 3, /* PS guarantees output depth <= source depth */
};
+enum brw_pixel_shader_coverage_mask_mode {
+ BRW_PSICMS_OFF = 0, /* PS does not use input coverage masks. */
+ BRW_PSICMS_NORMAL = 1, /* Input Coverage masks based on outer conservatism
+ * and factors in SAMPLE_MASK. If Pixel is
+ * conservatively covered, all samples are enabled.
+ */
+
+ BRW_PSICMS_INNER = 2, /* Input Coverage masks based on inner conservatism
+ * and factors in SAMPLE_MASK. If Pixel is
+ * conservatively *FULLY* covered, all samples are
+ * enabled.
+ */
+ BRW_PCICMS_DEPTH = 3,
+};
+
#define _3DSTATE_PS_EXTRA 0x784F /* GEN8+ */
/* DW1 */
# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31)
@@ -2283,6 +2298,7 @@ enum brw_pixel_shader_computed_depth_mode {
# define GEN9_PSX_SHADER_PULLS_BARY (1 << 3)
# define GEN8_PSX_SHADER_HAS_UAV (1 << 2)
# define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1)
+# define GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT 0
enum brw_wm_barycentric_interp_mode {
BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC = 0,
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index ae18f0f162c..a686fed704f 100644
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -52,8 +52,12 @@ gen8_upload_ps_extra(struct brw_context *brw,
_mesa_get_min_invocations_per_fragment(ctx, fp, false) > 1)
dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;
- if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN)
- dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK;
+ if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) {
+ if (brw->gen >= 9)
+ dw1 |= BRW_PSICMS_INNER << GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT;
+ else
+ dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK;
+ }
if (prog_data->uses_omask)
dw1 |= GEN8_PSX_OMASK_TO_RENDER_TARGET;