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-rw-r--r--src/mesa/drivers/dri/i965/gen7_urb.c3
-rw-r--r--src/mesa/drivers/dri/i965/gen7_vs_state.c3
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c2
3 files changed, 5 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 52736992616..2653e9cbeef 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -263,7 +263,8 @@ gen7_upload_urb(struct brw_context *brw)
brw->urb.vs_start = push_constant_chunks;
brw->urb.gs_start = push_constant_chunks + vs_chunks;
- gen7_emit_vs_workaround_flush(brw);
+ if (brw->gen == 7 && !brw->is_haswell)
+ gen7_emit_vs_workaround_flush(brw);
gen7_emit_urb_state(brw,
brw->urb.nr_vs_entries, vs_size, brw->urb.vs_start,
brw->urb.nr_gs_entries, gs_size, brw->urb.gs_start);
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 8381e1fa389..c4f1d264bff 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -72,7 +72,8 @@ upload_vs_state(struct brw_context *brw)
const int max_threads_shift = brw->is_haswell ?
HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT;
- gen7_emit_vs_workaround_flush(brw);
+ if (!brw->is_haswell)
+ gen7_emit_vs_workaround_flush(brw);
/* BRW_NEW_VS_BINDING_TABLE */
BEGIN_BATCH(2);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index a06f298bafd..98759e27e2d 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -583,7 +583,7 @@ intel_emit_depth_stall_flushes(struct brw_context *brw)
void
gen7_emit_vs_workaround_flush(struct brw_context *brw)
{
- assert(brw->gen >= 7 && brw->gen <= 8);
+ assert(brw->gen == 7);
brw_emit_pipe_control_write(brw,
PIPE_CONTROL_WRITE_IMMEDIATE
| PIPE_CONTROL_DEPTH_STALL,