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-rw-r--r--src/mesa/pipe/cell/spu/spu_main.c20
-rw-r--r--src/mesa/pipe/cell/spu/spu_tile.c10
-rw-r--r--src/mesa/pipe/cell/spu/spu_tile.h12
-rw-r--r--src/mesa/pipe/cell/spu/spu_tri.c10
4 files changed, 27 insertions, 25 deletions
diff --git a/src/mesa/pipe/cell/spu/spu_main.c b/src/mesa/pipe/cell/spu/spu_main.c
index 8e9352deff0..2b32c26854c 100644
--- a/src/mesa/pipe/cell/spu/spu_main.c
+++ b/src/mesa/pipe/cell/spu/spu_main.c
@@ -81,13 +81,13 @@ really_clear_tiles(uint surfaceIndex)
uint i;
if (surfaceIndex == 0) {
- clear_c_tile(ctile);
+ clear_c_tile(&ctile);
for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) {
uint tx = i % spu.fb.width_tiles;
uint ty = i / spu.fb.width_tiles;
if (tile_status[ty][tx] == TILE_STATUS_CLEAR) {
- put_tile(tx, ty, (uint *) ctile, TAG_SURFACE_CLEAR, 0);
+ put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 0);
}
}
}
@@ -98,7 +98,7 @@ really_clear_tiles(uint surfaceIndex)
uint tx = i % spu.fb.width_tiles;
uint ty = i / spu.fb.width_tiles;
if (tile_status_z[ty][tx] == TILE_STATUS_CLEAR)
- put_tile(tx, ty, (uint *) ctile, TAG_SURFACE_CLEAR, 1);
+ put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 1);
}
}
@@ -134,7 +134,7 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear)
if (clear->surface == 0) {
spu.fb.color_clear_value = clear->value;
- clear_c_tile(ctile);
+ clear_c_tile(&ctile);
}
else {
spu.fb.depth_clear_value = clear->value;
@@ -150,9 +150,9 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear)
uint tx = i % spu.fb.width_tiles;
uint ty = i / spu.fb.width_tiles;
if (clear->surface == 0)
- put_tile(tx, ty, (uint *) ctile, TAG_SURFACE_CLEAR, 0);
+ put_tile(tx, ty, &ctile, TAG_SURFACE_CLEAR, 0);
else
- put_tile(tx, ty, (uint *) ztile.t32, TAG_SURFACE_CLEAR, 1);
+ put_tile(tx, ty, &ztile, TAG_SURFACE_CLEAR, 1);
/* XXX we don't want this here, but it fixes bad tile results */
}
@@ -293,12 +293,12 @@ cmd_render(const struct cell_command_render *render)
*/
if (spu.depth_stencil.depth.enabled) {
if (tile_status_z[ty][tx] != TILE_STATUS_CLEAR) {
- get_tile(tx, ty, (uint *) ztile.t32, TAG_READ_TILE_Z, 1);
+ get_tile(tx, ty, &ztile, TAG_READ_TILE_Z, 1);
}
}
if (tile_status[ty][tx] != TILE_STATUS_CLEAR) {
- get_tile(tx, ty, (uint *) ctile, TAG_READ_TILE_COLOR, 0);
+ get_tile(tx, ty, &ctile, TAG_READ_TILE_COLOR, 0);
}
ASSERT(render->prim_type == PIPE_PRIM_TRIANGLES);
@@ -316,12 +316,12 @@ cmd_render(const struct cell_command_render *render)
/* write color/z tiles back to main framebuffer, if dirtied */
if (tile_status[ty][tx] == TILE_STATUS_DIRTY) {
- put_tile(tx, ty, (uint *) ctile, TAG_WRITE_TILE_COLOR, 0);
+ put_tile(tx, ty, &ctile, TAG_WRITE_TILE_COLOR, 0);
tile_status[ty][tx] = TILE_STATUS_DEFINED;
}
if (spu.depth_stencil.depth.enabled) {
if (tile_status_z[ty][tx] == TILE_STATUS_DIRTY) {
- put_tile(tx, ty, (uint *) ztile.t32, TAG_WRITE_TILE_Z, 1);
+ put_tile(tx, ty, &ztile, TAG_WRITE_TILE_Z, 1);
tile_status_z[ty][tx] = TILE_STATUS_DEFINED;
}
}
diff --git a/src/mesa/pipe/cell/spu/spu_tile.c b/src/mesa/pipe/cell/spu/spu_tile.c
index 9895360f5f6..ca1352f9f8d 100644
--- a/src/mesa/pipe/cell/spu/spu_tile.c
+++ b/src/mesa/pipe/cell/spu/spu_tile.c
@@ -31,7 +31,7 @@
-uint ctile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB;
+tile_t ctile ALIGN16_ATTRIB;
tile_t ztile ALIGN16_ATTRIB;
ubyte tile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
@@ -40,7 +40,7 @@ ubyte tile_status_z[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
void
-get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf)
+get_tile(uint tx, uint ty, tile_t *tile, int tag, int zBuf)
{
const uint offset = ty * spu.fb.width_tiles + tx;
const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? spu.fb.zsize : 4);
@@ -55,7 +55,7 @@ get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf)
printf("get_tile: dest: %p src: 0x%x size: %d\n",
tile, (unsigned int) src, bytesPerTile);
*/
- mfc_get(tile, /* dest in local memory */
+ mfc_get(tile->t32, /* dest in local memory */
(unsigned int) src, /* src in main memory */
bytesPerTile,
tag,
@@ -65,7 +65,7 @@ get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf)
void
-put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf)
+put_tile(uint tx, uint ty, const tile_t *tile, int tag, int zBuf)
{
const uint offset = ty * spu.fb.width_tiles + tx;
const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? spu.fb.zsize : 4);
@@ -81,7 +81,7 @@ put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf)
spu.init.id,
tile, (unsigned int) dst, bytesPerTile);
*/
- mfc_put((void *) tile, /* src in local memory */
+ mfc_put((void *) tile->t32, /* src in local memory */
(unsigned int) dst, /* dst in main memory */
bytesPerTile,
tag,
diff --git a/src/mesa/pipe/cell/spu/spu_tile.h b/src/mesa/pipe/cell/spu/spu_tile.h
index 4c8db581f3f..f83dc009c2c 100644
--- a/src/mesa/pipe/cell/spu/spu_tile.h
+++ b/src/mesa/pipe/cell/spu/spu_tile.h
@@ -45,7 +45,7 @@ typedef union {
} tile_t;
-extern uint ctile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB;
+extern tile_t ctile ALIGN16_ATTRIB;
extern tile_t ztile ALIGN16_ATTRIB;
@@ -58,17 +58,19 @@ extern ubyte tile_status_z[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_AT
void
-get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf);
+get_tile(uint tx, uint ty, tile_t *tile, int tag, int zBuf);
void
-put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf);
+put_tile(uint tx, uint ty, const tile_t *tile, int tag, int zBuf);
static INLINE void
-clear_c_tile(uint tile[TILE_SIZE][TILE_SIZE])
+clear_c_tile(tile_t *ctile)
{
- memset32((uint*) tile, spu.fb.color_clear_value, TILE_SIZE * TILE_SIZE);
+ memset32((uint*) ctile->t32,
+ spu.fb.color_clear_value,
+ TILE_SIZE * TILE_SIZE);
}
diff --git a/src/mesa/pipe/cell/spu/spu_tri.c b/src/mesa/pipe/cell/spu/spu_tri.c
index 6de07614fbc..1d73c5171ce 100644
--- a/src/mesa/pipe/cell/spu/spu_tri.c
+++ b/src/mesa/pipe/cell/spu/spu_tri.c
@@ -373,7 +373,7 @@ emit_quad( struct setup_stage *setup, int x, int y, unsigned mask )
if (mask) {
if (tile_status[setup->ty][setup->tx] == TILE_STATUS_CLEAR) {
/* now, _really_ clear the tile */
- clear_c_tile(ctile);
+ clear_c_tile(&ctile);
}
else {
/* make sure we've got the tile from main mem */
@@ -382,13 +382,13 @@ emit_quad( struct setup_stage *setup, int x, int y, unsigned mask )
tile_status[setup->ty][setup->tx] = TILE_STATUS_DIRTY;
if (mask & MASK_TOP_LEFT)
- ctile[iy][ix] = pack_color(colors[QUAD_TOP_LEFT]);
+ ctile.t32[iy][ix] = pack_color(colors[QUAD_TOP_LEFT]);
if (mask & MASK_TOP_RIGHT)
- ctile[iy][ix+1] = pack_color(colors[QUAD_TOP_RIGHT]);
+ ctile.t32[iy][ix+1] = pack_color(colors[QUAD_TOP_RIGHT]);
if (mask & MASK_BOTTOM_LEFT)
- ctile[iy+1][ix] = pack_color(colors[QUAD_BOTTOM_LEFT]);
+ ctile.t32[iy+1][ix] = pack_color(colors[QUAD_BOTTOM_LEFT]);
if (mask & MASK_BOTTOM_RIGHT)
- ctile[iy+1][ix+1] = pack_color(colors[QUAD_BOTTOM_RIGHT]);
+ ctile.t32[iy+1][ix+1] = pack_color(colors[QUAD_BOTTOM_RIGHT]);
}
#endif
}