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-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_util.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_reg.h38
2 files changed, 11 insertions, 32 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index 40ad14402a7..73ba85e2a61 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -224,7 +224,10 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c,
vec1(t_nopersp),
brw_imm_f(0));
brw_IF(p, BRW_EXECUTE_1);
- brw_MOV(p, t_nopersp, brw_imm_vf4(1, 0, 0, 0));
+ brw_MOV(p, t_nopersp, brw_imm_vf4(brw_float_to_vf(1.0),
+ brw_float_to_vf(0.0),
+ brw_float_to_vf(0.0),
+ brw_float_to_vf(0.0)));
brw_ENDIF(p);
/* Now compute t_nopersp = t_nopersp.y/t_nopersp.x and broadcast it. */
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h b/src/mesa/drivers/dri/i965/brw_reg.h
index 3da83b43b5d..e34e7ea0a52 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -43,7 +43,6 @@
#define BRW_REG_H
#include <stdbool.h>
-#include "main/imports.h"
#include "main/compiler.h"
#include "main/macros.h"
#include "program/prog_instruction.h"
@@ -638,38 +637,15 @@ brw_imm_vf(unsigned v)
return imm;
}
-/**
- * Convert an integer into a "restricted" 8-bit float, used in vector
- * immediates. The 8-bit floating point format has a sign bit, an
- * excess-3 3-bit exponent, and a 4-bit mantissa. All integer values
- * from -31 to 31 can be represented exactly.
- */
-static inline uint8_t
-int_to_float8(int x)
-{
- if (x == 0) {
- return 0;
- } else if (x < 0) {
- return 1 << 7 | int_to_float8(-x);
- } else {
- const unsigned exponent = _mesa_logbase2(x);
- const unsigned mantissa = (x - (1 << exponent)) << (4 - exponent);
- assert(exponent <= 4);
- return (exponent + 3) << 4 | mantissa;
- }
-}
-
-/**
- * Construct a floating-point packed vector immediate from its integer
- * values. \sa int_to_float8()
- */
static inline struct brw_reg
-brw_imm_vf4(int v0, int v1, int v2, int v3)
+brw_imm_vf4(unsigned v0, unsigned v1, unsigned v2, unsigned v3)
{
- return brw_imm_vf((int_to_float8(v0) << 0) |
- (int_to_float8(v1) << 8) |
- (int_to_float8(v2) << 16) |
- (int_to_float8(v3) << 24));
+ struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF);
+ imm.vstride = BRW_VERTICAL_STRIDE_0;
+ imm.width = BRW_WIDTH_4;
+ imm.hstride = BRW_HORIZONTAL_STRIDE_1;
+ imm.ud = ((v0 << 0) | (v1 << 8) | (v2 << 16) | (v3 << 24));
+ return imm;
}