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-rw-r--r--src/mesa/drivers/dri/i965/brw_performance_query.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_queryobj.c4
-rw-r--r--src/mesa/drivers/dri/i965/gen6_queryobj.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_sol.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c5
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.h2
-rw-r--r--src/mesa/drivers/dri/i965/intel_buffer_objects.c6
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_pixel_read.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_tex_image.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_tex_subimage.c2
11 files changed, 21 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_performance_query.c b/src/mesa/drivers/dri/i965/brw_performance_query.c
index dfea2f4bd57..c9ba4fe9256 100644
--- a/src/mesa/drivers/dri/i965/brw_performance_query.c
+++ b/src/mesa/drivers/dri/i965/brw_performance_query.c
@@ -1132,7 +1132,7 @@ brw_wait_perf_query(struct gl_context *ctx, struct gl_perf_query_object *o)
/* If the current batch references our results bo then we need to
* flush first...
*/
- if (drm_bacon_bo_references(brw->batch.bo, bo))
+ if (brw_batch_references(&brw->batch, bo))
intel_batchbuffer_flush(brw);
if (unlikely(brw->perf_debug)) {
@@ -1157,12 +1157,12 @@ brw_is_perf_query_ready(struct gl_context *ctx,
case OA_COUNTERS:
return (obj->oa.results_accumulated ||
(obj->oa.bo &&
- !drm_bacon_bo_references(brw->batch.bo, obj->oa.bo) &&
+ !brw_batch_references(&brw->batch, obj->oa.bo) &&
!drm_bacon_bo_busy(obj->oa.bo)));
case PIPELINE_STATS:
return (obj->pipeline_stats.bo &&
- !drm_bacon_bo_references(brw->batch.bo, obj->pipeline_stats.bo) &&
+ !brw_batch_references(&brw->batch, obj->pipeline_stats.bo) &&
!drm_bacon_bo_busy(obj->pipeline_stats.bo));
}
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 04dfc5d5767..8e742af67df 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -137,7 +137,7 @@ brw_queryobj_get_results(struct gl_context *ctx,
* still contributing to it, flush it now so the results will be present
* when mapped.
*/
- if (drm_bacon_bo_references(brw->batch.bo, query->bo))
+ if (brw_batch_references(&brw->batch, query->bo))
intel_batchbuffer_flush(brw);
if (unlikely(brw->perf_debug)) {
@@ -402,7 +402,7 @@ static void brw_check_query(struct gl_context *ctx, struct gl_query_object *q)
* not ready yet on the first time it is queried. This ensures that
* the async query will return true in finite time.
*/
- if (query->bo && drm_bacon_bo_references(brw->batch.bo, query->bo))
+ if (query->bo && brw_batch_references(&brw->batch, query->bo))
intel_batchbuffer_flush(brw);
if (query->bo == NULL || !drm_bacon_bo_busy(query->bo)) {
diff --git a/src/mesa/drivers/dri/i965/gen6_queryobj.c b/src/mesa/drivers/dri/i965/gen6_queryobj.c
index b439b2d2019..b61967bb57f 100644
--- a/src/mesa/drivers/dri/i965/gen6_queryobj.c
+++ b/src/mesa/drivers/dri/i965/gen6_queryobj.c
@@ -467,7 +467,7 @@ flush_batch_if_needed(struct brw_context *brw, struct brw_query_object *query)
* (for example, due to being full). Record that it's been flushed.
*/
query->flushed = query->flushed ||
- !drm_bacon_bo_references(brw->batch.bo, query->bo);
+ !brw_batch_references(&brw->batch, query->bo);
if (!query->flushed)
intel_batchbuffer_flush(brw);
diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c
index 4c73119c953..f7b53b20501 100644
--- a/src/mesa/drivers/dri/i965/gen6_sol.c
+++ b/src/mesa/drivers/dri/i965/gen6_sol.c
@@ -241,7 +241,7 @@ tally_prims_generated(struct brw_context *brw,
/* If the current batch is still contributing to the number of primitives
* generated, flush it now so the results will be present when mapped.
*/
- if (drm_bacon_bo_references(brw->batch.bo, obj->prim_count_bo))
+ if (brw_batch_references(&brw->batch, obj->prim_count_bo))
intel_batchbuffer_flush(brw);
if (unlikely(brw->perf_debug && drm_bacon_bo_busy(obj->prim_count_bo)))
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index ff154cce1c5..ab2ae961b9c 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -576,6 +576,11 @@ _intel_batchbuffer_flush_fence(struct brw_context *brw,
return ret;
}
+bool
+brw_batch_references(struct intel_batchbuffer *batch, drm_bacon_bo *bo)
+{
+ return drm_bacon_bo_references(batch->bo, bo);
+}
/* This is the only way buffers get added to the validate list.
*/
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 332334f130c..e67b18200f4 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -65,6 +65,8 @@ void intel_batchbuffer_data(struct brw_context *brw,
const void *data, GLuint bytes,
enum brw_gpu_ring ring);
+bool brw_batch_references(struct intel_batchbuffer *batch, drm_bacon_bo *bo);
+
uint64_t brw_emit_reloc(struct intel_batchbuffer *batch, uint32_t batch_offset,
drm_bacon_bo *target, uint32_t target_offset,
uint32_t read_domains, uint32_t write_domain);
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 9ce13c2ee62..54a58df11d8 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -271,7 +271,7 @@ brw_buffer_subdata(struct gl_context *ctx,
busy =
drm_bacon_bo_busy(intel_obj->buffer) ||
- drm_bacon_bo_references(brw->batch.bo, intel_obj->buffer);
+ brw_batch_references(&brw->batch, intel_obj->buffer);
if (busy) {
if (size == intel_obj->Base.Size) {
@@ -330,7 +330,7 @@ brw_get_buffer_subdata(struct gl_context *ctx,
struct brw_context *brw = brw_context(ctx);
assert(intel_obj);
- if (drm_bacon_bo_references(brw->batch.bo, intel_obj->buffer)) {
+ if (brw_batch_references(&brw->batch, intel_obj->buffer)) {
intel_batchbuffer_flush(brw);
}
drm_bacon_bo_get_subdata(intel_obj->buffer, offset, size, data);
@@ -389,7 +389,7 @@ brw_map_buffer_range(struct gl_context *ctx,
* achieve the required synchronization.
*/
if (!(access & GL_MAP_UNSYNCHRONIZED_BIT)) {
- if (drm_bacon_bo_references(brw->batch.bo, intel_obj->buffer)) {
+ if (brw_batch_references(&brw->batch, intel_obj->buffer)) {
if (access & GL_MAP_INVALIDATE_BUFFER_BIT) {
drm_bacon_bo_unreference(intel_obj->buffer);
alloc_buffer_object(brw, intel_obj);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 59af60c39c3..6aaf4d20b7a 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2457,7 +2457,7 @@ intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
drm_bacon_bo *bo = mt->bo;
- if (drm_bacon_bo_references(brw->batch.bo, bo))
+ if (brw_batch_references(&brw->batch, bo))
intel_batchbuffer_flush(brw);
/* brw_bo_map() uses a WB mmaping of the buffer's backing storage. It
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 0d26d768560..e81a17ffafa 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -142,7 +142,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
bo = irb->mt->bo;
- if (drm_bacon_bo_references(brw->batch.bo, bo)) {
+ if (brw_batch_references(&brw->batch, bo)) {
perf_debug("Flushing before mapping a referenced bo.\n");
intel_batchbuffer_flush(brw);
}
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 9c35dfbe641..e9b334deec0 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -527,7 +527,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
bo = image->mt->bo;
- if (drm_bacon_bo_references(brw->batch.bo, bo)) {
+ if (brw_batch_references(&brw->batch, bo)) {
perf_debug("Flushing before mapping a referenced bo.\n");
intel_batchbuffer_flush(brw);
}
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index f5899f11473..2a2298a8dee 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -143,7 +143,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
bo = image->mt->bo;
- if (drm_bacon_bo_references(brw->batch.bo, bo)) {
+ if (brw_batch_references(&brw->batch, bo)) {
perf_debug("Flushing before mapping a referenced bo.\n");
intel_batchbuffer_flush(brw);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-19 04:51:40 +0000