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-rw-r--r--src/mesa/drivers/dri/i915/i830_context.h8
-rw-r--r--src/mesa/drivers/dri/i915/i830_vtbl.c32
-rw-r--r--src/mesa/drivers/dri/i915/i915_context.h8
-rw-r--r--src/mesa/drivers/dri/i915/i915_vtbl.c30
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_line.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_clip_tri.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h22
-rw-r--r--src/mesa/drivers/dri/i965/brw_curbe.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h7
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c55
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c20
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c24
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c88
-rw-r--r--src/mesa/drivers/dri/i965/brw_queryobj.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h19
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_batch.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c52
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_urb.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c11
-rw-r--r--src/mesa/drivers/dri/i965/brw_vtbl.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c739
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.c30
-rw-r--r--src/mesa/drivers/dri/intel/intel_batchbuffer.h12
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c65
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c173
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.h7
-rw-r--r--src/mesa/drivers/dri/intel/intel_chipset.h6
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c35
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h18
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_bitmap.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_draw.c53
-rw-r--r--src/mesa/drivers/dri/intel/intel_reg.h5
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c43
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c141
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c2
-rw-r--r--src/mesa/drivers/glslcompiler/glslcompiler.c8
-rw-r--r--src/mesa/main/debug.c54
-rw-r--r--src/mesa/main/ffvertex_prog.c5
-rw-r--r--src/mesa/main/mtypes.h4
-rw-r--r--src/mesa/main/points.c2
-rw-r--r--src/mesa/main/shaders.c21
-rw-r--r--src/mesa/main/texenvprogram.c12
-rw-r--r--src/mesa/main/teximage.c126
-rw-r--r--src/mesa/main/teximage.h3
-rw-r--r--src/mesa/main/texstore.c20
-rw-r--r--src/mesa/shader/prog_execute.c307
-rw-r--r--src/mesa/shader/prog_instruction.c10
-rw-r--r--src/mesa/shader/prog_instruction.h13
-rw-r--r--src/mesa/shader/prog_uniform.c1
-rw-r--r--src/mesa/shader/prog_uniform.h1
-rw-r--r--src/mesa/shader/shader_api.c41
-rw-r--r--src/mesa/shader/shader_api.h4
-rw-r--r--src/mesa/shader/slang/library/slang_120_core_gc.h1374
-rw-r--r--src/mesa/shader/slang/library/slang_builtin_120_common_gc.h193
-rw-r--r--src/mesa/shader/slang/library/slang_common_builtin_gc.h1304
-rw-r--r--src/mesa/shader/slang/library/slang_core_gc.h1609
-rw-r--r--src/mesa/shader/slang/library/slang_fragment_builtin_gc.h174
-rw-r--r--src/mesa/shader/slang/library/slang_shader.syn16
-rw-r--r--src/mesa/shader/slang/library/slang_shader_syn.h8
-rw-r--r--src/mesa/shader/slang/library/slang_vertex_builtin_gc.h135
-rw-r--r--src/mesa/shader/slang/slang_codegen.c37
-rw-r--r--src/mesa/shader/slang/slang_compile.c22
-rw-r--r--src/mesa/shader/slang/slang_compile_operation.c17
-rw-r--r--src/mesa/shader/slang/slang_emit.c125
-rw-r--r--src/mesa/shader/slang/slang_ir.c10
-rw-r--r--src/mesa/shader/slang/slang_ir.h3
-rw-r--r--src/mesa/shader/slang/slang_link.c45
-rw-r--r--src/mesa/shader/slang/slang_log.c9
-rw-r--r--src/mesa/shader/slang/slang_print.c18
-rw-r--r--src/mesa/shader/slang/slang_vartable.c15
-rw-r--r--src/mesa/state_tracker/st_atom_framebuffer.c10
-rw-r--r--src/mesa/state_tracker/st_cb_bitmap.c2
-rw-r--r--src/mesa/state_tracker/st_cb_clear.c28
-rw-r--r--src/mesa/state_tracker/st_draw.c30
-rw-r--r--src/mesa/state_tracker/st_framebuffer.c7
-rw-r--r--src/mesa/state_tracker/st_mesa_to_tgsi.c19
-rw-r--r--src/mesa/state_tracker/st_program.c16
-rw-r--r--src/mesa/state_tracker/st_program.h4
83 files changed, 4519 insertions, 3106 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h
index a298c1407de..1bdb32049d7 100644
--- a/src/mesa/drivers/dri/i915/i830_context.h
+++ b/src/mesa/drivers/dri/i915/i830_context.h
@@ -57,7 +57,13 @@
#define I830_DESTREG_SR0 7
#define I830_DESTREG_SR1 8
#define I830_DESTREG_SR2 9
-#define I830_DEST_SETUP_SIZE 10
+#define I830_DESTREG_DRAWRECT0 10
+#define I830_DESTREG_DRAWRECT1 11
+#define I830_DESTREG_DRAWRECT2 12
+#define I830_DESTREG_DRAWRECT3 13
+#define I830_DESTREG_DRAWRECT4 14
+#define I830_DESTREG_DRAWRECT5 15
+#define I830_DEST_SETUP_SIZE 16
#define I830_CTXREG_STATE1 0
#define I830_CTXREG_STATE2 1
diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c
index 773a8b4dd01..3b3ff2bceda 100644
--- a/src/mesa/drivers/dri/i915/i830_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i830_vtbl.c
@@ -449,7 +449,8 @@ i830_emit_state(struct intel_context *intel)
aper_array[aper_count++] = intel->batch->buf;
if (dirty & I830_UPLOAD_BUFFERS) {
aper_array[aper_count++] = state->draw_region->buffer;
- aper_array[aper_count++] = state->depth_region->buffer;
+ if (state->depth_region)
+ aper_array[aper_count++] = state->depth_region->buffer;
}
for (i = 0; i < I830_TEX_UNITS; i++)
@@ -512,6 +513,16 @@ i830_emit_state(struct intel_context *intel)
OUT_BATCH(state->Buffer[I830_DESTREG_SR0]);
OUT_BATCH(state->Buffer[I830_DESTREG_SR1]);
OUT_BATCH(state->Buffer[I830_DESTREG_SR2]);
+
+ if (intel->constant_cliprect) {
+ assert(state->Buffer[I830_DESTREG_DRAWRECT0] != MI_NOOP);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT0]);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT1]);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT2]);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT3]);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT4]);
+ OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT5]);
+ }
ADVANCE_BATCH();
}
@@ -591,6 +602,7 @@ i830_state_draw_region(struct intel_context *intel,
struct intel_region *depth_region)
{
struct i830_context *i830 = i830_context(&intel->ctx);
+ GLcontext *ctx = &intel->ctx;
GLuint value;
ASSERT(state == &i830->state || state == &i830->meta);
@@ -643,6 +655,24 @@ i830_state_draw_region(struct intel_context *intel,
}
state->Buffer[I830_DESTREG_DV1] = value;
+ if (intel->constant_cliprect) {
+ state->Buffer[I830_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
+ state->Buffer[I830_DESTREG_DRAWRECT1] = 0;
+ state->Buffer[I830_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
+ state->Buffer[I830_DESTREG_DRAWRECT3] =
+ (ctx->DrawBuffer->Width & 0xffff) |
+ (ctx->DrawBuffer->Height << 16);
+ state->Buffer[I830_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
+ state->Buffer[I830_DESTREG_DRAWRECT5] = 0;
+ } else {
+ state->Buffer[I830_DESTREG_DRAWRECT0] = MI_NOOP;
+ state->Buffer[I830_DESTREG_DRAWRECT1] = MI_NOOP;
+ state->Buffer[I830_DESTREG_DRAWRECT2] = MI_NOOP;
+ state->Buffer[I830_DESTREG_DRAWRECT3] = MI_NOOP;
+ state->Buffer[I830_DESTREG_DRAWRECT4] = MI_NOOP;
+ state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP;
+ }
+
I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h
index a2376e50e15..87bbf5f9271 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -65,7 +65,13 @@
#define I915_DESTREG_SR0 9
#define I915_DESTREG_SR1 10
#define I915_DESTREG_SR2 11
-#define I915_DEST_SETUP_SIZE 12
+#define I915_DESTREG_DRAWRECT0 12
+#define I915_DESTREG_DRAWRECT1 13
+#define I915_DESTREG_DRAWRECT2 14
+#define I915_DESTREG_DRAWRECT3 15
+#define I915_DESTREG_DRAWRECT4 16
+#define I915_DESTREG_DRAWRECT5 17
+#define I915_DEST_SETUP_SIZE 18
#define I915_CTXREG_STATE4 0
#define I915_CTXREG_LI 1
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index 7431a9cf76d..e79c955d64d 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -399,6 +399,17 @@ i915_emit_state(struct intel_context *intel)
OUT_BATCH(state->Buffer[I915_DESTREG_SR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_SR1]);
OUT_BATCH(state->Buffer[I915_DESTREG_SR2]);
+
+ if (intel->constant_cliprect) {
+ assert(state->Buffer[I915_DESTREG_DRAWRECT0] != MI_NOOP);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT0]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT1]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT2]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT3]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT4]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT5]);
+ }
+
ADVANCE_BATCH();
}
@@ -521,6 +532,7 @@ i915_state_draw_region(struct intel_context *intel,
struct intel_region *depth_region)
{
struct i915_context *i915 = i915_context(&intel->ctx);
+ GLcontext *ctx = &intel->ctx;
GLuint value;
ASSERT(state == &i915->state || state == &i915->meta);
@@ -573,6 +585,24 @@ i915_state_draw_region(struct intel_context *intel,
}
state->Buffer[I915_DESTREG_DV1] = value;
+ if (intel->constant_cliprect) {
+ state->Buffer[I915_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO;
+ state->Buffer[I915_DESTREG_DRAWRECT1] = 0;
+ state->Buffer[I915_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */
+ state->Buffer[I915_DESTREG_DRAWRECT3] =
+ (ctx->DrawBuffer->Width & 0xffff) |
+ (ctx->DrawBuffer->Height << 16);
+ state->Buffer[I915_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */
+ state->Buffer[I915_DESTREG_DRAWRECT5] = 0;
+ } else {
+ state->Buffer[I915_DESTREG_DRAWRECT0] = MI_NOOP;
+ state->Buffer[I915_DESTREG_DRAWRECT1] = MI_NOOP;
+ state->Buffer[I915_DESTREG_DRAWRECT2] = MI_NOOP;
+ state->Buffer[I915_DESTREG_DRAWRECT3] = MI_NOOP;
+ state->Buffer[I915_DESTREG_DRAWRECT4] = MI_NOOP;
+ state->Buffer[I915_DESTREG_DRAWRECT5] = MI_NOOP;
+ }
+
I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
}
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index c87e5b9a120..c45d48dff8e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -148,7 +148,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
brw_clip_init_clipmask(c);
/* -ve rhw workaround */
- if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw))) {
+ if (!BRW_IS_G4X(p->brw)) {
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
brw_imm_ud(1<<20));
diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c
index 82d1e873577..740c7cbd109 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_state.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_state.c
@@ -102,7 +102,7 @@ clip_unit_create_from_key(struct brw_context *brw,
clip.clip5.api_mode = BRW_CLIP_API_OGL;
clip.clip5.clip_mode = key->clip_mode;
- if (BRW_IS_GM45(brw) || BRW_IS_G4X(brw))
+ if (BRW_IS_G4X(brw))
clip.clip5.negative_w_clip_test = 1;
clip.clip6.clipper_viewport_state_ptr = 0;
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index 8459b59b460..1dbba37fe7e 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -526,7 +526,7 @@ void brw_emit_tri_clip( struct brw_clip_compile *c )
/* if -ve rhw workaround bit is set,
do cliptest */
- if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw))) {
+ if (!BRW_IS_G4X(p->brw)) {
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
brw_imm_ud(1<<20));
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 474158b484b..e2bc08a6cb7 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -39,6 +39,7 @@
#include "brw_context.h"
#include "brw_defines.h"
#include "brw_draw.h"
+#include "brw_state.h"
#include "brw_vs.h"
#include "intel_tex.h"
#include "intel_blit.h"
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 1c6a0dede0b..e3904be977f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -433,7 +433,6 @@ struct brw_context
GLuint primitive;
GLboolean emit_state_always;
- GLboolean wrap;
GLboolean tmp_fallback;
GLboolean no_batch_wrap;
@@ -445,6 +444,19 @@ struct brw_context
GLuint nr_draw_regions;
struct intel_region *draw_regions[MAX_DRAW_BUFFERS];
struct intel_region *depth_region;
+
+ /**
+ * List of buffers accumulated in brw_validate_state to receive
+ * dri_bo_check_aperture treatment before exec, so we can know if we
+ * should flush the batch and try again before emitting primitives.
+ *
+ * This can be a fixed number as we only have a limited number of
+ * objects referenced from the batchbuffer in a primitive emit,
+ * consisting of the vertex buffers, pipelined state pointers,
+ * the CURBE, the depth buffer, and a query BO.
+ */
+ dri_bo *validated_bos[VERT_ATTRIB_MAX + 16];
+ int validated_bo_count;
} state;
struct brw_state_pointers attribs;
@@ -680,14 +692,6 @@ void brw_emit_query_begin(struct brw_context *brw);
void brw_emit_query_end(struct brw_context *brw);
/*======================================================================
- * brw_state.c
- */
-void brw_validate_state( struct brw_context *brw );
-void brw_init_state( struct brw_context *brw );
-void brw_destroy_state( struct brw_context *brw );
-
-
-/*======================================================================
* brw_state_dump.c
*/
void brw_debug_batch(struct intel_context *intel);
diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c
index 7cddd3a7dee..c7bac7b0c52 100644
--- a/src/mesa/drivers/dri/i965/brw_curbe.c
+++ b/src/mesa/drivers/dri/i965/brw_curbe.c
@@ -307,6 +307,7 @@ static void prepare_constant_buffer(struct brw_context *brw)
dri_bo_subdata(brw->curbe.curbe_bo, brw->curbe.curbe_offset, bufsz, buf);
}
+ brw_add_validated_bo(brw, brw->curbe.curbe_bo);
/* Because this provokes an action (ie copy the constants into the
* URB), it shouldn't be shortcircuited if identical to the
@@ -328,13 +329,6 @@ static void emit_constant_buffer(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
GLuint sz = brw->curbe.total_size;
- dri_bo *aper_array[] = {
- brw->intel.batch->buf,
- brw->curbe.curbe_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(2, IGNORE_CLIPRECTS);
if (sz == 0) {
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 0593e8d5f5f..39c32255f8b 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -798,10 +798,9 @@
#include "intel_chipset.h"
-#define BRW_IS_GM45(brw) (IS_GM45_GM((brw)->intel.intelScreen->deviceID))
#define BRW_IS_G4X(brw) (IS_G4X((brw)->intel.intelScreen->deviceID))
-#define CMD_PIPELINE_SELECT(brw) ((BRW_IS_GM45(brw) || BRW_IS_G4X(brw)) ? CMD_PIPELINE_SELECT_GM45 : CMD_PIPELINE_SELECT_965)
-#define CMD_VF_STATISTICS(brw) ((BRW_IS_GM45(brw) || BRW_IS_G4X(brw)) ? CMD_VF_STATISTICS_GM45 : CMD_VF_STATISTICS_965)
-#define URB_SIZES(brw) ((BRW_IS_GM45(brw) || BRW_IS_G4X(brw)) ? 384 : 256) /* 512 bit unit */
+#define CMD_PIPELINE_SELECT(brw) (BRW_IS_G4X(brw) ? CMD_PIPELINE_SELECT_GM45 : CMD_PIPELINE_SELECT_965)
+#define CMD_VF_STATISTICS(brw) (BRW_IS_G4X(brw) ? CMD_VF_STATISTICS_GM45 : CMD_VF_STATISTICS_965)
+#define URB_SIZES(brw) (BRW_IS_G4X(brw) ? 384 : 256) /* 512 bit units */
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 6c71b4abcf0..d87b8f8a848 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -256,6 +256,7 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
struct intel_context *intel = intel_context(ctx);
struct brw_context *brw = brw_context(ctx);
GLboolean retval = GL_FALSE;
+ GLboolean warn = GL_FALSE;
GLuint i;
if (ctx->NewState)
@@ -282,30 +283,25 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
LOCK_HARDWARE(intel);
- if (brw->intel.numClipRects == 0) {
+ if (!intel->constant_cliprect && intel->driDrawable->numClipRects == 0) {
UNLOCK_HARDWARE(intel);
return GL_TRUE;
}
+ /* Flush the batch if it's approaching full, so that we don't wrap while
+ * we've got validated state that needs to be in the same batch as the
+ * primitives. This fraction is just a guess (minimal full state plus
+ * a primitive is around 512 bytes), and would be better if we had
+ * an upper bound of how much we might emit in a single
+ * brw_try_draw_prims().
+ */
+ intel_batchbuffer_require_space(intel->batch, intel->batch->size / 4,
+ LOOP_CLIPRECTS);
{
- /* Flush the batch if it's approaching full, so that we don't wrap while
- * we've got validated state that needs to be in the same batch as the
- * primitives. This fraction is just a guess (minimal full state plus
- * a primitive is around 512 bytes), and would be better if we had
- * an upper bound of how much we might emit in a single
- * brw_try_draw_prims().
- */
- if (intel->batch->ptr - intel->batch->map > intel->batch->size * 3 / 4
- /* brw_emit_prim may change the cliprect_mode to LOOP_CLIPRECTS */
- || intel->batch->cliprect_mode != LOOP_CLIPRECTS)
- intel_batchbuffer_flush(intel->batch);
-
/* Set the first primitive early, ahead of validate_state:
*/
brw_set_prim(brw, prim[0].mode);
- /* XXX: Need to separate validate and upload of state.
- */
brw_validate_state( brw );
/* Various fallback checks:
@@ -316,6 +312,31 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
if (check_fallbacks( brw, prim, nr_prims ))
goto out;
+ /* Check that we can fit our state in with our existing batchbuffer, or
+ * flush otherwise.
+ */
+ if (dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+ brw->state.validated_bo_count)) {
+ static GLboolean warned;
+ intel_batchbuffer_flush(intel->batch);
+
+ /* Validate the state after we flushed the batch (which would have
+ * changed the set of dirty state). If we still fail to
+ * check_aperture, warn of what's happening, but attempt to continue
+ * on since it may succeed anyway, and the user would probably rather
+ * see a failure and a warning than a fallback.
+ */
+ brw_validate_state(brw);
+ if (!warned &&
+ dri_bufmgr_check_aperture_space(brw->state.validated_bos,
+ brw->state.validated_bo_count)) {
+ warn = GL_TRUE;
+ warned = GL_TRUE;
+ }
+ }
+
+ brw_upload_state(brw);
+
for (i = 0; i < nr_prims; i++) {
brw_emit_prim(brw, &prim[i]);
}
@@ -326,6 +347,10 @@ static GLboolean brw_try_draw_prims( GLcontext *ctx,
out:
UNLOCK_HARDWARE(intel);
+ if (warn)
+ fprintf(stderr, "i965: Single primitive emit potentially exceeded "
+ "available aperture space\n");
+
if (!retval)
DBG("%s failed\n", __FUNCTION__);
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index 7b88b5eaa1e..4080c5e3228 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -250,10 +250,10 @@ static void get_space( struct brw_context *brw,
wrap_buffers(brw, size);
}
+ assert(*bo_return == NULL);
dri_bo_reference(brw->vb.upload.bo);
*bo_return = brw->vb.upload.bo;
*offset_return = brw->vb.upload.offset;
-
brw->vb.upload.offset += size;
}
@@ -359,6 +359,14 @@ static void brw_prepare_vertices(struct brw_context *brw)
input->offset = (unsigned long)input->glarray->Ptr;
input->stride = input->glarray->StrideB;
} else {
+ if (input->bo != NULL) {
+ /* Already-uploaded vertex data is present from a previous
+ * prepare_vertices, but we had to re-validate state due to
+ * check_aperture failing and a new batch being produced.
+ */
+ continue;
+ }
+
/* Queue the buffer object up to be uploaded in the next pass,
* when we've decided if we're doing interleaved or not.
*/
@@ -417,6 +425,12 @@ static void brw_prepare_vertices(struct brw_context *brw)
}
brw_prepare_query_begin(brw);
+
+ for (i = 0; i < nr_enabled; i++) {
+ struct brw_vertex_element *input = enabled[i];
+
+ brw_add_validated_bo(brw, input->bo);
+ }
}
static void brw_emit_vertices(struct brw_context *brw)
@@ -512,7 +526,7 @@ static void brw_prepare_indices(struct brw_context *brw)
struct intel_context *intel = &brw->intel;
const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
GLuint ib_size;
- dri_bo *bo;
+ dri_bo *bo = NULL;
struct gl_buffer_object *bufferobj;
GLuint offset;
@@ -561,6 +575,8 @@ static void brw_prepare_indices(struct brw_context *brw)
dri_bo_unreference(brw->ib.bo);
brw->ib.bo = bo;
brw->ib.offset = offset;
+
+ brw_add_validated_bo(brw, brw->ib.bo);
}
static void brw_emit_indices(struct brw_context *brw)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 207b8b7ca38..49b422ee2ff 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -65,7 +65,7 @@ struct brw_reg
GLuint abs:1; /* source only */
GLuint vstride:4; /* source only */
GLuint width:3; /* src only, align1 only */
- GLuint hstride:2; /* src only, align1 only */
+ GLuint hstride:2; /* align1 only */
GLuint address_mode:1; /* relative addressing, hopefully! */
GLuint pad0:1;
@@ -432,6 +432,12 @@ static INLINE struct brw_reg brw_uw8_grf( GLuint nr,
return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
}
+static INLINE struct brw_reg brw_uw16_grf( GLuint nr,
+ GLuint subnr )
+{
+ return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr);
+}
+
static INLINE struct brw_reg brw_null_reg( void )
{
return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 0bfbec9d140..ce4cf46cfa6 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -64,7 +64,9 @@ static void brw_set_dest( struct brw_instruction *insn,
if (insn->header.access_mode == BRW_ALIGN_1) {
insn->bits1.da1.dest_subreg_nr = dest.subnr;
- insn->bits1.da1.dest_horiz_stride = BRW_HORIZONTAL_STRIDE_1;
+ if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
+ dest.hstride = BRW_HORIZONTAL_STRIDE_1;
+ insn->bits1.da1.dest_horiz_stride = dest.hstride;
}
else {
insn->bits1.da16.dest_subreg_nr = dest.subnr / 16;
@@ -78,7 +80,9 @@ static void brw_set_dest( struct brw_instruction *insn,
*/
if (insn->header.access_mode == BRW_ALIGN_1) {
insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset;
- insn->bits1.ia1.dest_horiz_stride = BRW_HORIZONTAL_STRIDE_1;
+ if (dest.hstride == BRW_HORIZONTAL_STRIDE_0)
+ dest.hstride = BRW_HORIZONTAL_STRIDE_1;
+ insn->bits1.ia1.dest_horiz_stride = dest.hstride;
}
else {
insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset;
@@ -329,14 +333,14 @@ static void brw_set_sampler_message(struct brw_context *brw,
{
brw_set_src1(insn, brw_imm_d(0));
- if (BRW_IS_GM45(brw) || BRW_IS_G4X(brw)) {
- insn->bits3.sampler_gm45_g4x.binding_table_index = binding_table_index;
- insn->bits3.sampler_gm45_g4x.sampler = sampler;
- insn->bits3.sampler_gm45_g4x.msg_type = msg_type;
- insn->bits3.sampler_gm45_g4x.response_length = response_length;
- insn->bits3.sampler_gm45_g4x.msg_length = msg_length;
- insn->bits3.sampler_gm45_g4x.end_of_thread = eot;
- insn->bits3.sampler_gm45_g4x.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
+ if (BRW_IS_G4X(brw)) {
+ insn->bits3.sampler_g4x.binding_table_index = binding_table_index;
+ insn->bits3.sampler_g4x.sampler = sampler;
+ insn->bits3.sampler_g4x.msg_type = msg_type;
+ insn->bits3.sampler_g4x.response_length = response_length;
+ insn->bits3.sampler_g4x.msg_length = msg_length;
+ insn->bits3.sampler_g4x.end_of_thread = eot;
+ insn->bits3.sampler_g4x.msg_target = BRW_MESSAGE_TARGET_SAMPLER;
} else {
insn->bits3.sampler.binding_table_index = binding_table_index;
insn->bits3.sampler.sampler = sampler;
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 487c638ce21..627705fa9ba 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -71,6 +71,38 @@ const struct brw_tracked_state brw_blend_constant_color = {
.emit = upload_blend_constant_color
};
+/* Constant single cliprect for framebuffer object or DRI2 drawing */
+static void upload_drawing_rect(struct brw_context *brw)
+{
+ struct intel_context *intel = &brw->intel;
+ GLcontext *ctx = &intel->ctx;
+
+ if (!intel->constant_cliprect)
+ return;
+
+ BEGIN_BATCH(4, NO_LOOP_CLIPRECTS);
+ OUT_BATCH(_3DSTATE_DRAWRECT_INFO_I965);
+ OUT_BATCH(0); /* xmin, ymin */
+ OUT_BATCH(((ctx->DrawBuffer->Width - 1) & 0xffff) |
+ ((ctx->DrawBuffer->Height - 1) << 16));
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+}
+
+const struct brw_tracked_state brw_drawing_rect = {
+ .dirty = {
+ .mesa = _NEW_BUFFERS,
+ .brw = 0,
+ .cache = 0
+ },
+ .emit = upload_drawing_rect
+};
+
+static void prepare_binding_table_pointers(struct brw_context *brw)
+{
+ brw_add_validated_bo(brw, brw->wm.bind_bo);
+}
+
/**
* Upload the binding table pointers, which point each stage's array of surface
* state pointers.
@@ -81,13 +113,6 @@ const struct brw_tracked_state brw_blend_constant_color = {
static void upload_binding_table_pointers(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- brw->wm.bind_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
BEGIN_BATCH(6, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_BINDING_TABLE_PTRS << 16 | (6 - 2));
@@ -107,6 +132,7 @@ const struct brw_tracked_state brw_binding_table_pointers = {
.brw = BRW_NEW_BATCH,
.cache = CACHE_NEW_SURF_BIND,
},
+ .prepare = prepare_binding_table_pointers,
.emit = upload_binding_table_pointers,
};
@@ -140,21 +166,18 @@ static void upload_pipelined_state_pointers(struct brw_context *brw )
brw->state.dirty.brw |= BRW_NEW_PSP;
}
-static void upload_psp_urb_cbs(struct brw_context *brw )
+
+static void prepare_psp_urb_cbs(struct brw_context *brw)
{
- struct intel_context *intel = &brw->intel;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- brw->vs.state_bo,
- brw->gs.state_bo,
- brw->clip.state_bo,
- brw->wm.state_bo,
- brw->cc.state_bo,
- };
-
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
+ brw_add_validated_bo(brw, brw->vs.state_bo);
+ brw_add_validated_bo(brw, brw->gs.state_bo);
+ brw_add_validated_bo(brw, brw->clip.state_bo);
+ brw_add_validated_bo(brw, brw->wm.state_bo);
+ brw_add_validated_bo(brw, brw->cc.state_bo);
+}
+static void upload_psp_urb_cbs(struct brw_context *brw )
+{
upload_pipelined_state_pointers(brw);
brw_upload_urb_fence(brw);
brw_upload_constant_buffer_state(brw);
@@ -172,14 +195,23 @@ const struct brw_tracked_state brw_psp_urb_cbs = {
CACHE_NEW_WM_UNIT |
CACHE_NEW_CC_UNIT)
},
+ .prepare = prepare_psp_urb_cbs,
.emit = upload_psp_urb_cbs,
};
+static void prepare_depthbuffer(struct brw_context *brw)
+{
+ struct intel_region *region = brw->state.depth_region;
+
+ if (region != NULL)
+ brw_add_validated_bo(brw, region->buffer);
+}
+
static void emit_depthbuffer(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
struct intel_region *region = brw->state.depth_region;
- unsigned int len = (BRW_IS_GM45(brw) || BRW_IS_G4X(brw)) ? sizeof(struct brw_depthbuffer_gm45_g4x) / 4 : sizeof(struct brw_depthbuffer) / 4;
+ unsigned int len = BRW_IS_G4X(brw) ? 6 : 5;
if (region == NULL) {
BEGIN_BATCH(len, IGNORE_CLIPRECTS);
@@ -190,16 +222,12 @@ static void emit_depthbuffer(struct brw_context *brw)
OUT_BATCH(0);
OUT_BATCH(0);
- if (BRW_IS_GM45(brw) || BRW_IS_G4X(brw))
+ if (BRW_IS_G4X(brw))
OUT_BATCH(0);
ADVANCE_BATCH();
} else {
unsigned int format;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- region->buffer
- };
switch (region->cpp) {
case 2:
@@ -216,9 +244,6 @@ static void emit_depthbuffer(struct brw_context *brw)
return;
}
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
-
BEGIN_BATCH(len, IGNORE_CLIPRECTS);
OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2));
OUT_BATCH(((region->pitch * region->cpp) - 1) |
@@ -234,7 +259,7 @@ static void emit_depthbuffer(struct brw_context *brw)
((region->height - 1) << 19));
OUT_BATCH(0);
- if (BRW_IS_GM45(brw) || BRW_IS_G4X(brw))
+ if (BRW_IS_G4X(brw))
OUT_BATCH(0);
ADVANCE_BATCH();
@@ -247,6 +272,7 @@ const struct brw_tracked_state brw_depthbuffer = {
.brw = BRW_NEW_DEPTH_BUFFER | BRW_NEW_BATCH,
.cache = 0,
},
+ .prepare = prepare_depthbuffer,
.emit = emit_depthbuffer,
};
@@ -318,7 +344,7 @@ static void upload_aa_line_parameters(struct brw_context *brw)
{
struct brw_aa_line_parameters balp;
- if (!(BRW_IS_GM45(brw) || BRW_IS_G4X(brw)))
+ if (!BRW_IS_G4X(brw))
return;
/* use legacy aa line coverage computation */
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index a1a1353dee7..cb9169e2eef 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -42,6 +42,7 @@
#include "main/imports.h"
#include "brw_context.h"
+#include "brw_state.h"
#include "intel_batchbuffer.h"
#include "intel_reg.h"
@@ -163,10 +164,6 @@ void
brw_prepare_query_begin(struct brw_context *brw)
{
struct intel_context *intel = &brw->intel;
- dri_bo *aper_array[] = {
- intel->batch->buf,
- brw->query.bo,
- };
/* Skip if we're not doing any queries. */
if (is_empty_list(&brw->query.active_head))
@@ -182,8 +179,7 @@ brw_prepare_query_begin(struct brw_context *brw)
brw->query.index = 0;
}
- if (dri_bufmgr_check_aperture_space(aper_array, ARRAY_SIZE(aper_array)))
- intel_batchbuffer_flush(intel->batch);
+ brw_add_validated_bo(brw, brw->query.bo);
}
/** Called just before primitive drawing to get a beginning PS_DEPTH_COUNT. */
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 4c04036ef08..bb22c03eeb6 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -35,6 +35,16 @@
#include "brw_context.h"
+static inline void
+brw_add_validated_bo(struct brw_context *brw, dri_bo *bo)
+{
+ assert(brw->state.validated_bo_count < ARRAY_SIZE(brw->state.validated_bos));
+
+ if (bo != NULL) {
+ dri_bo_reference(bo);
+ brw->state.validated_bos[brw->state.validated_bo_count++] = bo;
+ }
+};
const struct brw_tracked_state brw_blend_constant_color;
const struct brw_tracked_state brw_cc_unit;
@@ -79,10 +89,19 @@ const struct brw_tracked_state brw_pipe_control;
const struct brw_tracked_state brw_clear_surface_cache;
const struct brw_tracked_state brw_clear_batch_cache;
+const struct brw_tracked_state brw_drawing_rect;
const struct brw_tracked_state brw_indices;
const struct brw_tracked_state brw_vertices;
/***********************************************************************
+ * brw_state.c
+ */
+void brw_validate_state(struct brw_context *brw);
+void brw_upload_state(struct brw_context *brw);
+void brw_init_state(struct brw_context *brw);
+void brw_destroy_state(struct brw_context *brw);
+
+/***********************************************************************
* brw_state_cache.c
*/
dri_bo *brw_cache_data(struct brw_cache *cache,
diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c b/src/mesa/drivers/dri/i965/brw_state_batch.c
index 94ef9248686..dc87859f3f5 100644
--- a/src/mesa/drivers/dri/i965/brw_state_batch.c
+++ b/src/mesa/drivers/dri/i965/brw_state_batch.c
@@ -97,8 +97,6 @@ void brw_clear_batch_cache_flush( struct brw_context *brw )
{
clear_batch_cache(brw);
- brw->wrap = 0;
-
/* brw_do_flush(brw, BRW_FLUSH_STATE_CACHE|BRW_FLUSH_READ_CACHE); */
brw->state.dirty.mesa |= ~0;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index b6a52843a81..7a642bd2a8f 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -45,7 +45,6 @@ const struct brw_tracked_state *atoms[] =
{
&brw_check_fallback,
- &brw_active_vertprog,
&brw_wm_input_sizes,
&brw_vs_prog,
&brw_gs_prog,
@@ -99,6 +98,7 @@ const struct brw_tracked_state *atoms[] =
&brw_psp_urb_cbs,
#endif
+ &brw_drawing_rect,
&brw_indices,
&brw_vertices,
@@ -168,6 +168,18 @@ static void xor_states( struct brw_state_flags *result,
result->cache = a->cache ^ b->cache;
}
+static void
+brw_clear_validated_bos(struct brw_context *brw)
+{
+ int i;
+
+ /* Clear the last round of validated bos */
+ for (i = 0; i < brw->state.validated_bo_count; i++) {
+ dri_bo_unreference(brw->state.validated_bos[i]);
+ brw->state.validated_bos[i] = NULL;
+ }
+ brw->state.validated_bo_count = 0;
+}
/***********************************************************************
* Emit all state:
@@ -176,14 +188,14 @@ void brw_validate_state( struct brw_context *brw )
{
struct intel_context *intel = &brw->intel;
struct brw_state_flags *state = &brw->state.dirty;
- GLuint i, count, pass = 0;
- dri_bo *last_batch_bo = NULL;
+ GLuint i;
+
+ brw_clear_validated_bos(brw);
state->mesa |= brw->intel.NewGLState;
brw->intel.NewGLState = 0;
- if (brw->wrap)
- state->brw |= BRW_NEW_CONTEXT;
+ brw_add_validated_bo(brw, intel->batch->buf);
if (brw->emit_state_always) {
state->mesa |= ~0;
@@ -199,6 +211,10 @@ void brw_validate_state( struct brw_context *brw )
brw->state.dirty.brw |= BRW_NEW_FRAGMENT_PROGRAM;
}
+ if (brw->vertex_program != brw->attribs.VertexProgram->_Current) {
+ brw->vertex_program = brw->attribs.VertexProgram->_Current;
+ brw->state.dirty.brw |= BRW_NEW_VERTEX_PROGRAM;
+ }
if (state->mesa == 0 &&
state->cache == 0 &&
@@ -210,8 +226,6 @@ void brw_validate_state( struct brw_context *brw )
brw->intel.Fallback = 0;
- count = 0;
-
/* do prepare stage for all atoms */
for (i = 0; i < Elements(atoms); i++) {
const struct brw_tracked_state *atom = brw->state.atoms[i];
@@ -225,19 +239,15 @@ void brw_validate_state( struct brw_context *brw )
}
}
}
+}
- if (brw->intel.Fallback)
- return;
- /* We're about to try to set up a coherent state in the batchbuffer for
- * the emission of primitives. If we exceed the aperture size in any of the
- * emit() calls, we need to go back to square 1 and try setting up again.
- */
-got_flushed:
- dri_bo_unreference(last_batch_bo);
- last_batch_bo = intel->batch->buf;
- dri_bo_reference(last_batch_bo);
- assert(pass++ <= 2);
+void brw_upload_state(struct brw_context *brw)
+{
+ struct brw_state_flags *state = &brw->state.dirty;
+ int i;
+
+ brw_clear_validated_bos(brw);
if (INTEL_DEBUG) {
/* Debug version which enforces various sanity checks on the
@@ -262,8 +272,6 @@ got_flushed:
if (check_state(state, &atom->dirty)) {
if (atom->emit) {
atom->emit( brw );
- if (intel->batch->buf != last_batch_bo)
- goto got_flushed;
}
}
@@ -288,15 +296,11 @@ got_flushed:
if (check_state(state, &atom->dirty)) {
if (atom->emit) {
atom->emit( brw );
- if (intel->batch->buf != last_batch_bo)
- goto got_flushed;
}
}
}
}
- dri_bo_unreference(last_batch_bo);
-
if (!brw->intel.Fallback)
memset(state, 0, sizeof(*state));
}
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index ec865c925a7..4e577d0f6a8 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -175,7 +175,7 @@ struct brw_depthbuffer
} dword4;
};
-struct brw_depthbuffer_gm45_g4x
+struct brw_depthbuffer_g4x
{
union header_union header;
@@ -1405,7 +1405,7 @@ struct brw_instruction
GLuint msg_target:4;
GLuint pad1:3;
GLuint end_of_thread:1;
- } sampler_gm45_g4x;
+ } sampler_g4x;
struct brw_urb_immediate urb;
diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c
index 1116ade0a47..1a004176de1 100644
--- a/src/mesa/drivers/dri/i965/brw_urb.c
+++ b/src/mesa/drivers/dri/i965/brw_urb.c
@@ -92,9 +92,9 @@ static void recalculate_urb_fence( struct brw_context *brw )
if (brw->urb.vsize < vsize ||
brw->urb.sfsize < sfsize ||
brw->urb.csize < csize ||
- (brw->urb.constrained && (brw->urb.vsize > brw->urb.vsize ||
- brw->urb.sfsize > brw->urb.sfsize ||
- brw->urb.csize > brw->urb.csize))) {
+ (brw->urb.constrained && (brw->urb.vsize > vsize ||
+ brw->urb.sfsize > sfsize ||
+ brw->urb.csize > csize))) {
brw->urb.csize = csize;
@@ -114,6 +114,10 @@ static void recalculate_urb_fence( struct brw_context *brw )
brw->urb.nr_sf_entries = limits[SF].min_nr_entries;
brw->urb.nr_cs_entries = limits[CS].min_nr_entries;
+ /* Mark us as operating with constrained nr_entries, so that next
+ * time we recalculate we'll resize the fences in the hope of
+ * escaping constrained mode and getting back to normal performance.
+ */
brw->urb.constrained = 1;
if (!check_urb_layout(brw)) {
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 9de05408ba9..25b4ee85cb0 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -818,8 +818,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
}
- /* Build ndc coords? TODO: Shortcircuit when w is known to be one.
- */
+ /* Build ndc coords */
if (!c->key.know_w_is_one) {
ndc = get_tmp(c);
emit_math1(c, BRW_MATH_FUNCTION_INV, ndc, brw_swizzle1(pos, 3), BRW_MATH_PRECISION_FULL);
@@ -829,12 +828,12 @@ static void emit_vertex_write( struct brw_vs_compile *c)
ndc = pos;
}
- /* This includes the workaround for -ve rhw, so is no longer an
- * optional step:
+ /* Update the header for point size, user clipping flags, and -ve rhw
+ * workaround.
*/
if ((c->prog_data.outputs_written & (1<<VERT_RESULT_PSIZ)) ||
c->key.nr_userclip ||
- !c->key.know_w_is_one)
+ (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one))
{
struct brw_reg header1 = retype(get_tmp(c), BRW_REGISTER_TYPE_UD);
GLuint i;
@@ -867,7 +866,7 @@ static void emit_vertex_write( struct brw_vs_compile *c)
* Later, clipping will detect ucp[6] and ensure the primitive is
* clipped against all fixed planes.
*/
- if (!(BRW_IS_GM45(p->brw) || BRW_IS_G4X(p->brw)) && !c->key.know_w_is_one) {
+ if (!BRW_IS_G4X(p->brw) && !c->key.know_w_is_one) {
brw_CMP(p,
vec8(brw_null_reg()),
BRW_CONDITIONAL_L,
diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c
index a64e437860f..2d4c81274e6 100644
--- a/src/mesa/drivers/dri/i965/brw_vtbl.c
+++ b/src/mesa/drivers/dri/i965/brw_vtbl.c
@@ -62,7 +62,6 @@ dri_bo_release(dri_bo **bo)
*/
static void brw_destroy_context( struct intel_context *intel )
{
- GLcontext *ctx = &intel->ctx;
struct brw_context *brw = brw_context(&intel->ctx);
int i;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 297617ee2dc..896390c17b8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -157,6 +157,7 @@ struct brw_wm_instruction {
#define BRW_WM_MAX_PARAM 256
#define BRW_WM_MAX_CONST 256
#define BRW_WM_MAX_KILLS MAX_NV_FRAGMENT_PROGRAM_INSTRUCTIONS
+#define BRW_WM_MAX_SUBROUTINE 16
@@ -246,7 +247,10 @@ struct brw_wm_compile {
struct brw_reg stack;
struct brw_reg emit_mask_reg;
GLuint reg_index;
+ GLuint tmp_regs[BRW_WM_MAX_GRF];
GLuint tmp_index;
+ GLuint tmp_max;
+ GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 4d5e11f4b6f..cb728190f5c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -4,6 +4,10 @@
#include "brw_eu.h"
#include "brw_wm.h"
+enum _subroutine {
+ SUB_NOISE1, SUB_NOISE2, SUB_NOISE3, SUB_NOISE4
+};
+
/* Only guess, need a flag in gl_fragment_program later */
GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp)
{
@@ -12,13 +16,17 @@ GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp)
struct prog_instruction *inst = &fp->Base.Instructions[i];
switch (inst->Opcode) {
case OPCODE_IF:
- case OPCODE_INT:
+ case OPCODE_TRUNC:
case OPCODE_ENDIF:
case OPCODE_CAL:
case OPCODE_BRK:
case OPCODE_RET:
case OPCODE_DDX:
case OPCODE_DDY:
+ case OPCODE_NOISE1:
+ case OPCODE_NOISE2:
+ case OPCODE_NOISE3:
+ case OPCODE_NOISE4:
case OPCODE_BGNLOOP:
return GL_TRUE;
default:
@@ -47,13 +55,26 @@ static int get_scalar_dst_index(struct prog_instruction *inst)
static struct brw_reg alloc_tmp(struct brw_wm_compile *c)
{
struct brw_reg reg;
- reg = brw_vec8_grf(c->tmp_index--, 0);
+ if(c->tmp_index == c->tmp_max)
+ c->tmp_regs[ c->tmp_max++ ] = c->reg_index++;
+
+ reg = brw_vec8_grf(c->tmp_regs[ c->tmp_index++ ], 0);
return reg;
}
-static void release_tmps(struct brw_wm_compile *c)
+static int mark_tmps(struct brw_wm_compile *c)
+{
+ return c->tmp_index;
+}
+
+static struct brw_reg lookup_tmp( struct brw_wm_compile *c, int index )
+{
+ return brw_vec8_grf( c->tmp_regs[ index ], 0 );
+}
+
+static void release_tmps(struct brw_wm_compile *c, int mark)
{
- c->tmp_index = 127;
+ c->tmp_index = mark;
}
static struct brw_reg
@@ -155,6 +176,68 @@ static struct brw_reg get_src_reg(struct brw_wm_compile *c,
src->NegateBase, src->Abs);
}
+/* Subroutines are minimal support for resusable instruction sequences.
+ They are implemented as simply as possible to minimise overhead: there
+ is no explicit support for communication between the caller and callee
+ other than saving the return address in a temporary register, nor is
+ there any automatic local storage. This implies that great care is
+ required before attempting reentrancy or any kind of nested
+ subroutine invocations. */
+static void invoke_subroutine( struct brw_wm_compile *c,
+ enum _subroutine subroutine,
+ void (*emit)( struct brw_wm_compile * ) )
+{
+ struct brw_compile *p = &c->func;
+
+ assert( subroutine < BRW_WM_MAX_SUBROUTINE );
+
+ if( c->subroutines[ subroutine ] ) {
+ /* subroutine previously emitted: reuse existing instructions */
+
+ int mark = mark_tmps( c );
+ struct brw_reg return_address = retype( alloc_tmp( c ),
+ BRW_REGISTER_TYPE_UD );
+ int here = p->nr_insn;
+
+ brw_push_insn_state(p);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 2 << 4 ) );
+
+ brw_ADD( p, brw_ip_reg(), brw_ip_reg(),
+ brw_imm_d( ( c->subroutines[ subroutine ] -
+ here - 1 ) << 4 ) );
+ brw_pop_insn_state(p);
+
+ release_tmps( c, mark );
+ } else {
+ /* previously unused subroutine: emit, and mark for later reuse */
+
+ int mark = mark_tmps( c );
+ struct brw_reg return_address = retype( alloc_tmp( c ),
+ BRW_REGISTER_TYPE_UD );
+ struct brw_instruction *calc;
+ int base = p->nr_insn;
+
+ brw_push_insn_state(p);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ calc = brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 0 ) );
+ brw_pop_insn_state(p);
+
+ c->subroutines[ subroutine ] = p->nr_insn;
+
+ emit( c );
+
+ brw_push_insn_state(p);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ brw_MOV( p, brw_ip_reg(), return_address );
+ brw_pop_insn_state(p);
+
+ brw_set_src1( calc, brw_imm_ud( ( p->nr_insn - base ) << 4 ) );
+
+ release_tmps( c, mark );
+ }
+}
+
static void emit_abs( struct brw_wm_compile *c,
struct prog_instruction *inst)
{
@@ -172,7 +255,7 @@ static void emit_abs( struct brw_wm_compile *c,
brw_set_saturate(p, 0);
}
-static void emit_int( struct brw_wm_compile *c,
+static void emit_trunc( struct brw_wm_compile *c,
struct prog_instruction *inst)
{
int i;
@@ -778,6 +861,7 @@ static void emit_lrp(struct brw_wm_compile *c,
GLuint mask = inst->DstReg.WriteMask;
struct brw_reg dst, tmp1, tmp2, src0, src1, src2;
int i;
+ int mark = mark_tmps(c);
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
dst = get_dst_reg(c, inst, i, 1);
@@ -804,7 +888,7 @@ static void emit_lrp(struct brw_wm_compile *c,
brw_MAC(p, dst, src0, tmp1);
brw_set_saturate(p, 0);
}
- release_tmps(c);
+ release_tmps(c, mark);
}
}
@@ -957,6 +1041,633 @@ static void emit_ddy(struct brw_wm_compile *c,
brw_set_saturate(p, 0);
}
+static __inline struct brw_reg high_words( struct brw_reg reg )
+{
+ return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_W ), 1 ),
+ 0, 8, 2 );
+}
+
+static __inline struct brw_reg low_words( struct brw_reg reg )
+{
+ return stride( retype( reg, BRW_REGISTER_TYPE_W ), 0, 8, 2 );
+}
+
+static __inline struct brw_reg even_bytes( struct brw_reg reg )
+{
+ return stride( retype( reg, BRW_REGISTER_TYPE_B ), 0, 16, 2 );
+}
+
+static __inline struct brw_reg odd_bytes( struct brw_reg reg )
+{
+ return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_B ), 1 ),
+ 0, 16, 2 );
+}
+
+/* One-, two- and three-dimensional Perlin noise, similar to the description
+ in _Improving Noise_, Ken Perlin, Computer Graphics vol. 35 no. 3. */
+static void noise1_sub( struct brw_wm_compile *c ) {
+
+ struct brw_compile *p = &c->func;
+ struct brw_reg param,
+ x0, x1, /* gradients at each end */
+ t, tmp[ 2 ], /* float temporaries */
+ itmp[ 5 ]; /* unsigned integer temporaries (aliases of floats above) */
+ int i;
+ int mark = mark_tmps( c );
+
+ x0 = alloc_tmp( c );
+ x1 = alloc_tmp( c );
+ t = alloc_tmp( c );
+ tmp[ 0 ] = alloc_tmp( c );
+ tmp[ 1 ] = alloc_tmp( c );
+ itmp[ 0 ] = retype( tmp[ 0 ], BRW_REGISTER_TYPE_UD );
+ itmp[ 1 ] = retype( tmp[ 1 ], BRW_REGISTER_TYPE_UD );
+ itmp[ 2 ] = retype( x0, BRW_REGISTER_TYPE_UD );
+ itmp[ 3 ] = retype( x1, BRW_REGISTER_TYPE_UD );
+ itmp[ 4 ] = retype( t, BRW_REGISTER_TYPE_UD );
+
+ param = lookup_tmp( c, mark - 2 );
+
+ brw_set_access_mode( p, BRW_ALIGN_1 );
+
+ brw_MOV( p, itmp[ 2 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
+
+ /* Arrange the two end coordinates into scalars (itmp0/itmp1) to
+ be hashed. Also compute the remainder (offset within the unit
+ length), interleaved to reduce register dependency penalties. */
+ brw_RNDD( p, itmp[ 0 ], param );
+ brw_FRC( p, param, param );
+ brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 1 ) );
+ brw_MOV( p, itmp[ 3 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
+ brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
+
+ /* We're now ready to perform the hashing. The two hashes are
+ interleaved for performance. The hash function used is
+ designed to rapidly achieve avalanche and require only 32x16
+ bit multiplication, and 16-bit swizzles (which we get for
+ free). We can't use immediate operands in the multiplies,
+ because immediates are permitted only in src1 and the 16-bit
+ factor is permitted only in src0. */
+ for( i = 0; i < 2; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 2 ], itmp[ i ] );
+ for( i = 0; i < 2; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+ for( i = 0; i < 2; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 3 ], itmp[ i ] );
+ for( i = 0; i < 2; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+ for( i = 0; i < 2; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
+ for( i = 0; i < 2; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+
+ /* Now we want to initialise the two gradients based on the
+ hashes. Format conversion from signed integer to float leaves
+ everything scaled too high by a factor of pow( 2, 31 ), but
+ we correct for that right at the end. */
+ brw_ADD( p, t, param, brw_imm_f( -1.0 ) );
+ brw_MOV( p, x0, retype( tmp[ 0 ], BRW_REGISTER_TYPE_D ) );
+ brw_MOV( p, x1, retype( tmp[ 1 ], BRW_REGISTER_TYPE_D ) );
+
+ brw_MUL( p, x0, x0, param );
+ brw_MUL( p, x1, x1, t );
+
+ /* We interpolate between the gradients using the polynomial
+ 6t^5 - 15t^4 + 10t^3 (Perlin). */
+ brw_MUL( p, tmp[ 0 ], param, brw_imm_f( 6.0 ) );
+ brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+ brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+ brw_ADD( p, x1, x1, negate( x0 ) ); /* unrelated work to fill the
+ pipeline */
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
+ brw_MUL( p, param, tmp[ 0 ], param );
+ brw_MUL( p, x1, x1, param );
+ brw_ADD( p, x0, x0, x1 );
+ /* scale by pow( 2, -30 ), to compensate for the format conversion
+ above and an extra factor of 2 so that a single gradient covers
+ the [-1,1] range */
+ brw_MUL( p, param, x0, brw_imm_f( 0.000000000931322574615478515625 ) );
+
+ release_tmps( c, mark );
+}
+
+static void emit_noise1( struct brw_wm_compile *c,
+ struct prog_instruction *inst )
+{
+ struct brw_compile *p = &c->func;
+ struct brw_reg src, param, dst;
+ GLuint mask = inst->DstReg.WriteMask;
+ int i;
+ int mark = mark_tmps( c );
+
+ assert( mark == 0 );
+
+ src = get_src_reg( c, inst->SrcReg, 0, 1 );
+
+ param = alloc_tmp( c );
+
+ brw_MOV( p, param, src );
+
+ invoke_subroutine( c, SUB_NOISE1, noise1_sub );
+
+ /* Fill in the result: */
+ brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+ for (i = 0 ; i < 4; i++) {
+ if (mask & (1<<i)) {
+ dst = get_dst_reg(c, inst, i, 1);
+ brw_MOV( p, dst, param );
+ }
+ }
+ if( inst->SaturateMode == SATURATE_ZERO_ONE )
+ brw_set_saturate( p, 0 );
+
+ release_tmps( c, mark );
+}
+
+static void noise2_sub( struct brw_wm_compile *c ) {
+
+ struct brw_compile *p = &c->func;
+ struct brw_reg param0, param1,
+ x0y0, x0y1, x1y0, x1y1, /* gradients at each corner */
+ t, tmp[ 4 ], /* float temporaries */
+ itmp[ 7 ]; /* unsigned integer temporaries (aliases of floats above) */
+ int i;
+ int mark = mark_tmps( c );
+
+ x0y0 = alloc_tmp( c );
+ x0y1 = alloc_tmp( c );
+ x1y0 = alloc_tmp( c );
+ x1y1 = alloc_tmp( c );
+ t = alloc_tmp( c );
+ for( i = 0; i < 4; i++ ) {
+ tmp[ i ] = alloc_tmp( c );
+ itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
+ }
+ itmp[ 4 ] = retype( x0y0, BRW_REGISTER_TYPE_UD );
+ itmp[ 5 ] = retype( x0y1, BRW_REGISTER_TYPE_UD );
+ itmp[ 6 ] = retype( x1y0, BRW_REGISTER_TYPE_UD );
+
+ param0 = lookup_tmp( c, mark - 3 );
+ param1 = lookup_tmp( c, mark - 2 );
+
+ brw_set_access_mode( p, BRW_ALIGN_1 );
+
+ /* Arrange the four corner coordinates into scalars (itmp0..itmp3) to
+ be hashed. Also compute the remainders (offsets within the unit
+ square), interleaved to reduce register dependency penalties. */
+ brw_RNDD( p, itmp[ 0 ], param0 );
+ brw_RNDD( p, itmp[ 1 ], param1 );
+ brw_FRC( p, param0, param0 );
+ brw_FRC( p, param1, param1 );
+ brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
+ brw_ADD( p, high_words( itmp[ 0 ] ), high_words( itmp[ 0 ] ),
+ low_words( itmp[ 1 ] ) );
+ brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
+ brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
+ brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 0x10000 ) );
+ brw_ADD( p, itmp[ 2 ], itmp[ 0 ], brw_imm_ud( 0x1 ) );
+ brw_ADD( p, itmp[ 3 ], itmp[ 0 ], brw_imm_ud( 0x10001 ) );
+
+ /* We're now ready to perform the hashing. The four hashes are
+ interleaved for performance. The hash function used is
+ designed to rapidly achieve avalanche and require only 32x16
+ bit multiplication, and 16-bit swizzles (which we get for
+ free). We can't use immediate operands in the multiplies,
+ because immediates are permitted only in src1 and the 16-bit
+ factor is permitted only in src0. */
+ for( i = 0; i < 4; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
+ for( i = 0; i < 4; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+ for( i = 0; i < 4; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 5 ], itmp[ i ] );
+ for( i = 0; i < 4; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+ for( i = 0; i < 4; i++ )
+ brw_MUL( p, itmp[ i ], itmp[ 6 ], itmp[ i ] );
+ for( i = 0; i < 4; i++ )
+ brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
+ high_words( itmp[ i ] ) );
+
+ /* Now we want to initialise the four gradients based on the
+ hashes. Format conversion from signed integer to float leaves
+ everything scaled too high by a factor of pow( 2, 15 ), but
+ we correct for that right at the end. */
+ brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+ brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
+ brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
+ brw_MOV( p, x1y0, low_words( tmp[ 2 ] ) );
+ brw_MOV( p, x1y1, low_words( tmp[ 3 ] ) );
+
+ brw_MOV( p, tmp[ 0 ], high_words( tmp[ 0 ] ) );
+ brw_MOV( p, tmp[ 1 ], high_words( tmp[ 1 ] ) );
+ brw_MOV( p, tmp[ 2 ], high_words( tmp[ 2 ] ) );
+ brw_MOV( p, tmp[ 3 ], high_words( tmp[ 3 ] ) );
+
+ brw_MUL( p, x1y0, x1y0, t );
+ brw_MUL( p, x1y1, x1y1, t );
+ brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+ brw_MUL( p, x0y0, x0y0, param0 );
+ brw_MUL( p, x0y1, x0y1, param0 );
+
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param1 );
+ brw_MUL( p, tmp[ 2 ], tmp[ 2 ], param1 );
+ brw_MUL( p, tmp[ 1 ], tmp[ 1 ], t );
+ brw_MUL( p, tmp[ 3 ], tmp[ 3 ], t );
+
+ brw_ADD( p, x0y0, x0y0, tmp[ 0 ] );
+ brw_ADD( p, x1y0, x1y0, tmp[ 2 ] );
+ brw_ADD( p, x0y1, x0y1, tmp[ 1 ] );
+ brw_ADD( p, x1y1, x1y1, tmp[ 3 ] );
+
+ /* We interpolate between the gradients using the polynomial
+ 6t^5 - 15t^4 + 10t^3 (Perlin). */
+ brw_MUL( p, tmp[ 0 ], param0, brw_imm_f( 6.0 ) );
+ brw_MUL( p, tmp[ 1 ], param1, brw_imm_f( 6.0 ) );
+ brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
+ brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( -15.0 ) );
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+ brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+ brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work to fill the
+ pipeline */
+ brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
+ brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( 10.0 ) );
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+ brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+ brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work to fill the
+ pipeline */
+ brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
+ brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
+ brw_MUL( p, param0, tmp[ 0 ], param0 );
+ brw_MUL( p, param1, tmp[ 1 ], param1 );
+
+ /* Here we interpolate in the y dimension... */
+ brw_MUL( p, x0y1, x0y1, param1 );
+ brw_MUL( p, x1y1, x1y1, param1 );
+ brw_ADD( p, x0y0, x0y0, x0y1 );
+ brw_ADD( p, x1y0, x1y0, x1y1 );
+
+ /* And now in x. There are horrible register dependencies here,
+ but we have nothing else to do. */
+ brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+ brw_MUL( p, x1y0, x1y0, param0 );
+ brw_ADD( p, x0y0, x0y0, x1y0 );
+
+ /* scale by pow( 2, -15 ), as described above */
+ brw_MUL( p, param0, x0y0, brw_imm_f( 0.000030517578125 ) );
+
+ release_tmps( c, mark );
+}
+
+static void emit_noise2( struct brw_wm_compile *c,
+ struct prog_instruction *inst )
+{
+ struct brw_compile *p = &c->func;
+ struct brw_reg src0, src1, param0, param1, dst;
+ GLuint mask = inst->DstReg.WriteMask;
+ int i;
+ int mark = mark_tmps( c );
+
+ assert( mark == 0 );
+
+ src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
+ src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
+
+ param0 = alloc_tmp( c );
+ param1 = alloc_tmp( c );
+
+ brw_MOV( p, param0, src0 );
+ brw_MOV( p, param1, src1 );
+
+ invoke_subroutine( c, SUB_NOISE2, noise2_sub );
+
+ /* Fill in the result: */
+ brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+ for (i = 0 ; i < 4; i++) {
+ if (mask & (1<<i)) {
+ dst = get_dst_reg(c, inst, i, 1);
+ brw_MOV( p, dst, param0 );
+ }
+ }
+ if( inst->SaturateMode == SATURATE_ZERO_ONE )
+ brw_set_saturate( p, 0 );
+
+ release_tmps( c, mark );
+}
+
+/* The three-dimensional case is much like the one- and two- versions above,
+ but since the number of corners is rapidly growing we now pack 16 16-bit
+ hashes into each register to extract more parallelism from the EUs. */
+static void noise3_sub( struct brw_wm_compile *c ) {
+
+ struct brw_compile *p = &c->func;
+ struct brw_reg param0, param1, param2,
+ x0y0, x0y1, x1y0, x1y1, /* gradients at four of the corners */
+ xi, yi, zi, /* interpolation coefficients */
+ t, tmp[ 8 ], /* float temporaries */
+ itmp[ 8 ], /* unsigned integer temporaries (aliases of floats above) */
+ wtmp[ 8 ]; /* 16-way unsigned word temporaries (aliases of above) */
+ int i;
+ int mark = mark_tmps( c );
+
+ x0y0 = alloc_tmp( c );
+ x0y1 = alloc_tmp( c );
+ x1y0 = alloc_tmp( c );
+ x1y1 = alloc_tmp( c );
+ xi = alloc_tmp( c );
+ yi = alloc_tmp( c );
+ zi = alloc_tmp( c );
+ t = alloc_tmp( c );
+ for( i = 0; i < 8; i++ ) {
+ tmp[ i ] = alloc_tmp( c );
+ itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
+ wtmp[ i ] = brw_uw16_grf( tmp[ i ].nr, 0 );
+ }
+
+ param0 = lookup_tmp( c, mark - 4 );
+ param1 = lookup_tmp( c, mark - 3 );
+ param2 = lookup_tmp( c, mark - 2 );
+
+ brw_set_access_mode( p, BRW_ALIGN_1 );
+
+ /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to
+ be hashed. Also compute the remainders (offsets within the unit
+ cube), interleaved to reduce register dependency penalties. */
+ brw_RNDD( p, itmp[ 0 ], param0 );
+ brw_RNDD( p, itmp[ 1 ], param1 );
+ brw_RNDD( p, itmp[ 2 ], param2 );
+ brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBC8F ) ); /* constant used later */
+ brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0xD0BD ) ); /* constant used later */
+ brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0x9B93 ) ); /* constant used later */
+ brw_FRC( p, param0, param0 );
+ brw_FRC( p, param1, param1 );
+ brw_FRC( p, param2, param2 );
+ /* Since we now have only 16 bits of precision in the hash, we must
+ be more careful about thorough mixing to maintain entropy as we
+ squash the input vector into a small scalar. */
+ brw_MUL( p, brw_acc_reg(), itmp[ 4 ], itmp[ 0 ] );
+ brw_MAC( p, brw_acc_reg(), itmp[ 5 ], itmp[ 1 ] );
+ brw_MAC( p, itmp[ 0 ], itmp[ 6 ], itmp[ 2 ] );
+ brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ),
+ brw_imm_uw( 0xBC8F ) );
+
+ /* Temporarily disable the execution mask while we work with ExecSize=16
+ channels (the mask is set for ExecSize=8 and is probably incorrect).
+ Although this might cause execution of unwanted channels, the code
+ writes only to temporary registers and has no side effects, so
+ disabling the mask is harmless. */
+ brw_push_insn_state( p );
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_ADD( p, wtmp[ 1 ], wtmp[ 0 ], brw_imm_uw( 0xD0BD ) );
+ brw_ADD( p, wtmp[ 2 ], wtmp[ 0 ], brw_imm_uw( 0x9B93 ) );
+ brw_ADD( p, wtmp[ 3 ], wtmp[ 1 ], brw_imm_uw( 0x9B93 ) );
+
+ /* We're now ready to perform the hashing. The eight hashes are
+ interleaved for performance. The hash function used is
+ designed to rapidly achieve avalanche and require only 16x16
+ bit multiplication, and 8-bit swizzles (which we get for
+ free). */
+ for( i = 0; i < 4; i++ )
+ brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0x28D9 ) );
+ for( i = 0; i < 4; i++ )
+ brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+ odd_bytes( wtmp[ i ] ) );
+ for( i = 0; i < 4; i++ )
+ brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0xC6D5 ) );
+ for( i = 0; i < 4; i++ )
+ brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
+ odd_bytes( wtmp[ i ] ) );
+ brw_pop_insn_state( p );
+
+ /* Now we want to initialise the four rear gradients based on the
+ hashes. Format conversion from signed integer to float leaves
+ everything scaled too high by a factor of pow( 2, 15 ), but
+ we correct for that right at the end. */
+ /* x component */
+ brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+ brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
+ brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
+ brw_MOV( p, x1y0, high_words( tmp[ 0 ] ) );
+ brw_MOV( p, x1y1, high_words( tmp[ 1 ] ) );
+
+ brw_push_insn_state( p );
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
+ brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
+ brw_pop_insn_state( p );
+
+ brw_MUL( p, x1y0, x1y0, t );
+ brw_MUL( p, x1y1, x1y1, t );
+ brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+ brw_MUL( p, x0y0, x0y0, param0 );
+ brw_MUL( p, x0y1, x0y1, param0 );
+
+ /* y component */
+ brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+ brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+ brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+ brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+
+ brw_push_insn_state( p );
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
+ brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
+ brw_pop_insn_state( p );
+
+ brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+ brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+ brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
+ brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
+ brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
+
+ brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+ brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+ brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+ brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+
+ /* z component */
+ brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
+ brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
+ brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
+ brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
+
+ brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param2 );
+ brw_MUL( p, tmp[ 5 ], tmp[ 5 ], param2 );
+ brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param2 );
+ brw_MUL( p, tmp[ 7 ], tmp[ 7 ], param2 );
+
+ brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+ brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+ brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+ brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+ /* We interpolate between the gradients using the polynomial
+ 6t^5 - 15t^4 + 10t^3 (Perlin). */
+ brw_MUL( p, xi, param0, brw_imm_f( 6.0 ) );
+ brw_MUL( p, yi, param1, brw_imm_f( 6.0 ) );
+ brw_MUL( p, zi, param2, brw_imm_f( 6.0 ) );
+ brw_ADD( p, xi, xi, brw_imm_f( -15.0 ) );
+ brw_ADD( p, yi, yi, brw_imm_f( -15.0 ) );
+ brw_ADD( p, zi, zi, brw_imm_f( -15.0 ) );
+ brw_MUL( p, xi, xi, param0 );
+ brw_MUL( p, yi, yi, param1 );
+ brw_MUL( p, zi, zi, param2 );
+ brw_ADD( p, xi, xi, brw_imm_f( 10.0 ) );
+ brw_ADD( p, yi, yi, brw_imm_f( 10.0 ) );
+ brw_ADD( p, zi, zi, brw_imm_f( 10.0 ) );
+ brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work */
+ brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work */
+ brw_MUL( p, xi, xi, param0 );
+ brw_MUL( p, yi, yi, param1 );
+ brw_MUL( p, zi, zi, param2 );
+ brw_MUL( p, xi, xi, param0 );
+ brw_MUL( p, yi, yi, param1 );
+ brw_MUL( p, zi, zi, param2 );
+ brw_MUL( p, xi, xi, param0 );
+ brw_MUL( p, yi, yi, param1 );
+ brw_MUL( p, zi, zi, param2 );
+
+ /* Here we interpolate in the y dimension... */
+ brw_MUL( p, x0y1, x0y1, yi );
+ brw_MUL( p, x1y1, x1y1, yi );
+ brw_ADD( p, x0y0, x0y0, x0y1 );
+ brw_ADD( p, x1y0, x1y0, x1y1 );
+
+ /* And now in x. Leave the result in tmp[ 0 ] (see below)... */
+ brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+ brw_MUL( p, x1y0, x1y0, xi );
+ brw_ADD( p, tmp[ 0 ], x0y0, x1y0 );
+
+ /* Now do the same thing for the front four gradients... */
+ /* x component */
+ brw_MOV( p, x0y0, low_words( tmp[ 2 ] ) );
+ brw_MOV( p, x0y1, low_words( tmp[ 3 ] ) );
+ brw_MOV( p, x1y0, high_words( tmp[ 2 ] ) );
+ brw_MOV( p, x1y1, high_words( tmp[ 3 ] ) );
+
+ brw_push_insn_state( p );
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
+ brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
+ brw_pop_insn_state( p );
+
+ brw_MUL( p, x1y0, x1y0, t );
+ brw_MUL( p, x1y1, x1y1, t );
+ brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
+ brw_MUL( p, x0y0, x0y0, param0 );
+ brw_MUL( p, x0y1, x0y1, param0 );
+
+ /* y component */
+ brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+ brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+ brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+ brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+
+ brw_push_insn_state( p );
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
+ brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
+ brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
+ brw_pop_insn_state( p );
+
+ brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+ brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+ brw_ADD( p, t, param2, brw_imm_f( -1.0 ) );
+ brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
+ brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
+
+ brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+ brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+ brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+ brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+
+ /* z component */
+ brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
+ brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
+ brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
+ brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
+
+ brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
+ brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
+ brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
+ brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
+
+ brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
+ brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
+ brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
+ brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
+
+ /* The interpolation coefficients are still around from last time, so
+ again interpolate in the y dimension... */
+ brw_ADD( p, x0y1, x0y1, negate( x0y0 ) );
+ brw_ADD( p, x1y1, x1y1, negate( x1y0 ) );
+ brw_MUL( p, x0y1, x0y1, yi );
+ brw_MUL( p, x1y1, x1y1, yi );
+ brw_ADD( p, x0y0, x0y0, x0y1 );
+ brw_ADD( p, x1y0, x1y0, x1y1 );
+
+ /* And now in x. The rear face is in tmp[ 0 ] (see above), so this
+ time put the front face in tmp[ 1 ] and we're nearly there... */
+ brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
+ brw_MUL( p, x1y0, x1y0, xi );
+ brw_ADD( p, tmp[ 1 ], x0y0, x1y0 );
+
+ /* The final interpolation, in the z dimension: */
+ brw_ADD( p, tmp[ 1 ], tmp[ 1 ], negate( tmp[ 0 ] ) );
+ brw_MUL( p, tmp[ 1 ], tmp[ 1 ], zi );
+ brw_ADD( p, tmp[ 0 ], tmp[ 0 ], tmp[ 1 ] );
+
+ /* scale by pow( 2, -15 ), as described above */
+ brw_MUL( p, param0, tmp[ 0 ], brw_imm_f( 0.000030517578125 ) );
+
+ release_tmps( c, mark );
+}
+
+static void emit_noise3( struct brw_wm_compile *c,
+ struct prog_instruction *inst )
+{
+ struct brw_compile *p = &c->func;
+ struct brw_reg src0, src1, src2, param0, param1, param2, dst;
+ GLuint mask = inst->DstReg.WriteMask;
+ int i;
+ int mark = mark_tmps( c );
+
+ assert( mark == 0 );
+
+ src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
+ src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
+ src2 = get_src_reg( c, inst->SrcReg, 2, 1 );
+
+ param0 = alloc_tmp( c );
+ param1 = alloc_tmp( c );
+ param2 = alloc_tmp( c );
+
+ brw_MOV( p, param0, src0 );
+ brw_MOV( p, param1, src1 );
+ brw_MOV( p, param2, src2 );
+
+ invoke_subroutine( c, SUB_NOISE3, noise3_sub );
+
+ /* Fill in the result: */
+ brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
+ for (i = 0 ; i < 4; i++) {
+ if (mask & (1<<i)) {
+ dst = get_dst_reg(c, inst, i, 1);
+ brw_MOV( p, dst, param0 );
+ }
+ }
+ if( inst->SaturateMode == SATURATE_ZERO_ONE )
+ brw_set_saturate( p, 0 );
+
+ release_tmps( c, mark );
+}
+
static void emit_wpos_xy(struct brw_wm_compile *c,
struct prog_instruction *inst)
{
@@ -1201,8 +1912,8 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
case OPCODE_LRP:
emit_lrp(c, inst);
break;
- case OPCODE_INT:
- emit_int(c, inst);
+ case OPCODE_TRUNC:
+ emit_trunc(c, inst);
break;
case OPCODE_MOV:
emit_mov(c, inst);
@@ -1276,6 +1987,17 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
case OPCODE_MAD:
emit_mad(c, inst);
break;
+ case OPCODE_NOISE1:
+ emit_noise1(c, inst);
+ break;
+ case OPCODE_NOISE2:
+ emit_noise2(c, inst);
+ break;
+ case OPCODE_NOISE3:
+ emit_noise3(c, inst);
+ break;
+ /* case OPCODE_NOISE4: */
+ /* not yet implemented */
case OPCODE_TEX:
emit_tex(c, inst);
break;
@@ -1368,7 +2090,6 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
{
brw_wm_pass_fp(c);
- c->tmp_index = 127;
brw_wm_emit_glsl(brw, c);
c->prog_data.total_grf = c->reg_index;
c->prog_data.total_scratch = 0;
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 7dbc646370d..c9b88b0ae1f 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -30,6 +30,7 @@
#include "intel_decode.h"
#include "intel_reg.h"
#include "intel_bufmgr.h"
+#include "intel_buffers.h"
/* Relocations in kernel space:
* - pass dma buffer seperately
@@ -133,6 +134,9 @@ do_flush_locked(struct intel_batchbuffer *batch,
{
struct intel_context *intel = batch->intel;
int ret = 0;
+ unsigned int num_cliprects = 0;
+ struct drm_clip_rect *cliprects = NULL;
+ int x_off = 0, y_off = 0;
if (batch->buffer)
dri_bo_subdata (batch->buf, 0, used, batch->buffer);
@@ -142,23 +146,21 @@ do_flush_locked(struct intel_batchbuffer *batch,
batch->map = NULL;
batch->ptr = NULL;
- /* Throw away non-effective packets. Won't work once we have
- * hardware contexts which would preserve statechanges beyond a
- * single buffer.
- */
- if (!(intel->numClipRects == 0 &&
- batch->cliprect_mode == LOOP_CLIPRECTS) || intel->no_hw) {
- dri_bo_exec(batch->buf, used,
- intel->pClipRects,
- batch->cliprect_mode != LOOP_CLIPRECTS ?
- 0 : intel->numClipRects,
- (((GLuint) intel->drawX) & 0xffff) |
- (((GLuint) intel->drawY) << 16));
+ if (batch->cliprect_mode == LOOP_CLIPRECTS) {
+ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+ }
+ /* Dispatch the batchbuffer, if it has some effect (nonzero cliprects).
+ * Can't short-circuit like this once we have hardware contexts, but we
+ * should always be in DRI2 mode by then anyway.
+ */
+ if ((batch->cliprect_mode != LOOP_CLIPRECTS ||
+ num_cliprects != 0) && !intel->no_hw) {
+ dri_bo_exec(batch->buf, used, cliprects, num_cliprects,
+ (x_off & 0xffff) | (y_off << 16));
}
- if (intel->numClipRects == 0 &&
- batch->cliprect_mode == LOOP_CLIPRECTS) {
+ if (batch->cliprect_mode == LOOP_CLIPRECTS && num_cliprects == 0) {
if (allow_unlock) {
/* If we are not doing any actual user-visible rendering,
* do a sched_yield to keep the app from pegging the cpu while
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.h b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
index 1f8096b32ec..8129996979f 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.h
@@ -19,6 +19,9 @@ enum cliprect_mode {
/**
* Batchbuffer contents require looping over per cliprect at batch submit
* time.
+ *
+ * This will be upgraded to NO_LOOP_CLIPRECTS when there's a single
+ * constant cliprect, as in DRI2 or FBO rendering.
*/
LOOP_CLIPRECTS,
/**
@@ -29,8 +32,10 @@ enum cliprect_mode {
/**
* Batchbuffer contents contain drawing that already handles cliprects, such
* as 2D drawing to front/back/depth that doesn't respect DRAWING_RECTANGLE.
+ *
* Equivalent behavior to NO_LOOP_CLIPRECTS, but may not persist in batch
- * outside of LOCK/UNLOCK.
+ * outside of LOCK/UNLOCK. This is upgraded to just NO_LOOP_CLIPRECTS when
+ * there's a constant cliprect, as in DRI2 or FBO rendering.
*/
REFERENCES_CLIPRECTS
};
@@ -115,6 +120,11 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
if (intel_batchbuffer_space(batch) < sz)
intel_batchbuffer_flush(batch);
+ if ((cliprect_mode == LOOP_CLIPRECTS ||
+ cliprect_mode == REFERENCES_CLIPRECTS) &&
+ batch->intel->constant_cliprect)
+ cliprect_mode = NO_LOOP_CLIPRECTS;
+
if (cliprect_mode != IGNORE_CLIPRECTS) {
if (batch->cliprect_mode == IGNORE_CLIPRECTS) {
batch->cliprect_mode = cliprect_mode;
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 2917401e023..e1046f4a5de 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -272,24 +272,53 @@ intelEmitCopyBlit(struct intel_context *intel,
GLshort w, GLshort h,
GLenum logic_op)
{
- GLuint CMD, BR13;
+ GLuint CMD, BR13, pass = 0;
int dst_y2 = dst_y + h;
int dst_x2 = dst_x + w;
dri_bo *aper_array[3];
BATCH_LOCALS;
/* do space/cliprects check before going any further */
- intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
- again:
- aper_array[0] = intel->batch->buf;
- aper_array[1] = dst_buffer;
- aper_array[2] = src_buffer;
-
- if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
- intel_batchbuffer_flush(intel->batch);
- goto again;
+ do {
+ aper_array[0] = intel->batch->buf;
+ aper_array[1] = dst_buffer;
+ aper_array[2] = src_buffer;
+
+ if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
+ intel_batchbuffer_flush(intel->batch);
+ pass++;
+ } else
+ break;
+ } while (pass < 2);
+
+ if (pass >= 2) {
+ GLboolean locked = GL_FALSE;
+ if (!intel->locked) {
+ LOCK_HARDWARE(intel);
+ locked = GL_TRUE;
+ }
+
+ dri_bo_map(dst_buffer, GL_TRUE);
+ dri_bo_map(src_buffer, GL_FALSE);
+ _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
+ cpp,
+ dst_pitch,
+ dst_x, dst_y,
+ w, h,
+ (GLubyte *)src_buffer->virtual + src_offset,
+ src_pitch,
+ src_x, src_y);
+
+ dri_bo_unmap(src_buffer);
+ dri_bo_unmap(dst_buffer);
+
+ if (locked)
+ UNLOCK_HARDWARE(intel);
+
+ return;
}
+ intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
__FUNCTION__,
src_buffer, src_pitch, src_offset, src_x, src_y,
@@ -393,6 +422,9 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
struct gl_framebuffer *fb = ctx->DrawBuffer;
GLuint clear_depth;
GLbitfield skipBuffers = 0;
+ unsigned int num_cliprects;
+ struct drm_clip_rect *cliprects;
+ int x_off, y_off;
BATCH_LOCALS;
/*
@@ -417,7 +449,8 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
intelFlush(&intel->ctx);
LOCK_HARDWARE(intel);
- if (intel->numClipRects) {
+ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
+ if (num_cliprects) {
GLint cx, cy, cw, ch;
drm_clip_rect_t clear;
int i;
@@ -432,15 +465,15 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
/* clearing a window */
/* flip top to bottom */
- clear.x1 = cx + intel->drawX;
+ clear.x1 = cx + x_off;
clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
clear.x2 = clear.x1 + cw;
clear.y2 = clear.y1 + ch;
}
else {
/* clearing FBO */
- assert(intel->numClipRects == 1);
- assert(intel->pClipRects == &intel->fboRect);
+ assert(num_cliprects == 1);
+ assert(cliprects == &intel->fboRect);
clear.x1 = cx;
clear.y1 = cy;
clear.x2 = clear.x1 + cw;
@@ -448,8 +481,8 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
/* no change to mask */
}
- for (i = 0; i < intel->numClipRects; i++) {
- const drm_clip_rect_t *box = &intel->pClipRects[i];
+ for (i = 0; i < num_cliprects; i++) {
+ const drm_clip_rect_t *box = &cliprects[i];
drm_clip_rect_t b;
GLuint buf;
GLuint clearMask = mask; /* use copy, since we modify it below */
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index f5eaf765f38..f8f009c6a30 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -123,99 +123,40 @@ intel_readbuf_region(struct intel_context *intel)
return NULL;
}
-
-
-/**
- * Update the following fields for rendering to a user-created FBO:
- * intel->numClipRects
- * intel->pClipRects
- * intel->drawX
- * intel->drawY
- */
-static void
-intelSetRenderbufferClipRects(struct intel_context *intel)
-{
- /* If the batch contents require looping over cliprects, flush them before
- * we go changing which cliprects get referenced when that happens.
- */
- if (intel->batch->cliprect_mode == LOOP_CLIPRECTS &&
- (intel->fboRect.x2 != intel->ctx.DrawBuffer->Width ||
- intel->fboRect.x2 != intel->ctx.DrawBuffer->Height))
- intel_batchbuffer_flush(intel->batch);
-
- assert(intel->ctx.DrawBuffer->Width > 0);
- assert(intel->ctx.DrawBuffer->Height > 0);
- intel->fboRect.x1 = 0;
- intel->fboRect.y1 = 0;
- intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
- intel->fboRect.y2 = intel->ctx.DrawBuffer->Height;
- intel->numClipRects = 1;
- intel->pClipRects = &intel->fboRect;
- intel->drawX = 0;
- intel->drawY = 0;
-}
-
-
-/**
- * As above, but for rendering to front buffer of a window.
- * \sa intelSetRenderbufferClipRects
- */
-static void
-intelSetFrontClipRects(struct intel_context *intel)
-{
- __DRIdrawablePrivate *dPriv = intel->driDrawable;
-
- if (!dPriv)
- return;
-
- /* If the batch contents require looping over cliprects, flush them before
- * we go changing which cliprects get referenced when that happens.
- */
- if (intel->batch->cliprect_mode == LOOP_CLIPRECTS &&
- intel->pClipRects != dPriv->pClipRects)
- intel_batchbuffer_flush(intel->batch);
- intel->numClipRects = dPriv->numClipRects;
- intel->pClipRects = dPriv->pClipRects;
- intel->drawX = dPriv->x;
- intel->drawY = dPriv->y;
-}
-
-
-/**
- * As above, but for rendering to back buffer of a window.
- */
-static void
-intelSetBackClipRects(struct intel_context *intel)
+void
+intel_get_cliprects(struct intel_context *intel,
+ struct drm_clip_rect **cliprects,
+ unsigned int *num_cliprects,
+ int *x_off, int *y_off)
{
__DRIdrawablePrivate *dPriv = intel->driDrawable;
- struct intel_framebuffer *intel_fb;
-
- if (!dPriv)
- return;
-
- intel_fb = dPriv->driverPrivate;
+ struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
- if (intel_fb->pf_active || dPriv->numBackClipRects == 0) {
+ if (intel->constant_cliprect) {
+ /* FBO or DRI2 rendering, which can just use the fb's size. */
+ intel->fboRect.x1 = 0;
+ intel->fboRect.y1 = 0;
+ intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
+ intel->fboRect.y2 = intel->ctx.DrawBuffer->Height;
+
+ *cliprects = &intel->fboRect;
+ *num_cliprects = 1;
+ *x_off = 0;
+ *y_off = 0;
+ } else if (intel->front_cliprects ||
+ intel_fb->pf_active || dPriv->numBackClipRects == 0) {
/* use the front clip rects */
- if (intel->batch->cliprect_mode == LOOP_CLIPRECTS &&
- intel->pClipRects != dPriv->pClipRects)
- intel_batchbuffer_flush(intel->batch);
-
- intel->numClipRects = dPriv->numClipRects;
- intel->pClipRects = dPriv->pClipRects;
- intel->drawX = dPriv->x;
- intel->drawY = dPriv->y;
+ *cliprects = dPriv->pClipRects;
+ *num_cliprects = dPriv->numClipRects;
+ *x_off = dPriv->x;
+ *y_off = dPriv->y;
}
else {
/* use the back clip rects */
- if (intel->batch->cliprect_mode == LOOP_CLIPRECTS &&
- intel->pClipRects != dPriv->pBackClipRects)
- intel_batchbuffer_flush(intel->batch);
-
- intel->numClipRects = dPriv->numBackClipRects;
- intel->pClipRects = dPriv->pBackClipRects;
- intel->drawX = dPriv->backX;
- intel->drawY = dPriv->backY;
+ *num_cliprects = dPriv->numBackClipRects;
+ *cliprects = dPriv->pBackClipRects;
+ *x_off = dPriv->backX;
+ *y_off = dPriv->backY;
}
}
@@ -300,29 +241,6 @@ intelWindowMoved(struct intel_context *intel)
__DRIdrawablePrivate *dPriv = intel->driDrawable;
struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
- if (!intel->ctx.DrawBuffer) {
- /* when would this happen? -BP */
- intelSetFrontClipRects(intel);
- }
- else if (intel->ctx.DrawBuffer->Name != 0) {
- /* drawing to user-created FBO - do nothing */
- /* Cliprects would be set from intelDrawBuffer() */
- }
- else {
- /* drawing to a window */
- switch (intel_fb->Base._ColorDrawBufferIndexes[0]) {
- case BUFFER_FRONT_LEFT:
- intelSetFrontClipRects(intel);
- break;
- case BUFFER_BACK_LEFT:
- intelSetBackClipRects(intel);
- break;
- default:
- intelSetFrontClipRects(intel);
- }
-
- }
-
if (!intel->intelScreen->driScrnPriv->dri2.enabled &&
intel->intelScreen->driScrnPriv->ddx_version.minor >= 7) {
volatile struct drm_i915_sarea *sarea = intel->sarea;
@@ -894,7 +812,6 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
struct intel_context *intel = intel_context(ctx);
struct intel_region *colorRegions[MAX_DRAW_BUFFERS], *depthRegion = NULL;
struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
- int front = 0; /* drawing to front color buffer? */
if (!fb) {
/* this can happen during the initial context initialization */
@@ -927,52 +844,44 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
*/
if (fb->_NumColorDrawBuffers == 0) {
/* writing to 0 */
- FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE);
colorRegions[0] = NULL;
-
- if (fb->Name != 0)
- intelSetRenderbufferClipRects(intel);
+ intel->constant_cliprect = GL_TRUE;
} else if (fb->_NumColorDrawBuffers > 1) {
int i;
struct intel_renderbuffer *irb;
- FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE);
- if (fb->Name != 0)
- intelSetRenderbufferClipRects(intel);
for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]);
- colorRegions[i] = (irb && irb->region) ? irb->region : NULL;
+ colorRegions[i] = irb ? irb->region : NULL;
}
+ intel->constant_cliprect = GL_TRUE;
}
else {
- /* draw to exactly one color buffer */
- /*_mesa_debug(ctx, "Hardware rendering\n");*/
- FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE);
- if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
- front = 1;
- }
-
- /*
- * Get the intel_renderbuffer for the colorbuffer we're drawing into.
- * And set up cliprects.
+ /* Get the intel_renderbuffer for the single colorbuffer we're drawing
+ * into, and set up cliprects if it's .
*/
if (fb->Name == 0) {
+ intel->constant_cliprect = intel->driScreen->dri2.enabled;
/* drawing to window system buffer */
- if (front) {
- intelSetFrontClipRects(intel);
+ if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
+ if (!intel->constant_cliprect && !intel->front_cliprects)
+ intel_batchbuffer_flush(intel->batch);
+ intel->front_cliprects = GL_TRUE;
colorRegions[0] = intel_get_rb_region(fb, BUFFER_FRONT_LEFT);
}
else {
- intelSetBackClipRects(intel);
+ if (!intel->constant_cliprect && intel->front_cliprects)
+ intel_batchbuffer_flush(intel->batch);
+ intel->front_cliprects = GL_FALSE;
colorRegions[0]= intel_get_rb_region(fb, BUFFER_BACK_LEFT);
}
}
else {
/* drawing to user-created FBO */
struct intel_renderbuffer *irb;
- intelSetRenderbufferClipRects(intel);
irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]);
colorRegions[0] = (irb && irb->region) ? irb->region : NULL;
+ intel->constant_cliprect = GL_TRUE;
}
}
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.h b/src/mesa/drivers/dri/intel/intel_buffers.h
index a669a854317..e5afb37dd1a 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.h
+++ b/src/mesa/drivers/dri/intel/intel_buffers.h
@@ -29,6 +29,8 @@
#ifndef INTEL_BUFFERS_H
#define INTEL_BUFFERS_H
+#include "dri_util.h"
+#include "drm.h"
struct intel_context;
struct intel_framebuffer;
@@ -53,4 +55,9 @@ extern void intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb);
extern void intelInitBufferFuncs(struct dd_function_table *functions);
+void intel_get_cliprects(struct intel_context *intel,
+ struct drm_clip_rect **cliprects,
+ unsigned int *num_cliprects,
+ int *x_off, int *y_off);
+
#endif /* INTEL_BUFFERS_H */
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h b/src/mesa/drivers/dri/intel/intel_chipset.h
index 170efd060ae..d1b4941601e 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -68,11 +68,12 @@
devid == PCI_CHIP_I965_GME || \
devid == PCI_CHIP_GM45_GM)
-#define IS_GM45_GM(devid) (devid == PCI_CHIP_GM45_GM)
-#define IS_G4X(devid) (devid == PCI_CHIP_IGD_E_G || \
+#define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \
devid == PCI_CHIP_Q45_G || \
devid == PCI_CHIP_G45_G || \
devid == PCI_CHIP_G41_G)
+#define IS_GM45(devid) (devid == PCI_CHIP_GM45_GM)
+#define IS_G4X(devid) (IS_G45(devid) || IS_GM45(devid))
#define IS_915(devid) (devid == PCI_CHIP_I915_G || \
devid == PCI_CHIP_E7221_G || \
@@ -91,7 +92,6 @@
devid == PCI_CHIP_I965_GM || \
devid == PCI_CHIP_I965_GME || \
devid == PCI_CHIP_I946_GZ || \
- IS_GM45_GM(devid) || \
IS_G4X(devid))
#define IS_9XX(devid) (IS_915(devid) || \
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 2b3a9b9d371..9ac18e69609 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -588,9 +588,6 @@ intelInitContext(struct intel_context *intel,
intel->driFd = sPriv->fd;
intel->driHwLock = sPriv->lock;
- intel->width = intelScreen->width;
- intel->height = intelScreen->height;
-
driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
intel->driScreen->myNum,
IS_965(intelScreen->deviceID) ? "i965" : "i915");
@@ -932,38 +929,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)
sarea->ctxOwner, intel->hHWContext);
}
- if (sarea->width != intel->width || sarea->height != intel->height) {
- int numClipRects = intel->numClipRects;
-
- /*
- * FIXME: Really only need to do this when drawing to a
- * common back- or front buffer.
- */
-
- /*
- * This will essentially drop the outstanding batchbuffer on
- * the floor.
- */
- intel->numClipRects = 0;
-
- if (intel->Fallback)
- _swrast_flush(&intel->ctx);
-
- if (!IS_965(intel->intelScreen->deviceID))
- INTEL_FIREVERTICES(intel);
-
- if (intel->batch->map != intel->batch->ptr)
- intel_batchbuffer_flush(intel->batch);
-
- intel->numClipRects = numClipRects;
-
- /* force window update */
- intel->lastStamp = 0;
-
- intel->width = sarea->width;
- intel->height = sarea->height;
- }
-
/* Drawable changed?
*/
if (dPriv && intel->lastStamp != dPriv->lastStamp) {
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 554159ac441..3938af4c72c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -235,10 +235,18 @@ struct intel_context
/* These refer to the current drawing buffer:
*/
- int drawX, drawY; /**< origin of drawing area within region */
- GLuint numClipRects; /**< cliprects for drawing */
- drm_clip_rect_t *pClipRects;
struct gl_texture_object *frame_buffer_texobj;
+ /**
+ * Set to true if a single constant cliprect should be used in the
+ * batchbuffer. Otherwise, cliprects must be calculated at batchbuffer
+ * flush time while the lock is held.
+ */
+ GLboolean constant_cliprect;
+ /**
+ * In !constant_cliprect mode, set to true if the front cliprects should be
+ * used instead of back.
+ */
+ GLboolean front_cliprects;
drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
int perf_boxes;
@@ -271,10 +279,6 @@ struct intel_context
*/
driOptionCache optionCache;
- /* Last seen width/height of the screen */
- int width;
- int height;
-
int64_t swap_ust;
int64_t swap_missed_ust;
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 89635198931..0565197ea08 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -191,11 +191,7 @@ do_blit_bitmap( GLcontext *ctx,
color8888 = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1], ubcolor[2], ubcolor[3]);
color565 = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]);
- /* Does zoom apply to bitmaps?
- */
- if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F) ||
- ctx->Pixel.ZoomX != 1.0F ||
- ctx->Pixel.ZoomY != 1.0F)
+ if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))
return GL_FALSE;
LOCK_HARDWARE(intel);
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_draw.c b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
index 50518a68792..8ebbc95a1d0 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_draw.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_draw.c
@@ -75,19 +75,21 @@ intel_texture_drawpixels(GLcontext * ctx,
/* We're going to mess with texturing with no regard to existing texture
* state, so if there is some set up we have to bail.
*/
- if (ctx->Texture._EnabledUnits != 0)
+ if (ctx->Texture._EnabledUnits != 0) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "glDrawPixels() fallback: texturing enabled\n");
return GL_FALSE;
+ }
/* Can't do textured DrawPixels with a fragment program, unless we were
* to generate a new program that sampled our texture and put the results
* in the fragment color before the user's program started.
*/
- if (ctx->FragmentProgram.Enabled)
- return GL_FALSE;
-
- /* Don't even want to think about it */
- if (format == GL_COLOR_INDEX)
+ if (ctx->FragmentProgram.Enabled) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "glDrawPixels() fallback: fragment program enabled\n");
return GL_FALSE;
+ }
/* We don't have a way to generate fragments with stencil values which *
* will set the resulting stencil value.
@@ -108,8 +110,12 @@ intel_texture_drawpixels(GLcontext * ctx,
* the color buffer, and sample the texture values into the fragment depth
* in a program.
*/
- if (format == GL_DEPTH_COMPONENT)
+ if (format == GL_DEPTH_COMPONENT) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr,
+ "glDrawPixels() fallback: format == GL_DEPTH_COMPONENT\n");
return GL_FALSE;
+ }
_mesa_PushAttrib(GL_ENABLE_BIT | GL_TRANSFORM_BIT | GL_TEXTURE_BIT |
GL_CURRENT_BIT);
@@ -141,22 +147,27 @@ intel_texture_drawpixels(GLcontext * ctx,
_mesa_PushMatrix();
_mesa_LoadIdentity();
+ /* Create the vertex buffer based on the current raster pos. The x and y
+ * we're handed are ctx->Current.RasterPos[0,1] rounded to integers.
+ * We also apply the depth. However, the W component is already multiplied
+ * into ctx->Current.RasterPos[0,1,2] and we can ignore it at this point.
+ */
vertices[0][0] = x;
vertices[0][1] = y;
vertices[0][2] = ctx->Current.RasterPos[2];
- vertices[0][3] = ctx->Current.RasterPos[3];
+ vertices[0][3] = 1.0;
vertices[1][0] = x + width * ctx->Pixel.ZoomX;
vertices[1][1] = y;
vertices[1][2] = ctx->Current.RasterPos[2];
- vertices[1][3] = ctx->Current.RasterPos[3];
+ vertices[1][3] = 1.0;
vertices[2][0] = x + width * ctx->Pixel.ZoomX;
vertices[2][1] = y + height * ctx->Pixel.ZoomY;
vertices[2][2] = ctx->Current.RasterPos[2];
- vertices[2][3] = ctx->Current.RasterPos[3];
+ vertices[2][3] = 1.0;
vertices[3][0] = x;
vertices[3][1] = y + height * ctx->Pixel.ZoomY;
vertices[3][2] = ctx->Current.RasterPos[2];
- vertices[3][3] = ctx->Current.RasterPos[3];
+ vertices[3][3] = 1.0;
texcoords[0][0] = 0.0;
texcoords[0][1] = 0.0;
@@ -212,8 +223,12 @@ intel_stencil_drawpixels(GLcontext * ctx,
return GL_TRUE;
/* Can't do a per-bit writemask while treating stencil as rgba data. */
- if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff)
+ if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+ "stencil mask enabled\n");
return GL_FALSE;
+ }
/* We use FBOs for our wrapping of the depthbuffer into a color
* destination.
@@ -224,21 +239,29 @@ intel_stencil_drawpixels(GLcontext * ctx,
/* We're going to mess with texturing with no regard to existing texture
* state, so if there is some set up we have to bail.
*/
- if (ctx->Texture._EnabledUnits != 0)
+ if (ctx->Texture._EnabledUnits != 0) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+ "texturing enabled\n");
return GL_FALSE;
+ }
/* Can't do textured DrawPixels with a fragment program, unless we were
* to generate a new program that sampled our texture and put the results
* in the fragment color before the user's program started.
*/
- if (ctx->FragmentProgram.Enabled)
+ if (ctx->FragmentProgram.Enabled) {
+ if (INTEL_DEBUG & DEBUG_FALLBACKS)
+ fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
+ "fragment program enabled\n");
return GL_FALSE;
+ }
/* Check that we can load in a texture this big. */
if (width > (1 << (ctx->Const.MaxTextureLevels - 1)) ||
height > (1 << (ctx->Const.MaxTextureLevels - 1))) {
if (INTEL_DEBUG & DEBUG_FALLBACKS)
- fprintf(stderr, "glDrawPixels(STENCIL_IDNEX) fallback: "
+ fprintf(stderr, "glDrawPixels(STENCIL_INDEX) fallback: "
"bitmap too large (%dx%d)\n",
width, height);
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index c21f4080935..81a7386e429 100644
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -29,6 +29,8 @@
#define CMD_2D (0x2 << 29)
#define CMD_3D (0x3 << 29)
+#define MI_NOOP (CMD_MI | 0)
+
#define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23)
#define MI_FLUSH (CMD_MI | (4 << 23))
@@ -44,6 +46,9 @@
#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16))
#define I1_LOAD_S(n) (1<<(4+n))
+#define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3)
+#define _3DSTATE_DRAWRECT_INFO_I965 (CMD_3D | (3 << 27) | (1 << 24) | 0x2)
+
/** @{
*
* PIPE_CONTROL operation, a combination MI_FLUSH and register write with
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index 45faf64c713..8dbcc3050ee 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -79,30 +79,6 @@ intel_region_unmap(struct intel_context *intel, struct intel_region *region)
}
}
-static int
-intel_set_region_tiling_gem(struct intel_context *intel,
- struct intel_region *region,
- uint32_t bo_handle)
-{
- struct drm_i915_gem_get_tiling get_tiling;
- int ret;
-
- memset(&get_tiling, 0, sizeof(get_tiling));
-
- get_tiling.handle = bo_handle;
- ret = ioctl(intel->driFd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling);
- if (ret != 0) {
- fprintf(stderr, "Failed to get tiling state for region: %s\n",
- strerror(errno));
- return ret;
- }
-
- region->tiling = get_tiling.tiling_mode;
- region->bit_6_swizzle = get_tiling.swizzle_mode;
-
- return 0;
-}
-
static struct intel_region *
intel_region_alloc_internal(struct intel_context *intel,
GLuint cpp,
@@ -151,6 +127,7 @@ intel_region_alloc_for_handle(struct intel_context *intel,
{
struct intel_region *region;
dri_bo *buffer;
+ int ret;
buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle);
@@ -159,7 +136,14 @@ intel_region_alloc_for_handle(struct intel_context *intel,
if (region == NULL)
return region;
- intel_set_region_tiling_gem(intel, region, handle);
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
+ }
return region;
}
@@ -489,7 +473,14 @@ intel_recreate_static(struct intel_context *intel,
name,
region_desc->bo_handle);
- intel_set_region_tiling_gem(intel, region, region_desc->bo_handle);
+ ret = dri_bo_get_tiling(region->buffer, &region->tiling,
+ &region->bit_6_swizzle);
+ if (ret != 0) {
+ fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
+ region_desc->bo_handle, name, strerror(-ret));
+ intel_region_release(&region);
+ return NULL;
+ }
} else {
if (region->classic_map != NULL) {
drmUnmap(region->classic_map,
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 8e2b4456f81..8f4e681ffea 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -30,6 +30,7 @@
#include "main/mtypes.h"
#include "main/colormac.h"
+#include "intel_buffers.h"
#include "intel_fbo.h"
#include "intel_screen.h"
#include "intel_span.h"
@@ -131,12 +132,8 @@ pwrite_8(struct intel_renderbuffer *irb, uint32_t offset, uint8_t val)
}
static uint32_t no_tile_swizzle(struct intel_renderbuffer *irb,
- struct intel_context *intel,
int x, int y)
{
- x += intel->drawX;
- y += intel->drawY;
-
return (y * irb->region->pitch + x) * irb->region->cpp;
}
@@ -145,7 +142,6 @@ static uint32_t no_tile_swizzle(struct intel_renderbuffer *irb,
*/
static uint32_t x_tile_swizzle(struct intel_renderbuffer *irb,
- struct intel_context *intel,
int x, int y)
{
int tile_stride;
@@ -155,9 +151,6 @@ static uint32_t x_tile_swizzle(struct intel_renderbuffer *irb,
int tile_off, tile_base;
tile_stride = (irb->pfPitch * irb->region->cpp) << 3;
-
- x += intel->drawX;
- y += intel->drawY;
xbyte = x * irb->region->cpp;
@@ -204,7 +197,6 @@ static uint32_t x_tile_swizzle(struct intel_renderbuffer *irb,
}
static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
- struct intel_context *intel,
int x, int y)
{
int tile_stride;
@@ -214,9 +206,6 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
int tile_off, tile_base;
tile_stride = (irb->pfPitch * irb->region->cpp) << 5;
-
- x += intel->drawX;
- y += intel->drawY;
xbyte = x * irb->region->cpp;
@@ -268,8 +257,12 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
const GLint yScale = irb->RenderToTexture ? 1 : -1; \
const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1; \
+ unsigned int num_cliprects; \
+ struct drm_clip_rect *cliprects; \
+ int x_off, y_off; \
GLuint p; \
- (void) p;
+ (void) p; \
+ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
/* XXX FBO: this is identical to the macro in spantmp2.h except we get
* the cliprect info from the context, not the driDrawable.
@@ -277,12 +270,12 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
*/
#define HW_CLIPLOOP() \
do { \
- int _nc = intel->numClipRects; \
+ int _nc = num_cliprects; \
while ( _nc-- ) { \
- int minx = intel->pClipRects[_nc].x1 - intel->drawX; \
- int miny = intel->pClipRects[_nc].y1 - intel->drawY; \
- int maxx = intel->pClipRects[_nc].x2 - intel->drawX; \
- int maxy = intel->pClipRects[_nc].y2 - intel->drawY;
+ int minx = cliprects[_nc].x1 - x_off; \
+ int miny = cliprects[_nc].y1 - y_off; \
+ int maxx = cliprects[_nc].x2 - x_off; \
+ int maxy = cliprects[_nc].y2 - y_off;
#if 0
}}
@@ -295,6 +288,11 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define HW_UNLOCK()
+/* Convenience macros to avoid typing the swizzle argument over and over */
+#define NO_TILE(_X, _Y) no_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+#define X_TILE(_X, _Y) x_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+#define Y_TILE(_X, _Y) y_tile_swizzle(irb, (_X) + x_off, (_Y) + y_off)
+
/* 16 bit, RGB565 color spanline and pixel functions
*/
#define SPANTMP_PIXEL_FMT GL_RGB
@@ -302,8 +300,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel##x##_RGB565
#define TAG2(x,y) intel##x##_RGB565##y
-#define GET_VALUE(X, Y) pread_16(irb, no_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_16(irb, no_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_16(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, NO_TILE(X, Y), V)
#include "spantmp2.h"
/* 32 bit, ARGB8888 color spanline and pixel functions
@@ -313,8 +311,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel##x##_ARGB8888
#define TAG2(x,y) intel##x##_ARGB8888##y
-#define GET_VALUE(X, Y) pread_32(irb, no_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_32(irb, no_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_32(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, NO_TILE(X, Y), V)
#include "spantmp2.h"
/* 32 bit, xRGB8888 color spanline and pixel functions
@@ -324,8 +322,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel##x##_xRGB8888
#define TAG2(x,y) intel##x##_xRGB8888##y
-#define GET_VALUE(X, Y) pread_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, no_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, NO_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, NO_TILE(X, Y), V)
#include "spantmp2.h"
/* 16 bit RGB565 color tile spanline and pixel functions
@@ -336,8 +334,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_XTile_##x##_RGB565
#define TAG2(x,y) intel_XTile_##x##_RGB565##y
-#define GET_VALUE(X, Y) pread_16(irb, x_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_16(irb, x_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_16(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, X_TILE(X, Y), V)
#include "spantmp2.h"
#define SPANTMP_PIXEL_FMT GL_RGB
@@ -345,8 +343,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_YTile_##x##_RGB565
#define TAG2(x,y) intel_YTile_##x##_RGB565##y
-#define GET_VALUE(X, Y) pread_16(irb, y_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_16(irb, y_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_16(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_16(irb, Y_TILE(X, Y), V)
#include "spantmp2.h"
/* 32 bit ARGB888 color tile spanline and pixel functions
@@ -357,8 +355,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_XTile_##x##_ARGB8888
#define TAG2(x,y) intel_XTile_##x##_ARGB8888##y
-#define GET_VALUE(X, Y) pread_32(irb, x_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_32(irb, x_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_32(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, X_TILE(X, Y), V)
#include "spantmp2.h"
#define SPANTMP_PIXEL_FMT GL_BGRA
@@ -366,8 +364,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_YTile_##x##_ARGB8888
#define TAG2(x,y) intel_YTile_##x##_ARGB8888##y
-#define GET_VALUE(X, Y) pread_32(irb, y_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_32(irb, y_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_32(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_32(irb, Y_TILE(X, Y), V)
#include "spantmp2.h"
/* 32 bit xRGB888 color tile spanline and pixel functions
@@ -378,8 +376,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_XTile_##x##_xRGB8888
#define TAG2(x,y) intel_XTile_##x##_xRGB8888##y
-#define GET_VALUE(X, Y) pread_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, x_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, X_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, X_TILE(X, Y), V)
#include "spantmp2.h"
#define SPANTMP_PIXEL_FMT GL_BGRA
@@ -387,15 +385,19 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
#define TAG(x) intel_YTile_##x##_xRGB8888
#define TAG2(x,y) intel_YTile_##x##_xRGB8888##y
-#define GET_VALUE(X, Y) pread_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y))
-#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, y_tile_swizzle(irb, intel, X, Y), V)
+#define GET_VALUE(X, Y) pread_xrgb8888(irb, Y_TILE(X, Y))
+#define PUT_VALUE(X, Y, V) pwrite_xrgb8888(irb, Y_TILE(X, Y), V)
#include "spantmp2.h"
#define LOCAL_DEPTH_VARS \
struct intel_context *intel = intel_context(ctx); \
struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
const GLint yScale = irb->RenderToTexture ? 1 : -1; \
- const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1;
+ const GLint yBias = irb->RenderToTexture ? 0 : irb->Base.Height - 1; \
+ unsigned int num_cliprects; \
+ struct drm_clip_rect *cliprects; \
+ int x_off, y_off; \
+ intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
#define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
@@ -404,10 +406,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
** 16-bit depthbuffer functions.
**/
#define VALUE_TYPE GLushort
-#define WRITE_DEPTH(_x, _y, d) \
- pwrite_16(irb, no_tile_swizzle(irb, intel, _x, _y), d)
-#define READ_DEPTH(d, _x, _y) \
- d = pread_16(irb, no_tile_swizzle(irb, intel, _x, _y))
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, NO_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, NO_TILE(_x, _y))
#define TAG(x) intel##x##_z16
#include "depthtmp.h"
@@ -416,10 +416,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
** 16-bit x tile depthbuffer functions.
**/
#define VALUE_TYPE GLushort
-#define WRITE_DEPTH(_x, _y, d) \
- pwrite_16(irb, x_tile_swizzle(irb, intel, _x, _y), d)
-#define READ_DEPTH(d, _x, _y) \
- d = pread_16(irb, x_tile_swizzle(irb, intel, _x, _y))
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, X_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, X_TILE(_x, _y))
#define TAG(x) intel_XTile_##x##_z16
#include "depthtmp.h"
@@ -427,10 +425,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
** 16-bit y tile depthbuffer functions.
**/
#define VALUE_TYPE GLushort
-#define WRITE_DEPTH(_x, _y, d) \
- pwrite_16(irb, y_tile_swizzle(irb, intel, _x, _y), d)
-#define READ_DEPTH(d, _x, _y) \
- d = pread_16(irb, y_tile_swizzle(irb, intel, _x, _y))
+#define WRITE_DEPTH(_x, _y, d) pwrite_16(irb, Y_TILE(_x, _y), d)
+#define READ_DEPTH(d, _x, _y) d = pread_16(irb, Y_TILE(_x, _y))
#define TAG(x) intel_YTile_##x##_z16
#include "depthtmp.h"
@@ -445,12 +441,11 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
/* Change ZZZS -> SZZZ */
#define WRITE_DEPTH(_x, _y, d) \
- pwrite_32(irb, no_tile_swizzle(irb, intel, _x, _y), \
- ((d) >> 8) | ((d) << 24))
+ pwrite_32(irb, NO_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
/* Change SZZZ -> ZZZS */
#define READ_DEPTH( d, _x, _y ) { \
- GLuint tmp = pread_32(irb, no_tile_swizzle(irb, intel, _x, _y)); \
+ GLuint tmp = pread_32(irb, NO_TILE(_x, _y)); \
d = (tmp << 8) | (tmp >> 24); \
}
@@ -468,12 +463,11 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
/* Change ZZZS -> SZZZ */
#define WRITE_DEPTH(_x, _y, d) \
- pwrite_32(irb, x_tile_swizzle(irb, intel, _x, _y), \
- ((d) >> 8) | ((d) << 24)) \
+ pwrite_32(irb, X_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
/* Change SZZZ -> ZZZS */
#define READ_DEPTH( d, _x, _y ) { \
- GLuint tmp = pread_32(irb, x_tile_swizzle(irb, intel, _x, _y)); \
+ GLuint tmp = pread_32(irb, X_TILE(_x, _y)); \
d = (tmp << 8) | (tmp >> 24); \
}
@@ -490,12 +484,11 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
/* Change ZZZS -> SZZZ */
#define WRITE_DEPTH(_x, _y, d) \
- pwrite_32(irb, y_tile_swizzle(irb, intel, _x, _y), \
- ((d) >> 8) | ((d) << 24))
+ pwrite_32(irb, Y_TILE(_x, _y), ((d) >> 8) | ((d) << 24))
/* Change SZZZ -> ZZZS */
#define READ_DEPTH( d, _x, _y ) { \
- GLuint tmp = pread_32(irb, y_tile_swizzle(irb, intel, _x, _y)); \
+ GLuint tmp = pread_32(irb, Y_TILE(_x, _y)); \
d = (tmp << 8) | (tmp >> 24); \
}
@@ -506,36 +499,24 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb,
/**
** 8-bit stencil function (XXX FBO: This is obsolete)
**/
-#define WRITE_STENCIL(_x, _y, d) \
- pwrite_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3, d)
-
-#define READ_STENCIL(d, _x, _y) \
- d = pread_8(irb, no_tile_swizzle(irb, intel, _x, _y) + 3);
-
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, NO_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, NO_TILE(_x, _y) + 3);
#define TAG(x) intel##x##_z24_s8
#include "stenciltmp.h"
/**
** 8-bit x-tile stencil function (XXX FBO: This is obsolete)
**/
-#define WRITE_STENCIL(_x, _y, d) \
- pwrite_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3, d)
-
-#define READ_STENCIL(d, _x, _y) \
- d = pread_8(irb, x_tile_swizzle(irb, intel, _x, _y) + 3);
-
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, X_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, X_TILE(_x, _y) + 3);
#define TAG(x) intel_XTile_##x##_z24_s8
#include "stenciltmp.h"
/**
** 8-bit y-tile stencil function (XXX FBO: This is obsolete)
**/
-#define WRITE_STENCIL(_x, _y, d) \
- pwrite_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3, d)
-
-#define READ_STENCIL(d, _x, _y) \
- d = pread_8(irb, y_tile_swizzle(irb, intel, _x, _y) + 3)
-
+#define WRITE_STENCIL(_x, _y, d) pwrite_8(irb, Y_TILE(_x, _y) + 3, d)
+#define READ_STENCIL(d, _x, _y) d = pread_8(irb, Y_TILE(_x, _y) + 3)
#define TAG(x) intel_YTile_##x##_z24_s8
#include "stenciltmp.h"
@@ -602,14 +583,10 @@ intel_map_unmap_buffers(struct intel_context *intel, GLboolean map)
if (tex) {
/* render to texture */
ASSERT(att->Renderbuffer);
- if (map) {
- struct gl_texture_image *texImg;
- texImg = tex->Image[att->CubeMapFace][att->TextureLevel];
+ if (map)
intel_tex_map_images(intel, intel_texture_object(tex));
- }
- else {
+ else
intel_tex_unmap_images(intel, intel_texture_object(tex));
- }
}
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 05107dd2ada..5f32dd575e3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -900,7 +900,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
/* these chips don't use tiled z without hyperz. So always pretend
we have set up a surface which will cause linear reads/writes */
- ((screen->chip_family & RADEON_CLASS_R100) &&
+ (IS_R100_CLASS(screen) &&
!(screen->chip_flags & RADEON_CHIPSET_TCL));
if ( dri_priv->textureSize == 0 ) {
diff --git a/src/mesa/drivers/glslcompiler/glslcompiler.c b/src/mesa/drivers/glslcompiler/glslcompiler.c
index 62a366858c4..34cce977c86 100644
--- a/src/mesa/drivers/glslcompiler/glslcompiler.c
+++ b/src/mesa/drivers/glslcompiler/glslcompiler.c
@@ -226,12 +226,8 @@ PrintShaderInstructions(GLuint shader, FILE *f)
{
GET_CURRENT_CONTEXT(ctx);
struct gl_shader *sh = _mesa_lookup_shader(ctx, shader);
- GLuint i;
-
- for (i = 0; i < sh->NumPrograms; i++) {
- struct gl_program *prog = sh->Programs[i];
- _mesa_print_program_opt(prog, Options.Mode, Options.LineNumbers);
- }
+ struct gl_program *prog = sh->Program;
+ _mesa_print_program_opt(prog, Options.Mode, Options.LineNumbers);
}
diff --git a/src/mesa/main/debug.c b/src/mesa/main/debug.c
index 98ca65b96a9..77fef325583 100644
--- a/src/mesa/main/debug.c
+++ b/src/mesa/main/debug.c
@@ -150,36 +150,32 @@ void _mesa_print_info( void )
static void add_debug_flags( const char *debug )
{
#ifdef DEBUG
- if (_mesa_strstr(debug, "varray"))
- MESA_VERBOSE |= VERBOSE_VARRAY;
-
- if (_mesa_strstr(debug, "tex"))
- MESA_VERBOSE |= VERBOSE_TEXTURE;
-
- if (_mesa_strstr(debug, "imm"))
- MESA_VERBOSE |= VERBOSE_IMMEDIATE;
-
- if (_mesa_strstr(debug, "pipe"))
- MESA_VERBOSE |= VERBOSE_PIPELINE;
-
- if (_mesa_strstr(debug, "driver"))
- MESA_VERBOSE |= VERBOSE_DRIVER;
-
- if (_mesa_strstr(debug, "state"))
- MESA_VERBOSE |= VERBOSE_STATE;
-
- if (_mesa_strstr(debug, "api"))
- MESA_VERBOSE |= VERBOSE_API;
-
- if (_mesa_strstr(debug, "list"))
- MESA_VERBOSE |= VERBOSE_DISPLAY_LIST;
-
- if (_mesa_strstr(debug, "lighting"))
- MESA_VERBOSE |= VERBOSE_LIGHTING;
+ struct debug_option {
+ const char *name;
+ GLbitfield flag;
+ };
+ static const struct debug_option debug_opt[] = {
+ { "varray", VERBOSE_VARRAY },
+ { "tex", VERBOSE_TEXTURE },
+ { "imm", VERBOSE_IMMEDIATE },
+ { "pipe", VERBOSE_PIPELINE },
+ { "driver", VERBOSE_DRIVER },
+ { "state", VERBOSE_STATE },
+ { "api", VERBOSE_API },
+ { "list", VERBOSE_DISPLAY_LIST },
+ { "lighting", VERBOSE_LIGHTING },
+ { "disassem", VERBOSE_DISASSEM },
+ { "glsl", VERBOSE_GLSL }, /* report GLSL compile/link errors */
+ { "glsl_dump", VERBOSE_GLSL_DUMP } /* print shader GPU instructions */
+ };
+ GLuint i;
+
+ MESA_VERBOSE = 0x0;
+ for (i = 0; i < Elements(debug_opt); i++) {
+ if (_mesa_strstr(debug, debug_opt[i].name))
+ MESA_VERBOSE |= debug_opt[i].flag;
+ }
- if (_mesa_strstr(debug, "disassem"))
- MESA_VERBOSE |= VERBOSE_DISASSEM;
-
/* Debug flag:
*/
if (_mesa_strstr(debug, "flush"))
diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c
index da2640dd8fc..64a4788aa4b 100644
--- a/src/mesa/main/ffvertex_prog.c
+++ b/src/mesa/main/ffvertex_prog.c
@@ -1306,14 +1306,13 @@ static void build_lighting( struct tnl_program *p )
}
else if (!p->state->material_shininess_is_zero) {
emit_op1(p, OPCODE_LIT, lit, 0, dots);
- emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0);
+ emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
}
else {
emit_degenerate_lit(p, lit, dots);
- emit_op2(p, OPCODE_ADD, _col0, 0, ambient, _col0);
+ emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
}
- emit_op2(p, OPCODE_ADD, _bfc0, 0, ambient, _bfc0);
emit_op3(p, OPCODE_MAD, res0, mask0, swizzle1(lit,Y), diffuse, _bfc0);
emit_op3(p, OPCODE_MAD, res1, mask1, swizzle1(lit,Z), specular, _bfc1);
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 7ad8cb244d5..5e920f7aeb1 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3135,7 +3135,9 @@ enum _verbose
VERBOSE_LIGHTING = 0x0200,
VERBOSE_PRIMS = 0x0400,
VERBOSE_VERTS = 0x0800,
- VERBOSE_DISASSEM = 0x1000
+ VERBOSE_DISASSEM = 0x1000,
+ VERBOSE_GLSL = 0x2000,
+ VERBOSE_GLSL_DUMP = 0x4000
};
diff --git a/src/mesa/main/points.c b/src/mesa/main/points.c
index 7e189a0a8c9..1fe697033f1 100644
--- a/src/mesa/main/points.c
+++ b/src/mesa/main/points.c
@@ -200,7 +200,7 @@ _mesa_PointParameterfv( GLenum pname, const GLfloat *params)
}
break;
case GL_POINT_SPRITE_COORD_ORIGIN:
- if (ctx->Extensions.ARB_point_sprite) {
+ if (ctx->Extensions.ARB_point_sprite || ctx->Extensions.NV_point_sprite) {
GLenum value = (GLenum) params[0];
if (value != GL_LOWER_LEFT && value != GL_UPPER_LEFT) {
_mesa_error(ctx, GL_INVALID_VALUE,
diff --git a/src/mesa/main/shaders.c b/src/mesa/main/shaders.c
index e5c54bb10d7..7491d00c357 100644
--- a/src/mesa/main/shaders.c
+++ b/src/mesa/main/shaders.c
@@ -1,6 +1,6 @@
/*
* Mesa 3-D graphics library
- * Version: 7.1
+ * Version: 7.3
*
* Copyright (C) 2004-2008 Brian Paul All Rights Reserved.
*
@@ -235,30 +235,21 @@ _mesa_GetObjectParameterivARB(GLhandleARB object, GLenum pname, GLint *params)
if (ctx->Driver.IsProgram(ctx, object)) {
if (pname == GL_OBJECT_TYPE_ARB) {
*params = GL_PROGRAM_OBJECT_ARB;
- } else {
+ }
+ else {
ctx->Driver.GetProgramiv(ctx, object, pname, params);
}
}
else if (ctx->Driver.IsShader(ctx, object)) {
if (pname == GL_OBJECT_TYPE_ARB) {
*params = GL_SHADER_OBJECT_ARB;
- } else {
+ }
+ else {
ctx->Driver.GetShaderiv(ctx, object, pname, params);
}
}
else {
- /* error code depends on pname */
- GLenum err;
- switch (pname) {
- case GL_OBJECT_TYPE_ARB:
- case GL_OBJECT_DELETE_STATUS_ARB:
- case GL_OBJECT_INFO_LOG_LENGTH_ARB:
- err = GL_INVALID_OPERATION;
- break;
- default:
- err = GL_INVALID_VALUE;
- }
- _mesa_error(ctx, err, "glGetObjectParameterivARB");
+ _mesa_error(ctx, GL_INVALID_VALUE, "glGetObjectParameterivARB");
}
}
diff --git a/src/mesa/main/texenvprogram.c b/src/mesa/main/texenvprogram.c
index 2c7df7b8d9a..237ddaa6838 100644
--- a/src/mesa/main/texenvprogram.c
+++ b/src/mesa/main/texenvprogram.c
@@ -233,6 +233,12 @@ static GLbitfield get_fp_input_mask( GLcontext *ctx )
/* Fixed function logic */
GLbitfield varying_inputs = ctx->varying_vp_inputs;
+ /* These get generated in the setup routine regardless of the
+ * vertex program:
+ */
+ if (ctx->Point.PointSprite)
+ varying_inputs |= FRAG_BITS_TEX_ANY;
+
/* First look at what values may be computed by the generated
* vertex program:
*/
@@ -260,6 +266,12 @@ static GLbitfield get_fp_input_mask( GLcontext *ctx )
/* calculate from vp->outputs */
GLbitfield vp_outputs = ctx->VertexProgram._Current->Base.OutputsWritten;
+ /* These get generated in the setup routine regardless of the
+ * vertex program:
+ */
+ if (ctx->Point.PointSprite)
+ vp_outputs |= FRAG_BITS_TEX_ANY;
+
if (vp_outputs & (1 << VERT_RESULT_COL0)) fp_inputs |= FRAG_BIT_COL0;
if (vp_outputs & (1 << VERT_RESULT_COL1)) fp_inputs |= FRAG_BIT_COL1;
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index bf23a1f290d..cddd9df0164 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -388,9 +388,10 @@ _mesa_base_tex_format( GLcontext *ctx, GLint internalFormat )
* index, depth, stencil, etc).
* \param format the image format value (may by an internal texture format)
* \return GL_TRUE if its a color/RGBA format, GL_FALSE otherwise.
+ * XXX maybe move this func to image.c
*/
-static GLboolean
-is_color_format(GLenum format)
+GLboolean
+_mesa_is_color_format(GLenum format)
{
switch (format) {
case GL_RED:
@@ -491,6 +492,7 @@ is_color_format(GLenum format)
#endif /* FEATURE_EXT_texture_sRGB */
return GL_TRUE;
case GL_YCBCR_MESA: /* not considered to be RGB */
+ /* fall-through */
default:
return GL_FALSE;
}
@@ -1587,9 +1589,9 @@ texture_error_check( GLcontext *ctx, GLenum target,
}
/* make sure internal format and format basically agree */
- colorFormat = is_color_format(format);
+ colorFormat = _mesa_is_color_format(format);
indexFormat = is_index_format(format);
- if ((is_color_format(internalFormat) && !colorFormat && !indexFormat) ||
+ if ((_mesa_is_color_format(internalFormat) && !colorFormat && !indexFormat) ||
(is_index_format(internalFormat) && !indexFormat) ||
(is_depth_format(internalFormat) != is_depth_format(format)) ||
(is_ycbcr_format(internalFormat) != is_ycbcr_format(format)) ||
@@ -2051,30 +2053,20 @@ copytexture_error_check( GLcontext *ctx, GLuint dimensions,
/**
* Test glCopyTexSubImage[12]D() parameters for errors.
+ * Note that this is the first part of error checking.
+ * See also copytexsubimage_error_check2() below for the second part.
*
* \param ctx GL context.
* \param dimensions texture image dimensions (must be 1, 2 or 3).
* \param target texture target given by the user.
* \param level image level given by the user.
- * \param xoffset sub-image x offset given by the user.
- * \param yoffset sub-image y offset given by the user.
- * \param zoffset sub-image z offset given by the user.
- * \param width image width given by the user.
- * \param height image height given by the user.
*
* \return GL_TRUE if an error was detected, or GL_FALSE if no errors.
- *
- * Verifies each of the parameters against the constants specified in
- * __GLcontextRec::Const and the supported extensions, and according to the
- * OpenGL specification.
*/
static GLboolean
-copytexsubimage_error_check( GLcontext *ctx, GLuint dimensions,
- GLenum target, GLint level,
- GLint xoffset, GLint yoffset, GLint zoffset,
- GLsizei width, GLsizei height)
+copytexsubimage_error_check1( GLcontext *ctx, GLuint dimensions,
+ GLenum target, GLint level)
{
- /* Check target */
/* Check that the source buffer is complete */
if (ctx->ReadBuffer->Name) {
_mesa_test_framebuffer_completeness(ctx, ctx->ReadBuffer);
@@ -2085,6 +2077,7 @@ copytexsubimage_error_check( GLcontext *ctx, GLuint dimensions,
}
}
+ /* Check target */
if (dimensions == 1) {
if (target != GL_TEXTURE_1D) {
_mesa_error( ctx, GL_INVALID_ENUM, "glCopyTexSubImage1D(target)" );
@@ -2132,21 +2125,18 @@ copytexsubimage_error_check( GLcontext *ctx, GLuint dimensions,
return GL_TRUE;
}
- /* Check size */
- if (width < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "glCopyTexSubImage%dD(width=%d)", dimensions, width);
- return GL_TRUE;
- }
- if (dimensions > 1 && height < 0) {
- _mesa_error(ctx, GL_INVALID_VALUE,
- "glCopyTexSubImage%dD(height=%d)", dimensions, height);
- return GL_TRUE;
- }
-
return GL_FALSE;
}
+
+/**
+ * Second part of error checking for glCopyTexSubImage[12]D().
+ * \param xoffset sub-image x offset given by the user.
+ * \param yoffset sub-image y offset given by the user.
+ * \param zoffset sub-image z offset given by the user.
+ * \param width image width given by the user.
+ * \param height image height given by the user.
+ */
static GLboolean
copytexsubimage_error_check2( GLcontext *ctx, GLuint dimensions,
GLenum target, GLint level,
@@ -2154,6 +2144,7 @@ copytexsubimage_error_check2( GLcontext *ctx, GLuint dimensions,
GLsizei width, GLsizei height,
const struct gl_texture_image *teximage )
{
+ /* check that dest tex image exists */
if (!teximage) {
_mesa_error(ctx, GL_INVALID_OPERATION,
"glCopyTexSubImage%dD(undefined texture level: %d)",
@@ -2161,6 +2152,19 @@ copytexsubimage_error_check2( GLcontext *ctx, GLuint dimensions,
return GL_TRUE;
}
+ /* Check size */
+ if (width < 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "glCopyTexSubImage%dD(width=%d)", dimensions, width);
+ return GL_TRUE;
+ }
+ if (dimensions > 1 && height < 0) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ "glCopyTexSubImage%dD(height=%d)", dimensions, height);
+ return GL_TRUE;
+ }
+
+ /* check x/y offsets */
if (xoffset < -((GLint)teximage->Border)) {
_mesa_error(ctx, GL_INVALID_VALUE,
"glCopyTexSubImage%dD(xoffset=%d)", dimensions, xoffset);
@@ -2185,6 +2189,7 @@ copytexsubimage_error_check2( GLcontext *ctx, GLuint dimensions,
}
}
+ /* check z offset */
if (dimensions > 2) {
if (zoffset < -((GLint)teximage->Border)) {
_mesa_error(ctx, GL_INVALID_VALUE,
@@ -2336,8 +2341,8 @@ _mesa_GetTexImage( GLenum target, GLint level, GLenum format,
* texture's format. Note that a color index texture can be converted
* to RGBA so that combo is allowed.
*/
- if (is_color_format(format)
- && !is_color_format(texImage->TexFormat->BaseFormat)
+ if (_mesa_is_color_format(format)
+ && !_mesa_is_color_format(texImage->TexFormat->BaseFormat)
&& !is_index_format(texImage->TexFormat->BaseFormat)) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glGetTexImage(format mismatch)");
goto out;
@@ -2430,7 +2435,7 @@ _mesa_TexImage1D( GLenum target, GLint level, GLint internalFormat,
ASSERT_OUTSIDE_BEGIN_END_AND_FLUSH(ctx);
#if FEATURE_convolve
- if (is_color_format(internalFormat)) {
+ if (_mesa_is_color_format(internalFormat)) {
_mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
}
#endif
@@ -2527,7 +2532,7 @@ _mesa_TexImage2D( GLenum target, GLint level, GLint internalFormat,
ASSERT_OUTSIDE_BEGIN_END_AND_FLUSH(ctx);
#if FEATURE_convolve
- if (is_color_format(internalFormat)) {
+ if (_mesa_is_color_format(internalFormat)) {
_mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth,
&postConvHeight);
}
@@ -2752,7 +2757,7 @@ _mesa_TexSubImage1D( GLenum target, GLint level,
#if FEATURE_convolve
/* XXX should test internal format */
- if (is_color_format(format)) {
+ if (_mesa_is_color_format(format)) {
_mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
}
#endif
@@ -2812,7 +2817,7 @@ _mesa_TexSubImage2D( GLenum target, GLint level,
#if FEATURE_convolve
/* XXX should test internal format */
- if (is_color_format(format)) {
+ if (_mesa_is_color_format(format)) {
_mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth,
&postConvHeight);
}
@@ -2927,7 +2932,7 @@ _mesa_CopyTexImage1D( GLenum target, GLint level,
_mesa_update_state(ctx);
#if FEATURE_convolve
- if (is_color_format(internalFormat)) {
+ if (_mesa_is_color_format(internalFormat)) {
_mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
}
#endif
@@ -2992,11 +2997,12 @@ _mesa_CopyTexImage2D( GLenum target, GLint level, GLenum internalFormat,
_mesa_update_state(ctx);
#if FEATURE_convolve
- if (is_color_format(internalFormat)) {
+ if (_mesa_is_color_format(internalFormat)) {
_mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth,
&postConvHeight);
}
#endif
+
if (copytexture_error_check(ctx, 2, target, level, internalFormat,
postConvWidth, postConvHeight, border))
return;
@@ -3058,13 +3064,7 @@ _mesa_CopyTexSubImage1D( GLenum target, GLint level,
if (ctx->NewState & _IMAGE_NEW_TRANSFER_STATE)
_mesa_update_state(ctx);
-#if FEATURE_convolve
- /* XXX should test internal format */
- _mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
-#endif
-
- if (copytexsubimage_error_check(ctx, 1, target, level,
- xoffset, 0, 0, postConvWidth, 1))
+ if (copytexsubimage_error_check1(ctx, 1, target, level))
return;
texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
@@ -3074,6 +3074,12 @@ _mesa_CopyTexSubImage1D( GLenum target, GLint level,
{
texImage = _mesa_select_tex_image(ctx, texObj, target, level);
+#if FEATURE_convolve
+ if (texImage && _mesa_is_color_format(texImage->InternalFormat)) {
+ _mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
+ }
+#endif
+
if (copytexsubimage_error_check2(ctx, 1, target, level,
xoffset, 0, 0, postConvWidth, 1,
texImage))
@@ -3113,13 +3119,7 @@ _mesa_CopyTexSubImage2D( GLenum target, GLint level,
if (ctx->NewState & _IMAGE_NEW_TRANSFER_STATE)
_mesa_update_state(ctx);
-#if FEATURE_convolve
- /* XXX should test internal format */
- _mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth, &postConvHeight);
-#endif
-
- if (copytexsubimage_error_check(ctx, 2, target, level, xoffset, yoffset, 0,
- postConvWidth, postConvHeight))
+ if (copytexsubimage_error_check1(ctx, 2, target, level))
return;
texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
@@ -3129,6 +3129,13 @@ _mesa_CopyTexSubImage2D( GLenum target, GLint level,
{
texImage = _mesa_select_tex_image(ctx, texObj, target, level);
+#if FEATURE_convolve
+ if (texImage && _mesa_is_color_format(texImage->InternalFormat)) {
+ _mesa_adjust_image_for_convolution(ctx, 2,
+ &postConvWidth, &postConvHeight);
+ }
+#endif
+
if (copytexsubimage_error_check2(ctx, 2, target, level, xoffset, yoffset, 0,
postConvWidth, postConvHeight, texImage))
goto out;
@@ -3167,13 +3174,7 @@ _mesa_CopyTexSubImage3D( GLenum target, GLint level,
if (ctx->NewState & _IMAGE_NEW_TRANSFER_STATE)
_mesa_update_state(ctx);
-#if FEATURE_convolve
- /* XXX should test internal format */
- _mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth, &postConvHeight);
-#endif
-
- if (copytexsubimage_error_check(ctx, 3, target, level, xoffset, yoffset,
- zoffset, postConvWidth, postConvHeight))
+ if (copytexsubimage_error_check1(ctx, 3, target, level))
return;
texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit];
@@ -3183,6 +3184,13 @@ _mesa_CopyTexSubImage3D( GLenum target, GLint level,
{
texImage = _mesa_select_tex_image(ctx, texObj, target, level);
+#if FEATURE_convolve
+ if (texImage && _mesa_is_color_format(texImage->InternalFormat)) {
+ _mesa_adjust_image_for_convolution(ctx, 2,
+ &postConvWidth, &postConvHeight);
+ }
+#endif
+
if (copytexsubimage_error_check2(ctx, 3, target, level, xoffset, yoffset,
zoffset, postConvWidth, postConvHeight,
texImage))
diff --git a/src/mesa/main/teximage.h b/src/mesa/main/teximage.h
index b718c0046d8..eb60a1fa8fa 100644
--- a/src/mesa/main/teximage.h
+++ b/src/mesa/main/teximage.h
@@ -111,6 +111,9 @@ extern GLuint
_mesa_tex_target_to_face(GLenum target);
+extern GLboolean
+_mesa_is_color_format(GLenum format);
+
/**
* Lock a texture for updating. See also _mesa_lock_context_textures().
diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 3639a914c4c..c1fafbae30b 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -2988,10 +2988,13 @@ choose_texture_format(GLcontext *ctx, struct gl_texture_image *texImage,
-/*
+/**
* This is the software fallback for Driver.TexImage1D()
* and Driver.CopyTexImage1D().
* \sa _mesa_store_teximage2d()
+ * Note that the width may not be the actual texture width since it may
+ * be changed by convolution w/ GL_REDUCE. The texImage->Width field will
+ * have the actual texture size.
*/
void
_mesa_store_teximage1d(GLcontext *ctx, GLenum target, GLint level,
@@ -3002,21 +3005,16 @@ _mesa_store_teximage1d(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage)
{
- GLint postConvWidth = width;
GLint sizeInBytes;
(void) border;
- if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) {
- _mesa_adjust_image_for_convolution(ctx, 1, &postConvWidth, NULL);
- }
-
choose_texture_format(ctx, texImage, 1, format, type, internalFormat);
/* allocate memory */
if (texImage->IsCompressed)
sizeInBytes = texImage->CompressedSize;
else
- sizeInBytes = postConvWidth * texImage->TexFormat->TexelBytes;
+ sizeInBytes = texImage->Width * texImage->TexFormat->TexelBytes;
texImage->Data = _mesa_alloc_texmemory(sizeInBytes);
if (!texImage->Data) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage1D");
@@ -3076,15 +3074,9 @@ _mesa_store_teximage2d(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage)
{
- GLint postConvWidth = width, postConvHeight = height;
GLint texelBytes, sizeInBytes;
(void) border;
- if (ctx->_ImageTransferState & IMAGE_CONVOLUTION_BIT) {
- _mesa_adjust_image_for_convolution(ctx, 2, &postConvWidth,
- &postConvHeight);
- }
-
choose_texture_format(ctx, texImage, 2, format, type, internalFormat);
texelBytes = texImage->TexFormat->TexelBytes;
@@ -3093,7 +3085,7 @@ _mesa_store_teximage2d(GLcontext *ctx, GLenum target, GLint level,
if (texImage->IsCompressed)
sizeInBytes = texImage->CompressedSize;
else
- sizeInBytes = postConvWidth * postConvHeight * texelBytes;
+ sizeInBytes = texImage->Width * texImage->Height * texelBytes;
texImage->Data = _mesa_alloc_texmemory(sizeInBytes);
if (!texImage->Data) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "glTexImage2D");
diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c
index 23648f3f4ca..4f1a07ed75c 100644
--- a/src/mesa/shader/prog_execute.c
+++ b/src/mesa/shader/prog_execute.c
@@ -220,6 +220,37 @@ fetch_vector4(const struct prog_src_register *source,
/**
+ * Fetch a 4-element uint vector from the given source register.
+ * Apply swizzling but not negation/abs.
+ */
+static void
+fetch_vector4ui(const struct prog_src_register *source,
+ const struct gl_program_machine *machine, GLuint result[4])
+{
+ const GLuint *src = (GLuint *) get_register_pointer(source, machine);
+ ASSERT(src);
+
+ if (source->Swizzle == SWIZZLE_NOOP) {
+ /* no swizzling */
+ COPY_4V(result, src);
+ }
+ else {
+ ASSERT(GET_SWZ(source->Swizzle, 0) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 1) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 2) <= 3);
+ ASSERT(GET_SWZ(source->Swizzle, 3) <= 3);
+ result[0] = src[GET_SWZ(source->Swizzle, 0)];
+ result[1] = src[GET_SWZ(source->Swizzle, 1)];
+ result[2] = src[GET_SWZ(source->Swizzle, 2)];
+ result[3] = src[GET_SWZ(source->Swizzle, 3)];
+ }
+
+ /* Note: no NegateBase, Abs, NegateAbs here */
+}
+
+
+
+/**
* Fetch the derivative with respect to X or Y for the given register.
* XXX this currently only works for fragment program input attribs.
*/
@@ -229,7 +260,8 @@ fetch_vector4_deriv(GLcontext * ctx,
const struct gl_program_machine *machine,
char xOrY, GLfloat result[4])
{
- if (source->File == PROGRAM_INPUT && source->Index < (GLint)machine->NumDeriv) {
+ if (source->File == PROGRAM_INPUT &&
+ source->Index < (GLint) machine->NumDeriv) {
const GLint col = machine->CurElement;
const GLfloat w = machine->Attribs[FRAG_ATTRIB_WPOS][col][3];
const GLfloat invQ = 1.0f / w;
@@ -494,6 +526,89 @@ store_vector4(const struct prog_instruction *inst,
/**
+ * Store 4 uints into a register. Observe the set-condition-code flags.
+ */
+static void
+store_vector4ui(const struct prog_instruction *inst,
+ struct gl_program_machine *machine, const GLuint value[4])
+{
+ const struct prog_dst_register *dest = &(inst->DstReg);
+ GLuint *dstReg;
+ GLuint dummyReg[4];
+ GLuint writeMask = dest->WriteMask;
+
+ switch (dest->File) {
+ case PROGRAM_OUTPUT:
+ ASSERT(dest->Index < MAX_PROGRAM_OUTPUTS);
+ dstReg = (GLuint *) machine->Outputs[dest->Index];
+ break;
+ case PROGRAM_TEMPORARY:
+ ASSERT(dest->Index < MAX_PROGRAM_TEMPS);
+ dstReg = (GLuint *) machine->Temporaries[dest->Index];
+ break;
+ case PROGRAM_WRITE_ONLY:
+ dstReg = dummyReg;
+ return;
+ default:
+ _mesa_problem(NULL, "bad register file in store_vector4(fp)");
+ return;
+ }
+
+ if (dest->CondMask != COND_TR) {
+ /* condition codes may turn off some writes */
+ if (writeMask & WRITEMASK_X) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 0)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_X;
+ }
+ if (writeMask & WRITEMASK_Y) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 1)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_Y;
+ }
+ if (writeMask & WRITEMASK_Z) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 2)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_Z;
+ }
+ if (writeMask & WRITEMASK_W) {
+ if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 3)],
+ dest->CondMask))
+ writeMask &= ~WRITEMASK_W;
+ }
+ }
+
+ if (writeMask & WRITEMASK_X)
+ dstReg[0] = value[0];
+ if (writeMask & WRITEMASK_Y)
+ dstReg[1] = value[1];
+ if (writeMask & WRITEMASK_Z)
+ dstReg[2] = value[2];
+ if (writeMask & WRITEMASK_W)
+ dstReg[3] = value[3];
+
+ if (inst->CondUpdate) {
+ if (writeMask & WRITEMASK_X)
+ machine->CondCodes[0] = generate_cc(value[0]);
+ if (writeMask & WRITEMASK_Y)
+ machine->CondCodes[1] = generate_cc(value[1]);
+ if (writeMask & WRITEMASK_Z)
+ machine->CondCodes[2] = generate_cc(value[2]);
+ if (writeMask & WRITEMASK_W)
+ machine->CondCodes[3] = generate_cc(value[3]);
+#if DEBUG_PROG
+ printf("CondCodes=(%s,%s,%s,%s) for:\n",
+ _mesa_condcode_string(machine->CondCodes[0]),
+ _mesa_condcode_string(machine->CondCodes[1]),
+ _mesa_condcode_string(machine->CondCodes[2]),
+ _mesa_condcode_string(machine->CondCodes[3]));
+#endif
+ }
+}
+
+
+
+/**
* Execute the given vertex/fragment program.
*
* \param ctx rendering context
@@ -572,6 +687,18 @@ _mesa_execute_program(GLcontext * ctx,
}
}
break;
+ case OPCODE_AND: /* bitwise AND */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] & b[0];
+ result[1] = a[1] & b[1];
+ result[2] = a[2] & b[2];
+ result[3] = a[3] & b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
case OPCODE_ARL:
{
GLfloat t[4];
@@ -650,6 +777,33 @@ _mesa_execute_program(GLcontext * ctx,
store_vector4(inst, machine, result);
}
break;
+ case OPCODE_DP2:
+ {
+ GLfloat a[4], b[4], result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ fetch_vector4(&inst->SrcReg[1], machine, b);
+ result[0] = result[1] = result[2] = result[3] = DOT2(a, b);
+ store_vector4(inst, machine, result);
+ if (DEBUG_PROG) {
+ printf("DP2 %g = (%g %g) . (%g %g)\n",
+ result[0], a[0], a[1], b[0], b[1]);
+ }
+ }
+ break;
+ case OPCODE_DP2A:
+ {
+ GLfloat a[4], b[4], c, result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ fetch_vector4(&inst->SrcReg[1], machine, b);
+ fetch_vector1(&inst->SrcReg[1], machine, &c);
+ result[0] = result[1] = result[2] = result[3] = DOT2(a, b) + c;
+ store_vector4(inst, machine, result);
+ if (DEBUG_PROG) {
+ printf("DP2A %g = (%g %g) . (%g %g) + %g\n",
+ result[0], a[0], a[1], b[0], b[1], c);
+ }
+ }
+ break;
case OPCODE_DP3:
{
GLfloat a[4], b[4], result[4];
@@ -682,8 +836,7 @@ _mesa_execute_program(GLcontext * ctx,
GLfloat a[4], b[4], result[4];
fetch_vector4(&inst->SrcReg[0], machine, a);
fetch_vector4(&inst->SrcReg[1], machine, b);
- result[0] = result[1] = result[2] = result[3] =
- a[0] * b[0] + a[1] * b[1] + a[2] * b[2] + b[3];
+ result[0] = result[1] = result[2] = result[3] = DOT3(a, b) + b[3];
store_vector4(inst, machine, result);
}
break;
@@ -790,17 +943,6 @@ _mesa_execute_program(GLcontext * ctx,
case OPCODE_ENDIF:
/* nothing */
break;
- case OPCODE_INT: /* float to int */
- {
- GLfloat a[4], result[4];
- fetch_vector4(&inst->SrcReg[0], machine, a);
- result[0] = (GLfloat) (GLint) a[0];
- result[1] = (GLfloat) (GLint) a[1];
- result[2] = (GLfloat) (GLint) a[2];
- result[3] = (GLfloat) (GLint) a[3];
- store_vector4(inst, machine, result);
- }
- break;
case OPCODE_KIL_NV: /* NV_f_p only (conditional) */
if (eval_condition(machine, inst)) {
return GL_FALSE;
@@ -1031,39 +1173,94 @@ _mesa_execute_program(GLcontext * ctx,
break;
case OPCODE_NOP:
break;
- case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
+ case OPCODE_NOT: /* bitwise NOT */
+ {
+ GLuint a[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ result[0] = ~a[0];
+ result[1] = ~a[1];
+ result[2] = ~a[2];
+ result[3] = ~a[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
+ case OPCODE_NRM3: /* 3-component normalization */
+ {
+ GLfloat a[4], result[4];
+ GLfloat tmp;
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2];
+ if (tmp != 0.0F)
+ tmp = INV_SQRTF(tmp);
+ result[0] = tmp * a[0];
+ result[1] = tmp * a[1];
+ result[2] = tmp * a[2];
+ result[3] = 0.0; /* undefined, but prevent valgrind warnings */
+ store_vector4(inst, machine, result);
+ }
+ break;
+ case OPCODE_NRM4: /* 4-component normalization */
{
GLfloat a[4], result[4];
+ GLfloat tmp;
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ tmp = a[0] * a[0] + a[1] * a[1] + a[2] * a[2] + a[3] * a[3];
+ if (tmp != 0.0F)
+ tmp = INV_SQRTF(tmp);
+ result[0] = tmp * a[0];
+ result[1] = tmp * a[1];
+ result[2] = tmp * a[2];
+ result[3] = tmp * a[3];
+ store_vector4(inst, machine, result);
+ }
+ break;
+ case OPCODE_OR: /* bitwise OR */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] | b[0];
+ result[1] = a[1] | b[1];
+ result[2] = a[2] | b[2];
+ result[3] = a[3] | b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
+ case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */
+ {
+ GLfloat a[4];
+ GLuint result[4];
GLhalfNV hx, hy;
- GLuint *rawResult = (GLuint *) result;
- GLuint twoHalves;
fetch_vector4(&inst->SrcReg[0], machine, a);
hx = _mesa_float_to_half(a[0]);
hy = _mesa_float_to_half(a[1]);
- twoHalves = hx | (hy << 16);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = twoHalves;
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = hx | (hy << 16);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint usx, usy, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], usx, usy;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], 0.0F, 1.0F);
a[1] = CLAMP(a[1], 0.0F, 1.0F);
usx = IROUND(a[0] * 65535.0F);
usy = IROUND(a[1] * 65535.0F);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = usx | (usy << 16);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = usx | (usy << 16);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], ubx, uby, ubz, ubw;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], -128.0F / 127.0F, 1.0F);
a[1] = CLAMP(a[1], -128.0F / 127.0F, 1.0F);
@@ -1073,15 +1270,17 @@ _mesa_execute_program(GLcontext * ctx,
uby = IROUND(127.0F * a[1] + 128.0F);
ubz = IROUND(127.0F * a[2] + 128.0F);
ubw = IROUND(127.0F * a[3] + 128.0F);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */
{
- GLfloat a[4], result[4];
- GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result;
+ GLfloat a[4];
+ GLuint result[4], ubx, uby, ubz, ubw;
fetch_vector4(&inst->SrcReg[0], machine, a);
a[0] = CLAMP(a[0], 0.0F, 1.0F);
a[1] = CLAMP(a[1], 0.0F, 1.0F);
@@ -1091,9 +1290,11 @@ _mesa_execute_program(GLcontext * ctx,
uby = IROUND(255.0F * a[1]);
ubz = IROUND(255.0F * a[2]);
ubw = IROUND(255.0F * a[3]);
- rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3]
- = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
- store_vector4(inst, machine, result);
+ result[0] =
+ result[1] =
+ result[2] =
+ result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24);
+ store_vector4ui(inst, machine, result);
}
break;
case OPCODE_POW:
@@ -1289,6 +1490,17 @@ _mesa_execute_program(GLcontext * ctx,
}
}
break;
+ case OPCODE_SSG: /* set sign (-1, 0 or +1) */
+ {
+ GLfloat a[4], result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ result[0] = (GLfloat) ((a[0] > 0.0F) - (a[0] < 0.0F));
+ result[1] = (GLfloat) ((a[1] > 0.0F) - (a[1] < 0.0F));
+ result[2] = (GLfloat) ((a[2] > 0.0F) - (a[2] < 0.0F));
+ result[3] = (GLfloat) ((a[3] > 0.0F) - (a[3] < 0.0F));
+ store_vector4(inst, machine, result);
+ }
+ break;
case OPCODE_STR: /* set true, operands ignored */
{
static const GLfloat result[4] = { 1.0F, 1.0F, 1.0F, 1.0F };
@@ -1426,6 +1638,17 @@ _mesa_execute_program(GLcontext * ctx,
store_vector4(inst, machine, color);
}
break;
+ case OPCODE_TRUNC: /* truncate toward zero */
+ {
+ GLfloat a[4], result[4];
+ fetch_vector4(&inst->SrcReg[0], machine, a);
+ result[0] = (GLfloat) (GLint) a[0];
+ result[1] = (GLfloat) (GLint) a[1];
+ result[2] = (GLfloat) (GLint) a[2];
+ result[3] = (GLfloat) (GLint) a[3];
+ store_vector4(inst, machine, result);
+ }
+ break;
case OPCODE_UP2H: /* unpack two 16-bit floats */
{
GLfloat a[4], result[4];
@@ -1476,6 +1699,18 @@ _mesa_execute_program(GLcontext * ctx,
store_vector4(inst, machine, result);
}
break;
+ case OPCODE_XOR: /* bitwise XOR */
+ {
+ GLuint a[4], b[4], result[4];
+ fetch_vector4ui(&inst->SrcReg[0], machine, a);
+ fetch_vector4ui(&inst->SrcReg[1], machine, b);
+ result[0] = a[0] ^ b[0];
+ result[1] = a[1] ^ b[1];
+ result[2] = a[2] ^ b[2];
+ result[3] = a[3] ^ b[3];
+ store_vector4ui(inst, machine, result);
+ }
+ break;
case OPCODE_XPD: /* cross product */
{
GLfloat a[4], b[4], result[4];
diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c
index 1033496d978..f5c0a498fb0 100644
--- a/src/mesa/shader/prog_instruction.c
+++ b/src/mesa/shader/prog_instruction.c
@@ -154,6 +154,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_NOP, "NOP", 0, 0 },
{ OPCODE_ABS, "ABS", 1, 1 },
{ OPCODE_ADD, "ADD", 2, 1 },
+ { OPCODE_AND, "AND", 2, 1 },
{ OPCODE_ARA, "ARA", 1, 1 },
{ OPCODE_ARL, "ARL", 1, 1 },
{ OPCODE_ARL_NV, "ARL", 1, 1 },
@@ -168,6 +169,8 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_COS, "COS", 1, 1 },
{ OPCODE_DDX, "DDX", 1, 1 },
{ OPCODE_DDY, "DDY", 1, 1 },
+ { OPCODE_DP2, "DP2", 2, 1 },
+ { OPCODE_DP2A, "DP2A", 3, 1 },
{ OPCODE_DP3, "DP3", 2, 1 },
{ OPCODE_DP4, "DP4", 2, 1 },
{ OPCODE_DPH, "DPH", 2, 1 },
@@ -182,7 +185,6 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_FLR, "FLR", 1, 1 },
{ OPCODE_FRC, "FRC", 1, 1 },
{ OPCODE_IF, "IF", 1, 0 },
- { OPCODE_INT, "INT", 1, 1 },
{ OPCODE_KIL, "KIL", 1, 0 },
{ OPCODE_KIL_NV, "KIL", 0, 0 },
{ OPCODE_LG2, "LG2", 1, 1 },
@@ -198,6 +200,10 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_NOISE2, "NOISE2", 1, 1 },
{ OPCODE_NOISE3, "NOISE3", 1, 1 },
{ OPCODE_NOISE4, "NOISE4", 1, 1 },
+ { OPCODE_NOT, "NOT", 1, 1 },
+ { OPCODE_NRM3, "NRM3", 1, 1 },
+ { OPCODE_NRM4, "NRM4", 1, 1 },
+ { OPCODE_OR, "OR", 2, 1 },
{ OPCODE_PK2H, "PK2H", 1, 1 },
{ OPCODE_PK2US, "PK2US", 1, 1 },
{ OPCODE_PK4B, "PK4B", 1, 1 },
@@ -230,11 +236,13 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = {
{ OPCODE_TXL, "TXL", 1, 1 },
{ OPCODE_TXP, "TXP", 1, 1 },
{ OPCODE_TXP_NV, "TXP", 1, 1 },
+ { OPCODE_TRUNC, "TRUNC", 1, 1 },
{ OPCODE_UP2H, "UP2H", 1, 1 },
{ OPCODE_UP2US, "UP2US", 1, 1 },
{ OPCODE_UP4B, "UP4B", 1, 1 },
{ OPCODE_UP4UB, "UP4UB", 1, 1 },
{ OPCODE_X2D, "X2D", 3, 1 },
+ { OPCODE_XOR, "XOR", 2, 1 },
{ OPCODE_XPD, "XPD", 2, 1 }
};
diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h
index 711166f9ddb..6a0e62221a0 100644
--- a/src/mesa/shader/prog_instruction.h
+++ b/src/mesa/shader/prog_instruction.h
@@ -145,6 +145,7 @@ typedef enum prog_opcode {
OPCODE_NOP = 0, /* X */
OPCODE_ABS, /* X X 1.1 X */
OPCODE_ADD, /* X X X X X */
+ OPCODE_AND, /* */
OPCODE_ARA, /* 2 */
OPCODE_ARL, /* X X */
OPCODE_ARL_NV, /* 2 */
@@ -159,6 +160,8 @@ typedef enum prog_opcode {
OPCODE_COS, /* X 2 X X */
OPCODE_DDX, /* X X */
OPCODE_DDY, /* X X */
+ OPCODE_DP2, /* 2 */
+ OPCODE_DP2A, /* 2 */
OPCODE_DP3, /* X X X X X */
OPCODE_DP4, /* X X X X X */
OPCODE_DPH, /* X X 1.1 */
@@ -173,7 +176,6 @@ typedef enum prog_opcode {
OPCODE_FLR, /* X X 2 X X */
OPCODE_FRC, /* X X 2 X X */
OPCODE_IF, /* opt */
- OPCODE_INT, /* X */
OPCODE_KIL, /* X */
OPCODE_KIL_NV, /* X X */
OPCODE_LG2, /* X X 2 X X */
@@ -189,6 +191,10 @@ typedef enum prog_opcode {
OPCODE_NOISE2, /* X */
OPCODE_NOISE3, /* X */
OPCODE_NOISE4, /* X */
+ OPCODE_NOT, /* */
+ OPCODE_NRM3, /* */
+ OPCODE_NRM4, /* */
+ OPCODE_OR, /* */
OPCODE_PK2H, /* X */
OPCODE_PK2US, /* X */
OPCODE_PK4B, /* X */
@@ -221,16 +227,21 @@ typedef enum prog_opcode {
OPCODE_TXL, /* 3 2 X */
OPCODE_TXP, /* X X */
OPCODE_TXP_NV, /* 3 X */
+ OPCODE_TRUNC, /* X */
OPCODE_UP2H, /* X */
OPCODE_UP2US, /* X */
OPCODE_UP4B, /* X */
OPCODE_UP4UB, /* X */
OPCODE_X2D, /* X */
+ OPCODE_XOR, /* */
OPCODE_XPD, /* X X X */
MAX_OPCODE
} gl_inst_opcode;
+/* temporary, just in case, remove soon */
+#define OPCODE_INT OPCODE_TRUNC
+
/**
* Instruction source register.
*/
diff --git a/src/mesa/shader/prog_uniform.c b/src/mesa/shader/prog_uniform.c
index 25d7c0997bc..11f2e3e561c 100644
--- a/src/mesa/shader/prog_uniform.c
+++ b/src/mesa/shader/prog_uniform.c
@@ -87,6 +87,7 @@ _mesa_append_uniform(struct gl_uniform_list *list,
list->Uniforms[oldNum].Name = _mesa_strdup(name);
list->Uniforms[oldNum].VertPos = -1;
list->Uniforms[oldNum].FragPos = -1;
+ list->Uniforms[oldNum].Initialized = GL_FALSE;
index = oldNum;
list->NumUniforms++;
}
diff --git a/src/mesa/shader/prog_uniform.h b/src/mesa/shader/prog_uniform.h
index 735de28705a..deea7329912 100644
--- a/src/mesa/shader/prog_uniform.h
+++ b/src/mesa/shader/prog_uniform.h
@@ -50,6 +50,7 @@ struct gl_uniform
const char *Name; /**< Null-terminated string */
GLint VertPos;
GLint FragPos;
+ GLboolean Initialized; /**< For debug. Has this uniform been set? */
#if 0
GLenum DataType; /**< GL_FLOAT, GL_FLOAT_VEC2, etc */
GLuint Size; /**< Number of components (1..4) */
diff --git a/src/mesa/shader/shader_api.c b/src/mesa/shader/shader_api.c
index 266ecc4ef21..7a8501dcdd3 100644
--- a/src/mesa/shader/shader_api.c
+++ b/src/mesa/shader/shader_api.c
@@ -1422,10 +1422,22 @@ _mesa_use_program(GLcontext *ctx, GLuint program)
/**
- * Update the vertex and fragment program's TexturesUsed arrays.
+ * Update the vertex/fragment program's TexturesUsed array.
+ *
+ * This needs to be called after glUniform(set sampler var) is called.
+ * A call to glUniform(samplerVar, value) causes a sampler to point to a
+ * particular texture unit. We know the sampler's texture target
+ * (1D/2D/3D/etc) from compile time but the sampler's texture unit is
+ * set by glUniform() calls.
+ *
+ * So, scan the program->SamplerUnits[] and program->SamplerTargets[]
+ * information to update the prog->TexturesUsed[] values.
+ * Each value of TexturesUsed[unit] is one of zero, TEXTURE_1D_INDEX,
+ * TEXTURE_2D_INDEX, TEXTURE_3D_INDEX, etc.
+ * We'll use that info for state validation before rendering.
*/
-static void
-update_textures_used(struct gl_program *prog)
+void
+_mesa_update_shader_textures_used(struct gl_program *prog)
{
GLuint s;
@@ -1512,10 +1524,12 @@ set_program_uniform(GLcontext *ctx, struct gl_program *program,
GLenum type, GLsizei count, GLint elems,
const void *values)
{
+ struct gl_program_parameter *param =
+ &program->Parameters->Parameters[index];
+
assert(offset >= 0);
- if (!compatible_types(type,
- program->Parameters->Parameters[index].DataType)) {
+ if (!compatible_types(type, param->DataType)) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glUniform(type mismatch)");
return;
}
@@ -1525,7 +1539,7 @@ set_program_uniform(GLcontext *ctx, struct gl_program *program,
return;
}
- if (program->Parameters->Parameters[index].Type == PROGRAM_SAMPLER) {
+ if (param->Type == PROGRAM_SAMPLER) {
/* This controls which texture unit which is used by a sampler */
GLuint texUnit, sampler;
@@ -1549,16 +1563,16 @@ set_program_uniform(GLcontext *ctx, struct gl_program *program,
/* This maps a sampler to a texture unit: */
program->SamplerUnits[sampler] = texUnit;
- update_textures_used(program);
+ _mesa_update_shader_textures_used(program);
FLUSH_VERTICES(ctx, _NEW_TEXTURE);
}
else {
/* ordinary uniform variable */
GLsizei k, i;
- GLint slots = (program->Parameters->Parameters[index].Size + 3) / 4;
+ GLint slots = (param->Size + 3) / 4;
- if (count * elems > (GLint) program->Parameters->Parameters[index].Size) {
+ if (count * elems > (GLint) param->Size) {
_mesa_error(ctx, GL_INVALID_OPERATION, "glUniform(count too large)");
return;
}
@@ -1567,7 +1581,8 @@ set_program_uniform(GLcontext *ctx, struct gl_program *program,
count = slots;
for (k = 0; k < count; k++) {
- GLfloat *uniformVal = program->Parameters->ParameterValues[index + offset + k];
+ GLfloat *uniformVal =
+ program->Parameters->ParameterValues[index + offset + k];
if (is_integer_type(type)) {
const GLint *iValues = ((const GLint *) values) + k * elems;
for (i = 0; i < elems; i++) {
@@ -1582,7 +1597,7 @@ set_program_uniform(GLcontext *ctx, struct gl_program *program,
}
/* if the uniform is bool-valued, convert to 1.0 or 0.0 */
- if (is_boolean_type(program->Parameters->Parameters[index].DataType)) {
+ if (is_boolean_type(param->DataType)) {
for (i = 0; i < elems; i++) {
uniformVal[i] = uniformVal[i] ? 1.0f : 0.0f;
}
@@ -1666,6 +1681,8 @@ _mesa_uniform(GLcontext *ctx, GLint location, GLsizei count,
index, offset, type, count, elems, values);
}
}
+
+ shProg->Uniforms->Uniforms[location].Initialized = GL_TRUE;
}
@@ -1776,6 +1793,8 @@ _mesa_uniform_matrix(GLcontext *ctx, GLint cols, GLint rows,
count, rows, cols, transpose, values);
}
}
+
+ shProg->Uniforms->Uniforms[location].Initialized = GL_TRUE;
}
diff --git a/src/mesa/shader/shader_api.h b/src/mesa/shader/shader_api.h
index e7f12669156..ec1996ee98d 100644
--- a/src/mesa/shader/shader_api.h
+++ b/src/mesa/shader/shader_api.h
@@ -80,6 +80,10 @@ _mesa_lookup_shader(GLcontext *ctx, GLuint name);
extern void
+_mesa_update_shader_textures_used(struct gl_program *prog);
+
+
+extern void
_mesa_use_program(GLcontext *ctx, GLuint program);
diff --git a/src/mesa/shader/slang/library/slang_120_core_gc.h b/src/mesa/shader/slang/library/slang_120_core_gc.h
index 3ee03e7ec3d..15e3a3f5775 100644
--- a/src/mesa/shader/slang/library/slang_120_core_gc.h
+++ b/src/mesa/shader/slang/library/slang_120_core_gc.h
@@ -2,715 +2,725 @@
/* DO NOT EDIT - THIS FILE IS AUTOMATICALLY GENERATED FROM THE FOLLOWING FILE: */
/* slang_120_core.gc */
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diff --git a/src/mesa/shader/slang/library/slang_builtin_120_common_gc.h b/src/mesa/shader/slang/library/slang_builtin_120_common_gc.h
index 94ff0e74cf3..d9399d1a537 100644
--- a/src/mesa/shader/slang/library/slang_builtin_120_common_gc.h
+++ b/src/mesa/shader/slang/library/slang_builtin_120_common_gc.h
@@ -2,103 +2,104 @@
/* DO NOT EDIT - THIS FILE IS AUTOMATICALLY GENERATED FROM THE FOLLOWING FILE: */
/* slang_builtin_120_common.gc */
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diff --git a/src/mesa/shader/slang/library/slang_common_builtin_gc.h b/src/mesa/shader/slang/library/slang_common_builtin_gc.h
index d20240543a0..69da18e268e 100644
--- a/src/mesa/shader/slang/library/slang_common_builtin_gc.h
+++ b/src/mesa/shader/slang/library/slang_common_builtin_gc.h
@@ -102,711 +102,719 @@
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diff --git a/src/mesa/shader/slang/library/slang_core_gc.h b/src/mesa/shader/slang/library/slang_core_gc.h
index e8b80419144..125dd8dcce5 100644
--- a/src/mesa/shader/slang/library/slang_core_gc.h
+++ b/src/mesa/shader/slang/library/slang_core_gc.h
@@ -2,819 +2,832 @@
/* DO NOT EDIT - THIS FILE IS AUTOMATICALLY GENERATED FROM THE FOLLOWING FILE: */
/* slang_core.gc */
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diff --git a/src/mesa/shader/slang/library/slang_fragment_builtin_gc.h b/src/mesa/shader/slang/library/slang_fragment_builtin_gc.h
index ae69c37ebe8..ff1a85d4cee 100644
--- a/src/mesa/shader/slang/library/slang_fragment_builtin_gc.h
+++ b/src/mesa/shader/slang/library/slang_fragment_builtin_gc.h
@@ -9,93 +9,93 @@
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18,99,111,111,114,100,52,0,59,119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,50,
100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,
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+121,0,18,99,111,111,114,100,0,59,122,0,49,20,0,9,18,112,99,111,111,114,100,0,59,119,0,18,98,105,97,
+115,0,20,0,4,118,101,99,52,95,116,101,120,98,50,100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,
+109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,0,0,1,0,0,12,0,116,101,120,116,117,114,101,
+50,68,80,114,111,106,0,1,1,0,0,17,115,97,109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,
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+18,112,99,111,111,114,100,0,59,119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,50,
+100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,112,99,111,111,114,
+100,0,0,0,0,1,0,0,12,0,116,101,120,116,117,114,101,51,68,0,1,1,0,0,18,115,97,109,112,108,101,114,0,
+0,1,1,0,0,11,99,111,111,114,100,0,0,1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,99,111,111,114,
+100,52,0,0,0,9,18,99,111,111,114,100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,59,120,121,122,
+0,20,0,9,18,99,111,111,114,100,52,0,59,119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,
+120,98,51,100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,
+114,100,52,0,0,0,0,1,0,0,12,0,116,101,120,116,117,114,101,51,68,80,114,111,106,0,1,1,0,0,18,115,97,
+109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,
+12,1,112,99,111,111,114,100,0,0,0,9,18,112,99,111,111,114,100,0,59,120,121,122,0,18,99,111,111,114,
+100,0,59,120,121,122,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,18,112,99,111,111,114,100,0,59,
+119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,51,100,0,18,95,95,114,101,116,86,
+97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,0,0,1,0,0,12,0,116,101,
+120,116,117,114,101,67,117,98,101,0,1,1,0,0,19,115,97,109,112,108,101,114,0,0,1,1,0,0,11,99,111,
+111,114,100,0,0,1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,99,111,111,114,100,52,0,0,0,9,18,99,
+111,111,114,100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,20,0,9,18,99,111,111,114,100,52,0,59,
+119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,99,117,98,101,0,18,95,95,114,101,116,
+86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,52,0,0,0,0,1,0,0,12,0,115,
+104,97,100,111,119,49,68,0,1,1,0,0,20,115,97,109,112,108,101,114,0,0,1,1,0,0,11,99,111,111,114,100,
+0,0,1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,99,111,111,114,100,52,0,0,0,9,18,99,111,111,114,
+100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,20,0,9,18,99,111,111,114,100,52,0,59,119,0,18,98,
+105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,49,100,0,18,95,95,114,101,116,86,97,108,0,0,18,
+115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,52,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,
+49,68,80,114,111,106,0,1,1,0,0,20,115,97,109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,
+1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,112,99,111,111,114,100,0,0,0,9,18,112,99,111,111,114,
+100,0,59,120,0,18,99,111,111,114,100,0,59,120,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,18,112,
+99,111,111,114,100,0,59,122,0,18,99,111,111,114,100,0,59,122,0,20,0,9,18,112,99,111,111,114,100,0,
+59,119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,49,100,0,18,95,95,114,101,116,
+86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,0,0,1,0,0,12,0,115,
+104,97,100,111,119,50,68,0,1,1,0,0,21,115,97,109,112,108,101,114,0,0,1,1,0,0,11,99,111,111,114,100,
+0,0,1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,99,111,111,114,100,52,0,0,0,9,18,99,111,111,114,
+100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,20,0,9,18,99,111,111,114,100,52,0,59,119,0,18,98,
+105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,50,100,0,18,95,95,114,101,116,86,97,108,0,0,18,
+115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,52,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,
+50,68,80,114,111,106,0,1,1,0,0,21,115,97,109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,
+1,1,0,0,9,98,105,97,115,0,0,0,1,3,2,0,0,12,1,112,99,111,111,114,100,0,0,0,9,18,112,99,111,111,114,
+100,0,59,120,121,0,18,99,111,111,114,100,0,59,120,121,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,
+18,112,99,111,111,114,100,0,59,122,0,18,99,111,111,114,100,0,59,122,0,20,0,9,18,112,99,111,111,114,
+100,0,59,119,0,18,98,105,97,115,0,20,0,4,118,101,99,52,95,116,101,120,98,50,100,0,18,95,95,114,101,
+116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,0,0,1,0,0,9,0,
+100,70,100,120,0,1,1,0,0,9,112,0,0,0,1,4,118,101,99,52,95,100,100,120,0,18,95,95,114,101,116,86,97,
+108,0,59,120,0,0,18,112,0,59,120,120,120,120,0,0,0,0,1,0,0,10,0,100,70,100,120,0,1,1,0,0,10,112,0,
+0,0,1,4,118,101,99,52,95,100,100,120,0,18,95,95,114,101,116,86,97,108,0,59,120,121,0,0,18,112,0,59,
+120,121,121,121,0,0,0,0,1,0,0,11,0,100,70,100,120,0,1,1,0,0,11,112,0,0,0,1,4,118,101,99,52,95,100,
+100,120,0,18,95,95,114,101,116,86,97,108,0,59,120,121,122,0,0,18,112,0,59,120,121,122,122,0,0,0,0,
+1,0,0,12,0,100,70,100,120,0,1,1,0,0,12,112,0,0,0,1,4,118,101,99,52,95,100,100,120,0,18,95,95,114,
+101,116,86,97,108,0,0,18,112,0,0,0,0,1,0,0,9,0,100,70,100,121,0,1,1,0,0,9,112,0,0,0,1,4,118,101,99,
+52,95,100,100,121,0,18,95,95,114,101,116,86,97,108,0,59,120,0,0,18,112,0,59,120,120,120,120,0,0,0,
+0,1,0,0,10,0,100,70,100,121,0,1,1,0,0,10,112,0,0,0,1,4,118,101,99,52,95,100,100,121,0,18,95,95,114,
+101,116,86,97,108,0,59,120,121,0,0,18,112,0,59,120,121,121,121,0,0,0,0,1,0,0,11,0,100,70,100,121,0,
+1,1,0,0,11,112,0,0,0,1,4,118,101,99,52,95,100,100,121,0,18,95,95,114,101,116,86,97,108,0,59,120,
+121,122,0,0,18,112,0,59,120,121,122,122,0,0,0,0,1,0,0,12,0,100,70,100,121,0,1,1,0,0,12,112,0,0,0,1,
+4,118,101,99,52,95,100,100,121,0,18,95,95,114,101,116,86,97,108,0,0,18,112,0,0,0,0,1,0,0,9,0,102,
+119,105,100,116,104,0,1,1,0,0,9,112,0,0,0,1,8,58,97,98,115,0,58,100,70,100,120,0,18,112,0,0,0,0,0,
+58,97,98,115,0,58,100,70,100,121,0,18,112,0,0,0,0,0,46,0,0,1,0,0,10,0,102,119,105,100,116,104,0,1,
+1,0,0,10,112,0,0,0,1,8,58,97,98,115,0,58,100,70,100,120,0,18,112,0,0,0,0,0,58,97,98,115,0,58,100,
+70,100,121,0,18,112,0,0,0,0,0,46,0,0,1,0,0,11,0,102,119,105,100,116,104,0,1,1,0,0,11,112,0,0,0,1,8,
58,97,98,115,0,58,100,70,100,120,0,18,112,0,0,0,0,0,58,97,98,115,0,58,100,70,100,121,0,18,112,0,0,
-0,0,0,46,0,0,0
+0,0,0,46,0,0,1,0,0,12,0,102,119,105,100,116,104,0,1,1,0,0,12,112,0,0,0,1,8,58,97,98,115,0,58,100,
+70,100,120,0,18,112,0,0,0,0,0,58,97,98,115,0,58,100,70,100,121,0,18,112,0,0,0,0,0,46,0,0,0
diff --git a/src/mesa/shader/slang/library/slang_shader.syn b/src/mesa/shader/slang/library/slang_shader.syn
index 06bd8ac883c..ef4b410669c 100644
--- a/src/mesa/shader/slang/library/slang_shader.syn
+++ b/src/mesa/shader/slang/library/slang_shader.syn
@@ -229,6 +229,7 @@
.emtcode OP_FIELD 59
.emtcode OP_POSTINCREMENT 60
.emtcode OP_POSTDECREMENT 61
+.emtcode OP_PRECISION 62
/* parameter qualifier */
.emtcode PARAM_QUALIFIER_IN 0
@@ -753,9 +754,17 @@ parameter_declarator_2
/*
<parameter_declaration> ::= <type_qualifier> <parameter_qualifier>
+ <precision> <parameter_declarator>
+ | <type_qualifier> <parameter_qualifier>
+ <precision> <parameter_type_specifier>
+ | <type_qualifier> <parameter_qualifier>
<parameter_declarator>
| <type_qualifier> <parameter_qualifier>
<parameter_type_specifier>
+ | <parameter_qualifier> <precision>
+ <parameter_declarator>
+ | <parameter_qualifier> <precision>
+ <parameter_type_specifier>
| <parameter_qualifier> <parameter_declarator>
| <parameter_qualifier> <parameter_type_specifier>
*/
@@ -768,6 +777,12 @@ parameter_declaration_2
parameter_declaration_3
parameter_qualifier .emit TYPE_QUALIFIER_NONE .and parameter_declaration_4;
parameter_declaration_4
+ parameter_declaration_optprec .and parameter_declaration_rest;
+parameter_declaration_optprec
+ parameter_declaration_prec .or .true .emit PRECISION_DEFAULT;
+parameter_declaration_prec
+ precision .and space;
+parameter_declaration_rest
parameter_declarator .or parameter_type_specifier;
/*
@@ -1047,6 +1062,7 @@ simple_statement
.if (parsing_builtin != 0) __asm_statement .emit OP_ASM .or
selection_statement .or
iteration_statement .or
+ precision_stmt .emit OP_PRECISION .or
jump_statement .or
expression_statement .emit OP_EXPRESSION .or
declaration_statement .emit OP_DECLARE;
diff --git a/src/mesa/shader/slang/library/slang_shader_syn.h b/src/mesa/shader/slang/library/slang_shader_syn.h
index 1b258fcdc13..6457bb69bd4 100644
--- a/src/mesa/shader/slang/library/slang_shader_syn.h
+++ b/src/mesa/shader/slang/library/slang_shader_syn.h
@@ -131,6 +131,7 @@
".emtcode OP_FIELD 59\n"
".emtcode OP_POSTINCREMENT 60\n"
".emtcode OP_POSTDECREMENT 61\n"
+".emtcode OP_PRECISION 62\n"
".emtcode PARAM_QUALIFIER_IN 0\n"
".emtcode PARAM_QUALIFIER_OUT 1\n"
".emtcode PARAM_QUALIFIER_INOUT 2\n"
@@ -360,6 +361,12 @@
"parameter_declaration_3\n"
" parameter_qualifier .emit TYPE_QUALIFIER_NONE .and parameter_declaration_4;\n"
"parameter_declaration_4\n"
+" parameter_declaration_optprec .and parameter_declaration_rest;\n"
+"parameter_declaration_optprec\n"
+" parameter_declaration_prec .or .true .emit PRECISION_DEFAULT;\n"
+"parameter_declaration_prec\n"
+" precision .and space;\n"
+"parameter_declaration_rest\n"
" parameter_declarator .or parameter_type_specifier;\n"
"parameter_qualifier\n"
" parameter_qualifier_1 .or .true .emit PARAM_QUALIFIER_IN;\n"
@@ -505,6 +512,7 @@
" .if (parsing_builtin != 0) __asm_statement .emit OP_ASM .or\n"
" selection_statement .or\n"
" iteration_statement .or\n"
+" precision_stmt .emit OP_PRECISION .or\n"
" jump_statement .or\n"
" expression_statement .emit OP_EXPRESSION .or\n"
" declaration_statement .emit OP_DECLARE;\n"
diff --git a/src/mesa/shader/slang/library/slang_vertex_builtin_gc.h b/src/mesa/shader/slang/library/slang_vertex_builtin_gc.h
index 63d33af78ef..2c2aecb916f 100644
--- a/src/mesa/shader/slang/library/slang_vertex_builtin_gc.h
+++ b/src/mesa/shader/slang/library/slang_vertex_builtin_gc.h
@@ -28,73 +28,74 @@
105,120,0,16,10,50,0,57,18,103,108,95,86,101,114,116,101,120,0,59,122,122,122,122,0,48,46,18,103,
108,95,77,111,100,101,108,86,105,101,119,80,114,111,106,101,99,116,105,111,110,77,97,116,114,105,
120,0,16,10,51,0,57,18,103,108,95,86,101,114,116,101,120,0,59,119,119,119,119,0,48,46,20,0,0,1,0,0,
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-9,99,111,111,114,100,0,0,1,1,0,9,108,111,100,0,0,0,1,3,2,0,0,12,1,99,111,111,114,100,52,0,0,0,9,18,
-99,111,111,114,100,52,0,59,120,0,18,99,111,111,114,100,0,20,0,9,18,99,111,111,114,100,52,0,59,119,
-0,18,108,111,100,0,20,0,4,118,101,99,52,95,116,101,120,98,49,100,0,18,95,95,114,101,116,86,97,108,
-0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,52,0,0,0,0,1,0,0,12,0,116,101,120,116,
-117,114,101,49,68,80,114,111,106,76,111,100,0,1,1,0,16,115,97,109,112,108,101,114,0,0,1,1,0,10,99,
-111,111,114,100,0,0,1,1,0,9,108,111,100,0,0,0,1,3,2,0,0,12,1,112,99,111,111,114,100,0,0,0,9,18,112,
-99,111,111,114,100,0,59,120,0,18,99,111,111,114,100,0,59,120,0,18,99,111,111,114,100,0,59,121,0,49,
-20,0,9,18,112,99,111,111,114,100,0,59,119,0,18,108,111,100,0,20,0,4,118,101,99,52,95,116,101,120,
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+121,122,0,18,99,111,111,114,100,0,59,120,121,122,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,18,
+112,99,111,111,114,100,0,59,119,0,18,108,111,100,0,20,0,4,118,101,99,52,95,116,101,120,98,51,100,0,
+18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,
+0,0,1,0,0,12,0,116,101,120,116,117,114,101,67,117,98,101,76,111,100,0,1,1,0,0,19,115,97,109,112,
+108,101,114,0,0,1,1,0,0,11,99,111,111,114,100,0,0,1,1,0,0,9,108,111,100,0,0,0,1,3,2,0,0,12,1,99,
+111,111,114,100,52,0,0,0,9,18,99,111,111,114,100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,20,
+0,9,18,99,111,111,114,100,52,0,59,119,0,18,108,111,100,0,20,0,4,118,101,99,52,95,116,101,120,99,
+117,98,101,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,
+114,100,52,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,49,68,76,111,100,0,1,1,0,0,20,115,97,109,112,
+108,101,114,0,0,1,1,0,0,11,99,111,111,114,100,0,0,1,1,0,0,9,108,111,100,0,0,0,1,3,2,0,0,12,1,99,
+111,111,114,100,52,0,0,0,9,18,99,111,111,114,100,52,0,59,120,121,122,0,18,99,111,111,114,100,0,20,
+0,9,18,99,111,111,114,100,52,0,59,119,0,18,108,111,100,0,20,0,4,118,101,99,52,95,116,101,120,98,49,
+100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,111,111,114,100,
+52,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,49,68,80,114,111,106,76,111,100,0,1,1,0,0,20,115,97,
+109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,1,1,0,0,9,108,111,100,0,0,0,1,3,2,0,0,12,
+1,112,99,111,111,114,100,0,0,0,9,18,112,99,111,111,114,100,0,59,120,0,18,99,111,111,114,100,0,59,
+120,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,18,112,99,111,111,114,100,0,59,122,0,18,99,111,
+111,114,100,0,59,122,0,20,0,9,18,112,99,111,111,114,100,0,59,119,0,18,108,111,100,0,20,0,4,118,101,
+99,52,95,116,101,120,98,49,100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,
+0,0,18,112,99,111,111,114,100,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,50,68,76,111,100,0,1,1,0,0,
+21,115,97,109,112,108,101,114,0,0,1,1,0,0,11,99,111,111,114,100,0,0,1,1,0,0,9,108,111,100,0,0,0,1,
+3,2,0,0,12,1,99,111,111,114,100,52,0,0,0,9,18,99,111,111,114,100,52,0,59,120,121,122,0,18,99,111,
+111,114,100,0,20,0,9,18,99,111,111,114,100,52,0,59,119,0,18,108,111,100,0,20,0,4,118,101,99,52,95,
+116,101,120,98,50,100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,109,112,108,101,114,0,0,18,99,
+111,111,114,100,52,0,0,0,0,1,0,0,12,0,115,104,97,100,111,119,50,68,80,114,111,106,76,111,100,0,1,1,
+0,0,21,115,97,109,112,108,101,114,0,0,1,1,0,0,12,99,111,111,114,100,0,0,1,1,0,0,9,108,111,100,0,0,
+0,1,3,2,0,0,12,1,112,99,111,111,114,100,0,0,0,9,18,112,99,111,111,114,100,0,59,120,121,0,18,99,111,
+111,114,100,0,59,120,121,0,18,99,111,111,114,100,0,59,119,0,49,20,0,9,18,112,99,111,111,114,100,0,
+59,122,0,18,99,111,111,114,100,0,59,122,0,20,0,9,18,112,99,111,111,114,100,0,59,119,0,18,108,111,
+100,0,20,0,4,118,101,99,52,95,116,101,120,98,50,100,0,18,95,95,114,101,116,86,97,108,0,0,18,115,97,
+109,112,108,101,114,0,0,18,112,99,111,111,114,100,0,0,0,0,0
diff --git a/src/mesa/shader/slang/slang_codegen.c b/src/mesa/shader/slang/slang_codegen.c
index 72a3c0ef9ea..ea35d679694 100644
--- a/src/mesa/shader/slang/slang_codegen.c
+++ b/src/mesa/shader/slang/slang_codegen.c
@@ -413,6 +413,9 @@ static slang_asm_info AsmInfo[] = {
{ "vec4_multiply", IR_MUL, 1, 2 },
{ "vec4_dot", IR_DOT4, 1, 2 },
{ "vec3_dot", IR_DOT3, 1, 2 },
+ { "vec2_dot", IR_DOT2, 1, 2 },
+ { "vec3_nrm", IR_NRM3, 1, 1 },
+ { "vec4_nrm", IR_NRM4, 1, 1 },
{ "vec3_cross", IR_CROSS, 1, 2 },
{ "vec4_lrp", IR_LRP, 1, 3 },
{ "vec4_min", IR_MIN, 1, 2 },
@@ -2309,7 +2312,7 @@ _slang_gen_if(slang_assemble_ctx * A, const slang_operation *oper)
/* type-check expression */
if (!_slang_is_boolean(A, &oper->children[0])) {
- slang_info_log_error(A->log, "boolean expression expected for 'while'");
+ slang_info_log_error(A->log, "boolean expression expected for 'if'");
return NULL;
}
@@ -2439,12 +2442,6 @@ _slang_gen_var_decl(slang_assemble_ctx *A, slang_variable *var)
/*assert(!var->declared);*/
var->declared = GL_TRUE;
- if(is_sampler_type(&var->type)) {
- slang_info_log_error(A->log, "redeclaration of sampler '%s'",
- (char*) var->a_name);
- return NULL;
- }
-
n = new_node0(IR_VAR_DECL);
if (n) {
_slang_attach_storage(n, var);
@@ -2453,7 +2450,13 @@ _slang_gen_var_decl(slang_assemble_ctx *A, slang_variable *var)
assert(n->Store);
assert(n->Store->Index < 0);
- n->Store->File = PROGRAM_TEMPORARY;
+ if (is_sampler_type(&var->type)) {
+ n->Store->File = PROGRAM_SAMPLER;
+ }
+ else {
+ n->Store->File = PROGRAM_TEMPORARY;
+ }
+
n->Store->Size = _slang_sizeof_type_specifier(&n->Var->type.specifier);
if (n->Store->Size <= 0) {
@@ -3253,7 +3256,7 @@ _slang_gen_array_element(slang_assemble_ctx * A, slang_operation *oper)
index = _slang_gen_operation(A, &oper->children[1]);
if (array && index) {
/* bounds check */
- GLint constIndex = 0;
+ GLint constIndex = -1;
if (index->Opcode == IR_FLOAT) {
constIndex = (int) index->Value[0];
if (constIndex < 0 || constIndex >= arrayLen) {
@@ -3811,6 +3814,8 @@ _slang_codegen_global_variable(slang_assemble_ctx *A, slang_variable *var,
if (dbg) printf("VARYING ");
}
else if (var->type.qualifier == SLANG_QUAL_ATTRIBUTE) {
+ GLuint swizzle;
+ GLint index;
/* attributes must be float, vec or mat */
if (!_slang_type_is_float_vec_mat(var->type.specifier.type)) {
slang_info_log_error(A->log,
@@ -3822,20 +3827,18 @@ _slang_codegen_global_variable(slang_assemble_ctx *A, slang_variable *var,
if (prog) {
/* user-defined vertex attribute */
const GLint attr = -1; /* unknown */
- GLint index = _mesa_add_attribute(prog->Attributes, varName,
- size, datatype, attr);
+ swizzle = _slang_var_swizzle(size, 0);
+ index = _mesa_add_attribute(prog->Attributes, varName,
+ size, datatype, attr);
assert(index >= 0);
- store = _slang_new_ir_storage(PROGRAM_INPUT,
- VERT_ATTRIB_GENERIC0 + index, size);
+ index = VERT_ATTRIB_GENERIC0 + index;
}
else {
/* pre-defined vertex attrib */
- GLuint swizzle;
- GLint index = _slang_input_index(varName, GL_VERTEX_PROGRAM_ARB,
- &swizzle);
+ index = _slang_input_index(varName, GL_VERTEX_PROGRAM_ARB, &swizzle);
assert(index >= 0);
- store = _slang_new_ir_storage_swz(PROGRAM_INPUT, index, size, swizzle);
}
+ store = _slang_new_ir_storage_swz(PROGRAM_INPUT, index, size, swizzle);
if (dbg) printf("ATTRIB ");
}
else if (var->type.qualifier == SLANG_QUAL_FIXEDINPUT) {
diff --git a/src/mesa/shader/slang/slang_compile.c b/src/mesa/shader/slang/slang_compile.c
index 9cf0f8b81a3..294e46235c2 100644
--- a/src/mesa/shader/slang/slang_compile.c
+++ b/src/mesa/shader/slang/slang_compile.c
@@ -800,6 +800,7 @@ parse_fully_specified_type(slang_parse_ctx * C, slang_output_ctx * O,
#define OP_FIELD 59
#define OP_POSTINCREMENT 60
#define OP_POSTDECREMENT 61
+#define OP_PRECISION 62
/**
@@ -971,6 +972,16 @@ parse_statement(slang_parse_ctx * C, slang_output_ctx * O,
return 0;
}
break;
+ case OP_PRECISION:
+ {
+ /* set default precision for a type in this scope */
+ /* ignored at this time */
+ int prec_qual = *C->I++;
+ int datatype = *C->I++;
+ (void) prec_qual;
+ (void) datatype;
+ }
+ break;
default:
return 0;
}
@@ -1295,12 +1306,16 @@ static int
parse_parameter_declaration(slang_parse_ctx * C, slang_output_ctx * O,
slang_variable * param)
{
+ int param_qual, precision_qual;
+
/* parse and validate the parameter's type qualifiers (there can be
* two at most) because not all combinations are valid
*/
if (!parse_type_qualifier(C, &param->type.qualifier))
return 0;
- switch (*C->I++) {
+
+ param_qual = *C->I++;
+ switch (param_qual) {
case PARAM_QUALIFIER_IN:
if (param->type.qualifier != SLANG_QUAL_CONST
&& param->type.qualifier != SLANG_QUAL_NONE) {
@@ -1328,6 +1343,11 @@ parse_parameter_declaration(slang_parse_ctx * C, slang_output_ctx * O,
return 0;
}
+ /* parse precision qualifier (lowp, mediump, highp */
+ precision_qual = *C->I++;
+ /* ignored at this time */
+ (void) precision_qual;
+
/* parse parameter's type specifier and name */
if (!parse_type_specifier(C, O, &param->type.specifier))
return 0;
diff --git a/src/mesa/shader/slang/slang_compile_operation.c b/src/mesa/shader/slang/slang_compile_operation.c
index c0d469c8294..53cf6faff97 100644
--- a/src/mesa/shader/slang/slang_compile_operation.c
+++ b/src/mesa/shader/slang/slang_compile_operation.c
@@ -80,10 +80,23 @@ slang_replace_scope(slang_operation *oper,
slang_variable_scope *newScope)
{
GLuint i;
+
if (oper->locals != newScope &&
oper->locals->outer_scope == oldScope) {
+ /* found. replace old w/ new */
oper->locals->outer_scope = newScope;
}
+
+ if (oper->type == SLANG_OPER_VARIABLE_DECL) {
+ /* search/replace in the initializer */
+ slang_variable *var;
+ var = _slang_locate_variable(oper->locals, oper->a_id, GL_TRUE);
+ if (var && var->initializer) {
+ slang_replace_scope(var->initializer, oldScope, newScope);
+ }
+ }
+
+ /* search/replace in children */
for (i = 0; i < oper->num_children; i++) {
slang_replace_scope(&oper->children[i], oldScope, newScope);
}
@@ -148,7 +161,9 @@ slang_operation_copy(slang_operation * x, const slang_operation * y)
/* If this operation declares a new scope, we need to make sure
* all children point to it, not the original operation's scope!
*/
- if (x->type == SLANG_OPER_BLOCK_NEW_SCOPE) {
+ if (x->type == SLANG_OPER_BLOCK_NEW_SCOPE ||
+ x->type == SLANG_OPER_WHILE ||
+ x->type == SLANG_OPER_FOR) {
slang_replace_scope(x, y->locals, x->locals);
}
diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c
index f3c3fa6c5b3..827760c917a 100644
--- a/src/mesa/shader/slang/slang_emit.c
+++ b/src/mesa/shader/slang/slang_emit.c
@@ -330,6 +330,17 @@ constant_to_src_reg(struct prog_src_register *src, GLfloat val,
}
+static void
+address_to_dst_reg(struct prog_dst_register *dst, GLuint index)
+{
+ assert(index == 0); /* only one address reg at this time */
+ dst->File = PROGRAM_ADDRESS;
+ dst->Index = index;
+ dst->WriteMask = WRITEMASK_X;
+}
+
+
+
/**
* Add new instruction at end of given program.
* \param prog the program to append instruction onto
@@ -477,6 +488,9 @@ instruction_annotation(gl_inst_opcode opcode, char *dstAnnot,
case OPCODE_MUL:
operator = "*";
break;
+ case OPCODE_DP2:
+ operator = "DP2";
+ break;
case OPCODE_DP3:
operator = "DP3";
break;
@@ -614,6 +628,7 @@ emit_arith(slang_emit_info *emitInfo, slang_ir_node *n)
/* result storage */
alloc_node_storage(emitInfo, n, -1);
+
assert(n->Store->Index >= 0);
if (n->Store->Size == 2)
n->Writemask = WRITEMASK_XY;
@@ -696,7 +711,7 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)
}
else {
assert(size == 2);
- dotOp = OPCODE_DP3;
+ dotOp = OPCODE_DP3; /* XXX use OPCODE_DP2 eventually */
swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y);
}
@@ -1085,6 +1100,14 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)
n->Store = n->Children[0]->Store;
+ if (n->Store->File == PROGRAM_SAMPLER) {
+ /* no code generated for sampler assignments,
+ * just copy the sampler index at compile time.
+ */
+ n->Store->Index = n->Children[1]->Store->Index;
+ return NULL;
+ }
+
#if PEEPHOLE_OPTIMIZATIONS
if (inst &&
_slang_is_temp(emitInfo->vt, n->Children[1]->Store) &&
@@ -1538,6 +1561,60 @@ emit_swizzle(slang_emit_info *emitInfo, slang_ir_node *n)
/**
+ * Move a block registers from src to dst (or move a single register).
+ * \param size size of block, in floats (<=4 means one register)
+ */
+static struct prog_instruction *
+move_block(slang_emit_info *emitInfo,
+ GLuint size, GLboolean relAddr,
+ const slang_ir_storage *dst,
+ const slang_ir_storage *src)
+{
+ struct prog_instruction *inst;
+
+ if (size > 4) {
+ /* move matrix/struct etc (block of registers) */
+ slang_ir_storage dstStore = *dst;
+ slang_ir_storage srcStore = *src;
+ //GLint size = srcStore.Size;
+ /*ASSERT(n->Children[0]->Writemask == WRITEMASK_XYZW);
+ ASSERT(n->Children[1]->Store->Swizzle == SWIZZLE_NOOP);
+ */
+ dstStore.Size = 4;
+ srcStore.Size = 4;
+ while (size >= 4) {
+ inst = new_instruction(emitInfo, OPCODE_MOV);
+ inst->Comment = _mesa_strdup("IR_COPY block");
+ storage_to_dst_reg(&inst->DstReg, &dstStore, WRITEMASK_XYZW);
+ storage_to_src_reg(&inst->SrcReg[0], &srcStore);
+ inst->SrcReg[0].RelAddr = relAddr;
+ srcStore.Index++;
+ dstStore.Index++;
+ size -= 4;
+ }
+ }
+ else {
+ /* single register move */
+ GLuint writemask;
+ if (size == 1) {
+ GLuint comp = GET_SWZ(src->Swizzle, 0);
+ assert(comp < 4);
+ writemask = WRITEMASK_X << comp;
+ }
+ else {
+ writemask = WRITEMASK_XYZW;
+ }
+ inst = new_instruction(emitInfo, OPCODE_MOV);
+ storage_to_dst_reg(&inst->DstReg, dst, writemask);
+ storage_to_src_reg(&inst->SrcReg[0], src);
+ inst->SrcReg[0].RelAddr = relAddr;
+ }
+ return inst;
+}
+
+
+
+/**
* Dereference array element. Just resolve storage for the array
* element represented by this node.
*/
@@ -1579,24 +1656,47 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)
else {
/* Variable array index */
struct prog_instruction *inst;
- slang_ir_storage dstStore = *n->Store;
/* do codegen for array index expression */
emit(emitInfo, n->Children[1]);
- inst = new_instruction(emitInfo, OPCODE_ARL);
+ /* allocate temp storage for the array element */
+ assert(n->Store->Index < 0);
+ n->Store->File = PROGRAM_TEMPORARY;
+ n->Store->Parent = NULL;
+ alloc_node_storage(emitInfo, n, -1);
+
+ if (n->Store->Size > 4) {
+ /* need to multiply the index by the element size */
+ GLint elemSize = (n->Store->Size + 3) / 4;
+ slang_ir_storage indexTemp;
+
+ /* allocate 1 float indexTemp */
+ alloc_local_temp(emitInfo, &indexTemp, 1);
- if (dstStore.Size > 4)
- dstStore.Size = 4; /* only emit one instruction */
+ /* MUL temp, index, elemSize */
+ inst = new_instruction(emitInfo, OPCODE_MUL);
+ storage_to_dst_reg(&inst->DstReg, &indexTemp, WRITEMASK_X);
+ storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
+ constant_to_src_reg(&inst->SrcReg[1], elemSize, emitInfo);
- storage_to_dst_reg(&inst->DstReg, &dstStore, n->Writemask);
- storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
+ /* load ADDR[0].X = temp */
+ inst = new_instruction(emitInfo, OPCODE_ARL);
+ storage_to_src_reg(&inst->SrcReg[0], &indexTemp);
+ address_to_dst_reg(&inst->DstReg, 0);
- inst->DstReg.File = PROGRAM_ADDRESS;
- inst->DstReg.Index = 0; /* always address register [0] */
- inst->Comment = _mesa_strdup("ARL ADDR");
+ _slang_free_temp(emitInfo->vt, &indexTemp);
+ }
+ else {
+ /* simply load address reg w/ array index */
+ inst = new_instruction(emitInfo, OPCODE_ARL);
+ storage_to_src_reg(&inst->SrcReg[0], n->Children[1]->Store);
+ address_to_dst_reg(&inst->DstReg, 0);
+ }
- n->Store->RelAddr = GL_TRUE;
+ /* copy from array element to temp storage */
+ move_block(emitInfo, n->Store->Size, GL_TRUE,
+ n->Store, n->Children[0]->Store);
}
/* if array element size is one, make sure we only access X */
@@ -1796,12 +1896,15 @@ emit(slang_emit_info *emitInfo, slang_ir_node *n)
case IR_NOISE2:
case IR_NOISE3:
case IR_NOISE4:
+ case IR_NRM4:
+ case IR_NRM3:
/* binary */
case IR_ADD:
case IR_SUB:
case IR_MUL:
case IR_DOT4:
case IR_DOT3:
+ case IR_DOT2:
case IR_CROSS:
case IR_MIN:
case IR_MAX:
diff --git a/src/mesa/shader/slang/slang_ir.c b/src/mesa/shader/slang/slang_ir.c
index 3a0b8bf3a0d..9d055bf3543 100644
--- a/src/mesa/shader/slang/slang_ir.c
+++ b/src/mesa/shader/slang/slang_ir.c
@@ -27,6 +27,7 @@
#include "main/context.h"
#include "slang_ir.h"
#include "slang_mem.h"
+#include "shader/prog_instruction.h"
#include "shader/prog_print.h"
@@ -36,8 +37,11 @@ static const slang_ir_info IrInfo[] = {
{ IR_SUB, "IR_SUB", OPCODE_SUB, 4, 2 },
{ IR_MUL, "IR_MUL", OPCODE_MUL, 4, 2 },
{ IR_DIV, "IR_DIV", OPCODE_NOP, 0, 2 }, /* XXX broke */
- { IR_DOT4, "IR_DOT_4", OPCODE_DP4, 1, 2 },
- { IR_DOT3, "IR_DOT_3", OPCODE_DP3, 1, 2 },
+ { IR_DOT4, "IR_DOT4", OPCODE_DP4, 1, 2 },
+ { IR_DOT3, "IR_DOT3", OPCODE_DP3, 1, 2 },
+ { IR_DOT2, "IR_DOT2", OPCODE_DP2, 1, 2 },
+ { IR_NRM4, "IR_NRM4", OPCODE_NRM4, 1, 1 },
+ { IR_NRM3, "IR_NRM3", OPCODE_NRM3, 1, 1 },
{ IR_CROSS, "IR_CROSS", OPCODE_XPD, 3, 2 },
{ IR_LRP, "IR_LRP", OPCODE_LRP, 4, 3 },
{ IR_MIN, "IR_MIN", OPCODE_MIN, 4, 2 },
@@ -56,7 +60,7 @@ static const slang_ir_info IrInfo[] = {
/* unary ops */
{ IR_MOVE, "IR_MOVE", OPCODE_MOV, 4, 1 },
{ IR_I_TO_F, "IR_I_TO_F", OPCODE_MOV, 4, 1 }, /* int[4] to float[4] */
- { IR_F_TO_I, "IR_F_TO_I", OPCODE_INT, 4, 1 }, /* 4 floats to 4 ints */
+ { IR_F_TO_I, "IR_F_TO_I", OPCODE_TRUNC, 4, 1 },
{ IR_EXP, "IR_EXP", OPCODE_EXP, 1, 1 },
{ IR_EXP2, "IR_EXP2", OPCODE_EX2, 1, 1 },
{ IR_LOG2, "IR_LOG2", OPCODE_LG2, 1, 1 },
diff --git a/src/mesa/shader/slang/slang_ir.h b/src/mesa/shader/slang/slang_ir.h
index f64f9a93b78..ab0353c28a5 100644
--- a/src/mesa/shader/slang/slang_ir.h
+++ b/src/mesa/shader/slang/slang_ir.h
@@ -83,6 +83,9 @@ typedef enum
IR_DIV,
IR_DOT4,
IR_DOT3,
+ IR_DOT2,
+ IR_NRM4,
+ IR_NRM3,
IR_CROSS, /* vec3 cross product */
IR_LRP,
IR_CLAMP,
diff --git a/src/mesa/shader/slang/slang_link.c b/src/mesa/shader/slang/slang_link.c
index 00e89537685..2074e842094 100644
--- a/src/mesa/shader/slang/slang_link.c
+++ b/src/mesa/shader/slang/slang_link.c
@@ -219,6 +219,7 @@ link_uniform_vars(struct gl_shader_program *shProg,
inst->Sampler, map[ inst->Sampler ]);
*/
/* here, texUnit is really samplerUnit */
+ assert(inst->TexSrcUnit < MAX_SAMPLERS);
inst->TexSrcUnit = samplerMap[inst->TexSrcUnit];
prog->SamplerTargets[inst->TexSrcUnit] = inst->TexSrcTarget;
prog->SamplersUsed |= (1 << inst->TexSrcUnit);
@@ -560,35 +561,39 @@ _slang_link(GLcontext *ctx,
if (fragProg && shProg->FragmentProgram) {
+ /* Compute initial program's TexturesUsed info */
+ _mesa_update_shader_textures_used(&shProg->FragmentProgram->Base);
+
/* notify driver that a new fragment program has been compiled/linked */
ctx->Driver.ProgramStringNotify(ctx, GL_FRAGMENT_PROGRAM_ARB,
&shProg->FragmentProgram->Base);
-#if 0
- printf("************** original fragment program\n");
- _mesa_print_program(&fragProg->Base);
- _mesa_print_program_parameters(ctx, &fragProg->Base);
-#endif
-#if 0
- printf("************** linked fragment prog\n");
- _mesa_print_program(&shProg->FragmentProgram->Base);
- _mesa_print_program_parameters(ctx, &shProg->FragmentProgram->Base);
-#endif
+ if (MESA_VERBOSE & VERBOSE_GLSL_DUMP) {
+ printf("Mesa original fragment program:\n");
+ _mesa_print_program(&fragProg->Base);
+ _mesa_print_program_parameters(ctx, &fragProg->Base);
+
+ printf("Mesa post-link fragment program:\n");
+ _mesa_print_program(&shProg->FragmentProgram->Base);
+ _mesa_print_program_parameters(ctx, &shProg->FragmentProgram->Base);
+ }
}
if (vertProg && shProg->VertexProgram) {
+ /* Compute initial program's TexturesUsed info */
+ _mesa_update_shader_textures_used(&shProg->VertexProgram->Base);
+
/* notify driver that a new vertex program has been compiled/linked */
ctx->Driver.ProgramStringNotify(ctx, GL_VERTEX_PROGRAM_ARB,
&shProg->VertexProgram->Base);
-#if 0
- printf("************** original vertex program\n");
- _mesa_print_program(&vertProg->Base);
- _mesa_print_program_parameters(ctx, &vertProg->Base);
-#endif
-#if 0
- printf("************** linked vertex prog\n");
- _mesa_print_program(&shProg->VertexProgram->Base);
- _mesa_print_program_parameters(ctx, &shProg->VertexProgram->Base);
-#endif
+ if (MESA_VERBOSE & VERBOSE_GLSL_DUMP) {
+ printf("Mesa original vertex program:\n");
+ _mesa_print_program(&vertProg->Base);
+ _mesa_print_program_parameters(ctx, &vertProg->Base);
+
+ printf("Mesa post-link vertex program:\n");
+ _mesa_print_program(&shProg->VertexProgram->Base);
+ _mesa_print_program_parameters(ctx, &shProg->VertexProgram->Base);
+ }
}
shProg->LinkStatus = (shProg->VertexProgram || shProg->FragmentProgram);
diff --git a/src/mesa/shader/slang/slang_log.c b/src/mesa/shader/slang/slang_log.c
index 01591ceba5c..25f696f67ea 100644
--- a/src/mesa/shader/slang/slang_log.c
+++ b/src/mesa/shader/slang/slang_log.c
@@ -23,6 +23,7 @@
*/
#include "main/imports.h"
+#include "main/context.h"
#include "slang_log.h"
#include "slang_utility.h"
@@ -86,9 +87,11 @@ slang_info_log_message(slang_info_log * log, const char *prefix,
}
slang_string_concat(log->text, msg);
slang_string_concat(log->text, "\n");
-#if 0 /* debug */
- _mesa_printf("Mesa GLSL error/warning: %s\n", log->text);
-#endif
+
+ if (MESA_VERBOSE & VERBOSE_GLSL) {
+ _mesa_printf("Mesa: GLSL %s", log->text);
+ }
+
return 1;
}
diff --git a/src/mesa/shader/slang/slang_print.c b/src/mesa/shader/slang/slang_print.c
index 4422f70159f..b88cefc283b 100644
--- a/src/mesa/shader/slang/slang_print.c
+++ b/src/mesa/shader/slang/slang_print.c
@@ -379,28 +379,43 @@ slang_print_tree(const slang_operation *op, int indent)
case SLANG_OPER_WHILE:
assert(op->num_children == 2);
spaces(indent);
+ printf("WHILE LOOP: locals = %p\n", (void *) op->locals);
+ indent += 3;
+ spaces(indent);
printf("WHILE cond:\n");
slang_print_tree(&op->children[0], indent + 3);
spaces(indent);
printf("WHILE body:\n");
slang_print_tree(&op->children[1], indent + 3);
+ indent -= 3;
+ spaces(indent);
+ printf("END WHILE LOOP\n");
break;
case SLANG_OPER_DO:
spaces(indent);
+ printf("DO LOOP: locals = %p\n", (void *) op->locals);
+ indent += 3;
+ spaces(indent);
printf("DO body:\n");
slang_print_tree(&op->children[0], indent + 3);
spaces(indent);
printf("DO cond:\n");
slang_print_tree(&op->children[1], indent + 3);
+ indent -= 3;
+ spaces(indent);
+ printf("END DO LOOP\n");
break;
case SLANG_OPER_FOR:
spaces(indent);
+ printf("FOR LOOP: locals = %p\n", (void *) op->locals);
+ indent += 3;
+ spaces(indent);
printf("FOR init:\n");
slang_print_tree(&op->children[0], indent + 3);
spaces(indent);
- printf("FOR while:\n");
+ printf("FOR condition:\n");
slang_print_tree(&op->children[1], indent + 3);
spaces(indent);
printf("FOR step:\n");
@@ -408,6 +423,7 @@ slang_print_tree(const slang_operation *op, int indent)
spaces(indent);
printf("FOR body:\n");
slang_print_tree(&op->children[3], indent + 3);
+ indent -= 3;
spaces(indent);
printf("ENDFOR\n");
/*
diff --git a/src/mesa/shader/slang/slang_vartable.c b/src/mesa/shader/slang/slang_vartable.c
index 9b607e64037..95971a70a93 100644
--- a/src/mesa/shader/slang/slang_vartable.c
+++ b/src/mesa/shader/slang/slang_vartable.c
@@ -115,6 +115,11 @@ _slang_pop_var_table(slang_var_table *vt)
store->Index,
_mesa_swizzle_string(store->Swizzle, 0, 0));
+ if (store->File == PROGRAM_SAMPLER) {
+ /* samplers have no storage */
+ continue;
+ }
+
if (store->Size == 1)
comp = GET_SWZ(store->Swizzle, 0);
else
@@ -241,7 +246,15 @@ GLboolean
_slang_alloc_var(slang_var_table *vt, slang_ir_storage *store)
{
struct table *t = vt->Top;
- const int i = alloc_reg(vt, store->Size, GL_FALSE);
+ int i;
+
+ if (store->File == PROGRAM_SAMPLER) {
+ /* don't really allocate storage */
+ store->Index = 0;
+ return GL_TRUE;
+ }
+
+ i = alloc_reg(vt, store->Size, GL_FALSE);
if (i < 0)
return GL_FALSE;
diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c b/src/mesa/state_tracker/st_atom_framebuffer.c
index b4f42c6f93f..ca1a719a9ac 100644
--- a/src/mesa/state_tracker/st_atom_framebuffer.c
+++ b/src/mesa/state_tracker/st_atom_framebuffer.c
@@ -116,10 +116,11 @@ update_framebuffer_state( struct st_context *st )
/* rendering to a GL texture, may have to update surface */
update_renderbuffer_surface(st, strb);
}
-
- assert(strb->surface);
- framebuffer->cbufs[framebuffer->num_cbufs] = strb->surface;
- framebuffer->num_cbufs++;
+
+ if (strb->surface) {
+ framebuffer->cbufs[framebuffer->num_cbufs] = strb->surface;
+ framebuffer->num_cbufs++;
+ }
}
strb = st_renderbuffer(fb->Attachment[BUFFER_DEPTH].Renderbuffer);
@@ -130,7 +131,6 @@ update_framebuffer_state( struct st_context *st )
update_renderbuffer_surface(st, strb);
}
- assert(strb->surface);
framebuffer->zsbuf = strb->surface;
}
else {
diff --git a/src/mesa/state_tracker/st_cb_bitmap.c b/src/mesa/state_tracker/st_cb_bitmap.c
index 694104f9cfb..3d508227e12 100644
--- a/src/mesa/state_tracker/st_cb_bitmap.c
+++ b/src/mesa/state_tracker/st_cb_bitmap.c
@@ -779,7 +779,7 @@ st_destroy_bitmap(struct st_context *st)
}
if (st->bitmap.vbuf) {
- pipe_buffer_destroy(pipe->screen, st->bitmap.vbuf);
+ pipe_buffer_reference(pipe->screen, &st->bitmap.vbuf, NULL);
st->bitmap.vbuf = NULL;
}
diff --git a/src/mesa/state_tracker/st_cb_clear.c b/src/mesa/state_tracker/st_cb_clear.c
index 47ad3c2bc12..1412a3761f1 100644
--- a/src/mesa/state_tracker/st_cb_clear.c
+++ b/src/mesa/state_tracker/st_cb_clear.c
@@ -116,7 +116,7 @@ st_destroy_clear(struct st_context *st)
st->clear.vs = NULL;
}
if (st->clear.vbuf) {
- pipe_buffer_destroy(pipe->screen, st->clear.vbuf);
+ pipe_buffer_reference(pipe->screen, &st->clear.vbuf, NULL);
st->clear.vbuf = NULL;
}
}
@@ -406,13 +406,17 @@ check_clear_stencil_with_quad(GLcontext *ctx, struct gl_renderbuffer *rb)
static void
clear_color_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
{
+ struct st_renderbuffer *strb = st_renderbuffer(rb);
+
+ if (!strb->surface)
+ return;
+
if (check_clear_color_with_quad( ctx, rb )) {
/* masking or scissoring */
clear_with_quad(ctx, GL_TRUE, GL_FALSE, GL_FALSE);
}
else {
/* clear whole buffer w/out masking */
- struct st_renderbuffer *strb = st_renderbuffer(rb);
uint clearValue;
/* NOTE: we always pass the clear color as PIPE_FORMAT_A8R8G8B8_UNORM
* at this time!
@@ -426,13 +430,16 @@ clear_color_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
static void
clear_depth_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
{
+ struct st_renderbuffer *strb = st_renderbuffer(rb);
+
+ if (!strb->surface)
+ return;
+
if (check_clear_depth_with_quad(ctx, rb)) {
/* scissoring or we have a combined depth/stencil buffer */
clear_with_quad(ctx, GL_FALSE, GL_TRUE, GL_FALSE);
}
else {
- struct st_renderbuffer *strb = st_renderbuffer(rb);
-
/* simple clear of whole buffer */
uint clearValue = util_pack_z(strb->surface->format, ctx->Depth.Clear);
ctx->st->pipe->clear(ctx->st->pipe, strb->surface, clearValue);
@@ -443,13 +450,16 @@ clear_depth_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
static void
clear_stencil_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
{
+ struct st_renderbuffer *strb = st_renderbuffer(rb);
+
+ if (!strb->surface)
+ return;
+
if (check_clear_stencil_with_quad(ctx, rb)) {
/* masking or scissoring or combined depth/stencil buffer */
clear_with_quad(ctx, GL_FALSE, GL_FALSE, GL_TRUE);
}
else {
- struct st_renderbuffer *strb = st_renderbuffer(rb);
-
/* simple clear of whole buffer */
GLuint clearValue = ctx->Stencil.Clear;
@@ -469,14 +479,16 @@ clear_stencil_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
static void
clear_depth_stencil_buffer(GLcontext *ctx, struct gl_renderbuffer *rb)
{
+ struct st_renderbuffer *strb = st_renderbuffer(rb);
+
+ if (!strb->surface)
+ return;
if (check_clear_depth_stencil_with_quad(ctx, rb)) {
/* masking or scissoring */
clear_with_quad(ctx, GL_FALSE, GL_TRUE, GL_TRUE);
}
else {
- struct st_renderbuffer *strb = st_renderbuffer(rb);
-
/* clear whole buffer w/out masking */
GLuint clearValue = util_pack_z(strb->surface->format, ctx->Depth.Clear);
diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c
index 61949a93884..7cf06da43cc 100644
--- a/src/mesa/state_tracker/st_draw.c
+++ b/src/mesa/state_tracker/st_draw.c
@@ -33,6 +33,7 @@
#include "main/imports.h"
#include "main/image.h"
#include "main/macros.h"
+#include "shader/prog_uniform.h"
#include "vbo/vbo.h"
@@ -483,6 +484,28 @@ setup_non_interleaved_attribs(GLcontext *ctx,
+/**
+ * Prior to drawing, check that any uniforms referenced by the
+ * current shader have been set. If a uniform has not been set,
+ * issue a warning.
+ */
+static void
+check_uniforms(GLcontext *ctx)
+{
+ const struct gl_shader_program *shProg = ctx->Shader.CurrentProgram;
+ if (shProg && shProg->LinkStatus) {
+ GLuint i;
+ for (i = 0; i < shProg->Uniforms->NumUniforms; i++) {
+ const struct gl_uniform *u = &shProg->Uniforms->Uniforms[i];
+ if (!u->Initialized) {
+ _mesa_warning(ctx,
+ "Using shader with uninitialized uniform: %s",
+ u->Name);
+ }
+ }
+ }
+}
+
/**
* This function gets plugged into the VBO module and is called when
@@ -516,6 +539,10 @@ st_draw_vbo(GLcontext *ctx,
vp = ctx->st->vp;
vs = &ctx->st->vp->state;
+ if (MESA_VERBOSE & VERBOSE_GLSL) {
+ check_uniforms(ctx);
+ }
+
/*
* Setup the vbuffer[] and velements[] arrays.
*/
@@ -557,6 +584,9 @@ st_draw_vbo(GLcontext *ctx,
pipe->set_vertex_buffers(pipe, num_vbuffers, vbuffer);
pipe->set_vertex_elements(pipe, num_velements, velements);
+ if (num_vbuffers == 0 || num_velements == 0)
+ return;
+
/* do actual drawing */
if (ib) {
/* indexed primitive */
diff --git a/src/mesa/state_tracker/st_framebuffer.c b/src/mesa/state_tracker/st_framebuffer.c
index 1ff70093823..6fd731d209d 100644
--- a/src/mesa/state_tracker/st_framebuffer.c
+++ b/src/mesa/state_tracker/st_framebuffer.c
@@ -176,7 +176,9 @@ st_set_framebuffer_surface(struct st_framebuffer *stfb,
assert(surfIndex < BUFFER_COUNT);
strb = st_renderbuffer(stfb->Base.Attachment[surfIndex].Renderbuffer);
- assert(strb);
+
+ /* fail */
+ if (!strb) return;
/* replace the renderbuffer's surface/texture pointers */
pipe_surface_reference( &strb->surface, surf );
@@ -289,7 +291,8 @@ st_notify_swapbuffers_complete(struct st_framebuffer *stfb)
for (i = 0; i < BUFFER_COUNT; i++) {
if (stfb->Base.Attachment[i].Renderbuffer) {
strb = st_renderbuffer(stfb->Base.Attachment[i].Renderbuffer);
- strb->surface->status = PIPE_SURFACE_STATUS_UNDEFINED;
+ if (strb->surface)
+ strb->surface->status = PIPE_SURFACE_STATUS_UNDEFINED;
}
}
}
diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index 50e638df46b..59c1abe4882 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -346,6 +346,12 @@ compile_instruction(
case OPCODE_DDY:
fullinst->Instruction.Opcode = TGSI_OPCODE_DDY;
break;
+ case OPCODE_DP2:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_DP2;
+ break;
+ case OPCODE_DP2A:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_DP2A;
+ break;
case OPCODE_DP3:
fullinst->Instruction.Opcode = TGSI_OPCODE_DP3;
break;
@@ -389,8 +395,8 @@ compile_instruction(
fullinst->Instruction.Opcode = TGSI_OPCODE_IF;
fullinst->InstructionExtLabel.Label = inst->BranchTarget + preamble_size;
break;
- case OPCODE_INT:
- fullinst->Instruction.Opcode = TGSI_OPCODE_INT;
+ case OPCODE_TRUNC:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_TRUNC;
break;
case OPCODE_KIL:
/* conditional */
@@ -443,6 +449,12 @@ compile_instruction(
case OPCODE_NOP:
fullinst->Instruction.Opcode = TGSI_OPCODE_NOP;
break;
+ case OPCODE_NRM3:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_NRM;
+ break;
+ case OPCODE_NRM4:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_NRM4;
+ break;
case OPCODE_POW:
fullinst->Instruction.Opcode = TGSI_OPCODE_POW;
break;
@@ -492,6 +504,9 @@ compile_instruction(
case OPCODE_SNE:
fullinst->Instruction.Opcode = TGSI_OPCODE_SNE;
break;
+ case OPCODE_SSG:
+ fullinst->Instruction.Opcode = TGSI_OPCODE_SSG;
+ break;
case OPCODE_SUB:
fullinst->Instruction.Opcode = TGSI_OPCODE_SUB;
break;
diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c
index 55b52c37451..af0df22dc59 100644
--- a/src/mesa/state_tracker/st_program.c
+++ b/src/mesa/state_tracker/st_program.c
@@ -512,3 +512,19 @@ st_translate_fragment_program(struct st_context *st,
tgsi_dump( fs.tokens, 0/*TGSI_DUMP_VERBOSE*/ );
}
+
+/**
+ * Debug- print current shader text
+ */
+void
+st_print_shaders(GLcontext *ctx)
+{
+ struct gl_shader_program *shProg = ctx->Shader.CurrentProgram;
+ if (shProg) {
+ GLuint i;
+ for (i = 0; i < shProg->NumShaders; i++) {
+ printf("GLSL shader %u of %u:\n", i, shProg->NumShaders);
+ printf("%s\n", shProg->Shaders[i]->Source);
+ }
+ }
+}
diff --git a/src/mesa/state_tracker/st_program.h b/src/mesa/state_tracker/st_program.h
index 078e2c42a69..e2e5eddef22 100644
--- a/src/mesa/state_tracker/st_program.h
+++ b/src/mesa/state_tracker/st_program.h
@@ -151,4 +151,8 @@ st_translate_vertex_program(struct st_context *st,
const ubyte *fs_input_semantic_index);
+extern void
+st_print_shaders(GLcontext *ctx);
+
+
#endif