diff options
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 20 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 2 |
4 files changed, 15 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 4089ab6f56a..e02c2307593 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1000,6 +1000,7 @@ enum opcode { SHADER_OPCODE_TG4_OFFSET, SHADER_OPCODE_TG4_OFFSET_LOGICAL, SHADER_OPCODE_SAMPLEINFO, + SHADER_OPCODE_SAMPLEINFO_LOGICAL, /** * Combines multiple sources of size 1 into a larger virtual GRF. diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 822d863ab1c..5d3b9f70f45 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -742,6 +742,7 @@ fs_inst::components_read(unsigned i) const case SHADER_OPCODE_LOD_LOGICAL: case SHADER_OPCODE_TG4_LOGICAL: case SHADER_OPCODE_TG4_OFFSET_LOGICAL: + case SHADER_OPCODE_SAMPLEINFO_LOGICAL: assert(src[TEX_LOGICAL_SRC_COORD_COMPONENTS].file == IMM && src[TEX_LOGICAL_SRC_GRAD_COMPONENTS].file == IMM); /* Texture coordinates. */ @@ -4096,6 +4097,7 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op, if (op == SHADER_OPCODE_TG4 || op == SHADER_OPCODE_TG4_OFFSET || offset_value.file != BAD_FILE || + op == SHADER_OPCODE_SAMPLEINFO || is_high_sampler(devinfo, sampler)) { /* For general texture offsets (no txf workaround), we need a header to * put them in. Note that we're only reserving space for it in the @@ -4533,6 +4535,10 @@ fs_visitor::lower_logical_sends() lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_TG4_OFFSET); break; + case SHADER_OPCODE_SAMPLEINFO_LOGICAL: + lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_SAMPLEINFO); + break; + case SHADER_OPCODE_UNTYPED_SURFACE_READ_LOGICAL: lower_surface_logical_send(ibld, inst, SHADER_OPCODE_UNTYPED_SURFACE_READ, @@ -4712,6 +4718,9 @@ get_lowered_simd_width(const struct brw_device_info *devinfo, return (inst->src[FB_WRITE_LOGICAL_SRC_COLOR1].file != BAD_FILE ? 8 : inst->exec_size); + case SHADER_OPCODE_SAMPLEINFO_LOGICAL: + return MIN2(16, inst->exec_size); + case SHADER_OPCODE_TXD_LOGICAL: /* TXD is unsupported in SIMD16 mode. */ return 8; diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 954bfab8575..72b149c270b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -4154,23 +4154,9 @@ fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr) else opcode = SHADER_OPCODE_TG4_LOGICAL; break; - case nir_texop_texture_samples: { - fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D); - - fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_D, 4); - fs_inst *inst = bld.emit(SHADER_OPCODE_SAMPLEINFO, tmp, - bld.vgrf(BRW_REGISTER_TYPE_D, 1), - srcs[TEX_LOGICAL_SRC_SURFACE], - srcs[TEX_LOGICAL_SRC_SURFACE]); - inst->mlen = 1; - inst->header_size = 1; - inst->base_mrf = -1; - inst->regs_written = 4 * (dispatch_width / 8); - - /* Pick off the one component we care about */ - bld.MOV(dst, tmp); - return; - } + case nir_texop_texture_samples: + opcode = SHADER_OPCODE_SAMPLEINFO_LOGICAL; + break; case nir_texop_samples_identical: { fs_reg dst = retype(get_nir_dest(instr->dest), BRW_REGISTER_TYPE_D); diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 426deb0ef89..2259bc9645a 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -247,6 +247,8 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op) return "tg4_offset_logical"; case SHADER_OPCODE_SAMPLEINFO: return "sampleinfo"; + case SHADER_OPCODE_SAMPLEINFO_LOGICAL: + return "sampleinfo_logical"; case SHADER_OPCODE_SHADER_TIME_ADD: return "shader_time_add"; |