diff options
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 87 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_batch.c | 48 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vtbl.c | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_batchbuffer.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.h | 1 |
6 files changed, 117 insertions, 27 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index a7684166949..251893f8a04 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -193,33 +193,71 @@ struct brw_state_flags { GLuint cache; }; +#define AUB_TRACE_TYPE_MASK 0x0000ff00 +#define AUB_TRACE_TYPE_NOTYPE (0 << 8) +#define AUB_TRACE_TYPE_BATCH (1 << 8) +#define AUB_TRACE_TYPE_VERTEX_BUFFER (5 << 8) +#define AUB_TRACE_TYPE_2D_MAP (6 << 8) +#define AUB_TRACE_TYPE_CUBE_MAP (7 << 8) +#define AUB_TRACE_TYPE_VOLUME_MAP (9 << 8) +#define AUB_TRACE_TYPE_1D_MAP (10 << 8) +#define AUB_TRACE_TYPE_CONSTANT_BUFFER (11 << 8) +#define AUB_TRACE_TYPE_CONSTANT_URB (12 << 8) +#define AUB_TRACE_TYPE_INDEX_BUFFER (13 << 8) +#define AUB_TRACE_TYPE_GENERAL (14 << 8) +#define AUB_TRACE_TYPE_SURFACE (15 << 8) + +/** + * state_struct_type enum values are encoded with the top 16 bits representing + * the type to be delivered to the .aub file, and the bottom 16 bits + * representing the subtype. This macro performs the encoding. + */ +#define ENCODE_SS_TYPE(type, subtype) (((type) << 16) | (subtype)) + enum state_struct_type { - AUB_TRACE_VS_STATE = 1, - AUB_TRACE_GS_STATE = 2, - AUB_TRACE_CLIP_STATE = 3, - AUB_TRACE_SF_STATE = 4, - AUB_TRACE_WM_STATE = 5, - AUB_TRACE_CC_STATE = 6, - AUB_TRACE_CLIP_VP_STATE = 7, - AUB_TRACE_SF_VP_STATE = 8, - AUB_TRACE_CC_VP_STATE = 0x9, - AUB_TRACE_SAMPLER_STATE = 0xa, - AUB_TRACE_KERNEL_INSTRUCTIONS = 0xb, - AUB_TRACE_SCRATCH_SPACE = 0xc, - AUB_TRACE_SAMPLER_DEFAULT_COLOR = 0xd, - - AUB_TRACE_SCISSOR_STATE = 0x15, - AUB_TRACE_BLEND_STATE = 0x16, - AUB_TRACE_DEPTH_STENCIL_STATE = 0x17, - - /* Not written to .aub files the same way the structures above are. */ - AUB_TRACE_NO_TYPE = 0x100, - AUB_TRACE_BINDING_TABLE = 0x101, - AUB_TRACE_SURFACE_STATE = 0x102, - AUB_TRACE_VS_CONSTANTS = 0x103, - AUB_TRACE_WM_CONSTANTS = 0x104, + AUB_TRACE_VS_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 1), + AUB_TRACE_GS_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 2), + AUB_TRACE_CLIP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 3), + AUB_TRACE_SF_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 4), + AUB_TRACE_WM_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 5), + AUB_TRACE_CC_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 6), + AUB_TRACE_CLIP_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 7), + AUB_TRACE_SF_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 8), + AUB_TRACE_CC_VP_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x9), + AUB_TRACE_SAMPLER_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xa), + AUB_TRACE_KERNEL_INSTRUCTIONS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xb), + AUB_TRACE_SCRATCH_SPACE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xc), + AUB_TRACE_SAMPLER_DEFAULT_COLOR = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0xd), + + AUB_TRACE_SCISSOR_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x15), + AUB_TRACE_BLEND_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x16), + AUB_TRACE_DEPTH_STENCIL_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_GENERAL, 0x17), + + AUB_TRACE_VERTEX_BUFFER = ENCODE_SS_TYPE(AUB_TRACE_TYPE_VERTEX_BUFFER, 0), + AUB_TRACE_BINDING_TABLE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, 0x100), + AUB_TRACE_SURFACE_STATE = ENCODE_SS_TYPE(AUB_TRACE_TYPE_SURFACE, 0x200), + AUB_TRACE_VS_CONSTANTS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 0), + AUB_TRACE_WM_CONSTANTS = ENCODE_SS_TYPE(AUB_TRACE_TYPE_CONSTANT_BUFFER, 1), }; +/** + * Decode a state_struct_type value to determine the type that should be + * stored in the .aub file. + */ +static inline uint32_t AUB_TRACE_TYPE(enum state_struct_type ss_type) +{ + return (ss_type & 0xFFFF0000) >> 16; +} + +/** + * Decode a state_struct_type value to determine the subtype that should be + * stored in the .aub file. + */ +static inline uint32_t AUB_TRACE_SUBTYPE(enum state_struct_type ss_type) +{ + return ss_type & 0xFFFF; +} + /** Subclass of Mesa vertex program */ struct brw_vertex_program { struct gl_vertex_program program; @@ -1040,6 +1078,7 @@ void brw_emit_query_end(struct brw_context *brw); * brw_state_dump.c */ void brw_debug_batch(struct intel_context *intel); +void brw_annotate_aub(struct intel_context *intel); /*====================================================================== * brw_tex.c diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c b/src/mesa/drivers/dri/i965/brw_state_batch.c index 81d034ce822..84683511066 100644 --- a/src/mesa/drivers/dri/i965/brw_state_batch.c +++ b/src/mesa/drivers/dri/i965/brw_state_batch.c @@ -57,6 +57,52 @@ brw_track_state_batch(struct brw_context *brw, } /** + * Convenience function to populate a single drm_intel_aub_annotation data + * structure. + */ +static inline void +make_annotation(drm_intel_aub_annotation *annotation, uint32_t type, + uint32_t subtype, uint32_t ending_offset) +{ + annotation->type = type; + annotation->subtype = subtype; + annotation->ending_offset = ending_offset; +} + +/** + * Generate a set of aub file annotations for the current batch buffer, and + * deliver them to DRM. + * + * The "used" section of the batch buffer (the portion containing batch + * commands) is annotated with AUB_TRACE_TYPE_BATCH. The remainder of the + * batch buffer (which contains data structures pointed to by batch commands) + * is annotated according to the type of each data structure. + */ +void +brw_annotate_aub(struct intel_context *intel) +{ + struct brw_context *brw = brw_context(&intel->ctx); + + unsigned annotation_count = 2 * brw->state_batch_count + 1; + drm_intel_aub_annotation annotations[annotation_count]; + int a = 0; + make_annotation(&annotations[a++], AUB_TRACE_TYPE_BATCH, 0, + 4*intel->batch.used); + for (int i = brw->state_batch_count; i-- > 0; ) { + uint32_t type = brw->state_batch_list[i].type; + uint32_t start_offset = brw->state_batch_list[i].offset; + uint32_t end_offset = start_offset + brw->state_batch_list[i].size; + make_annotation(&annotations[a++], AUB_TRACE_TYPE_NOTYPE, 0, + start_offset); + make_annotation(&annotations[a++], AUB_TRACE_TYPE(type), + AUB_TRACE_SUBTYPE(type), end_offset); + } + assert(a == annotation_count); + drm_intel_bufmgr_gem_set_aub_annotations(intel->batch.bo, annotations, + annotation_count); +} + +/** * Allocates a block of space in the batchbuffer for indirect state. * * We don't want to allocate separate BOs for every bit of indirect @@ -95,7 +141,7 @@ brw_state_batch(struct brw_context *brw, batch->state_batch_offset = offset; - if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) + if (unlikely(INTEL_DEBUG & (DEBUG_BATCH | DEBUG_AUB))) brw_track_state_batch(brw, type, offset, size); *out_offset = offset; diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 733193425d3..d05b602ab8e 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -234,6 +234,7 @@ void brwInitVtbl( struct brw_context *brw ) brw->intel.vtbl.destroy = brw_destroy_context; brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer; brw->intel.vtbl.debug_batch = brw_debug_batch; + brw->intel.vtbl.annotate_aub = brw_annotate_aub; brw->intel.vtbl.render_target_supported = brw_render_target_supported; brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format; diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 6db8f40c33b..8eed9dca01e 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -183,7 +183,7 @@ gen6_blorp_emit_vertices(struct brw_context *brw, /* v2 */ 0, 0, 0, 0, params->x0, params->y0, 0, 1, }; - vertex_data = (float *) brw_state_batch(brw, AUB_TRACE_NO_TYPE, + vertex_data = (float *) brw_state_batch(brw, AUB_TRACE_VERTEX_BUFFER, GEN6_BLORP_VBO_SIZE, 32, &vertex_offset); memcpy(vertex_data, vertices, GEN6_BLORP_VBO_SIZE); diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index d10e00867eb..76a69f7c88d 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -185,9 +185,12 @@ do_flush_locked(struct intel_context *intel) if (batch->needs_sol_reset) flags |= I915_EXEC_GEN7_SOL_RESET; - if (ret == 0) + if (ret == 0) { + if (unlikely(INTEL_DEBUG & DEBUG_AUB) && intel->vtbl.annotate_aub) + intel->vtbl.annotate_aub(intel); ret = drm_intel_bo_mrb_exec(batch->bo, 4*batch->used, NULL, 0, 0, flags); + } } if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index 065f1d6d01a..d064f37c9c5 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -177,6 +177,7 @@ struct intel_context void (*assert_not_dirty) (struct intel_context *intel); void (*debug_batch)(struct intel_context *intel); + void (*annotate_aub)(struct intel_context *intel); bool (*render_target_supported)(struct intel_context *intel, struct gl_renderbuffer *rb); |