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-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c4
-rw-r--r--src/mesa/program/program.c5
-rw-r--r--src/mesa/program/program.h3
5 files changed, 9 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 8459013cfe6..0a308862c47 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -504,7 +504,7 @@ static void brw_wm_populate_key( struct brw_context *brw,
/* _NEW_BUFFERS _NEW_MULTISAMPLE */
key->compute_pos_offset =
- _mesa_get_min_invocations_per_fragment(ctx, &fp->program) > 1 &&
+ _mesa_get_min_invocations_per_fragment(ctx, &fp->program, false) > 1 &&
fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_POS;
key->compute_sample_id =
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 83a17083608..0bb5ef3e751 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -161,7 +161,7 @@ upload_wm_state(struct brw_context *brw)
* better performance than 'SIMD8 only' dispatch.
*/
int min_inv_per_frag =
- _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program);
+ _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
assert(min_inv_per_frag >= 1);
if (brw->wm.prog_data->prog_offset_16) {
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index b6561bbaf2b..8dcefc2e04c 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -103,7 +103,7 @@ upload_wm_state(struct brw_context *brw)
else
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
- if (_mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program) > 1)
+ if (_mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false) > 1)
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
else
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;
@@ -236,7 +236,7 @@ upload_ps_state(struct brw_context *brw)
* better performance than 'SIMD8 only' dispatch.
*/
int min_inv_per_frag =
- _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program);
+ _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
assert(min_inv_per_frag >= 1);
if (brw->wm.prog_data->prog_offset_16) {
diff --git a/src/mesa/program/program.c b/src/mesa/program/program.c
index 3c19e8c60f0..ea8eb0d3a7a 100644
--- a/src/mesa/program/program.c
+++ b/src/mesa/program/program.c
@@ -1023,7 +1023,8 @@ _mesa_postprocess_program(struct gl_context *ctx, struct gl_program *prog)
*/
GLint
_mesa_get_min_invocations_per_fragment(struct gl_context *ctx,
- const struct gl_fragment_program *prog)
+ const struct gl_fragment_program *prog,
+ bool ignore_sample_qualifier)
{
/* From ARB_sample_shading specification:
* "Using gl_SampleID in a fragment shader causes the entire shader
@@ -1041,7 +1042,7 @@ _mesa_get_min_invocations_per_fragment(struct gl_context *ctx,
* "Use of the "sample" qualifier on a fragment shader input
* forces per-sample shading"
*/
- if (prog->IsSample)
+ if (prog->IsSample && !ignore_sample_qualifier)
return MAX2(ctx->DrawBuffer->Visual.samples, 1);
if (prog->Base.SystemValuesRead & (SYSTEM_BIT_SAMPLE_ID |
diff --git a/src/mesa/program/program.h b/src/mesa/program/program.h
index 0e350cd6f86..c47ac1cc796 100644
--- a/src/mesa/program/program.h
+++ b/src/mesa/program/program.h
@@ -189,7 +189,8 @@ _mesa_postprocess_program(struct gl_context *ctx, struct gl_program *prog);
extern GLint
_mesa_get_min_invocations_per_fragment(struct gl_context *ctx,
- const struct gl_fragment_program *prog);
+ const struct gl_fragment_program *prog,
+ bool ignore_sample_qualifier);
static inline GLuint
_mesa_program_enum_to_shader_stage(GLenum v)