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-rw-r--r--src/mesa/drivers/dri/i915/Makefile1
l---------src/mesa/drivers/dri/i915/intel_clear.c1
-rw-r--r--src/mesa/drivers/dri/i965/Makefile1
l---------src/mesa/drivers/dri/i965/intel_clear.c1
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c222
-rw-r--r--src/mesa/drivers/dri/intel/intel_clear.c260
-rw-r--r--src/mesa/drivers/dri/intel/intel_clear.h38
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c2
8 files changed, 304 insertions, 222 deletions
diff --git a/src/mesa/drivers/dri/i915/Makefile b/src/mesa/drivers/dri/i915/Makefile
index 0abf47b8302..25c8c282cdc 100644
--- a/src/mesa/drivers/dri/i915/Makefile
+++ b/src/mesa/drivers/dri/i915/Makefile
@@ -18,6 +18,7 @@ DRIVER_SOURCES = \
intel_regions.c \
intel_buffer_objects.c \
intel_batchbuffer.c \
+ intel_clear.c \
intel_mipmap_tree.c \
i915_tex_layout.c \
intel_tex_layout.c \
diff --git a/src/mesa/drivers/dri/i915/intel_clear.c b/src/mesa/drivers/dri/i915/intel_clear.c
new file mode 120000
index 00000000000..9a2a742a0d9
--- /dev/null
+++ b/src/mesa/drivers/dri/i915/intel_clear.c
@@ -0,0 +1 @@
+../intel/intel_clear.c \ No newline at end of file
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 692a285cbe3..836ca3ca4a2 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -9,6 +9,7 @@ DRIVER_SOURCES = \
intel_blit.c \
intel_buffer_objects.c \
intel_buffers.c \
+ intel_clear.c \
intel_context.c \
intel_decode.c \
intel_fbo.c \
diff --git a/src/mesa/drivers/dri/i965/intel_clear.c b/src/mesa/drivers/dri/i965/intel_clear.c
new file mode 120000
index 00000000000..9a2a742a0d9
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/intel_clear.c
@@ -0,0 +1 @@
+../intel/intel_clear.c \ No newline at end of file
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 827cb8a2a72..13555b2e0e6 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -25,19 +25,14 @@
*
**************************************************************************/
-#include "intel_screen.h"
#include "intel_context.h"
-#include "intel_blit.h"
#include "intel_buffers.h"
-#include "intel_chipset.h"
#include "intel_fbo.h"
#include "intel_regions.h"
#include "intel_batchbuffer.h"
#include "main/framebuffer.h"
-#include "swrast/swrast.h"
#include "drirenderbuffer.h"
-#define FILE_DEBUG_FLAG DEBUG_BLIT
/**
* XXX move this into a new dri/common/cliprects.c file.
@@ -137,222 +132,6 @@ intel_get_cliprects(struct intel_context *intel,
}
-
-/* A true meta version of this would be very simple and additionally
- * machine independent. Maybe we'll get there one day.
- */
-static void
-intelClearWithTris(struct intel_context *intel, GLbitfield mask)
-{
- GLcontext *ctx = &intel->ctx;
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- GLuint buf;
-
- intel->vtbl.install_meta_state(intel);
-
- /* Back and stencil cliprects are the same. Try and do both
- * buffers at once:
- */
- if (mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
- struct intel_region *backRegion =
- intel_get_rb_region(fb, BUFFER_BACK_LEFT);
- struct intel_region *depthRegion =
- intel_get_rb_region(fb, BUFFER_DEPTH);
-
- intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
-
- if (mask & BUFFER_BIT_BACK_LEFT)
- intel->vtbl.meta_color_mask(intel, GL_TRUE);
- else
- intel->vtbl.meta_color_mask(intel, GL_FALSE);
-
- if (mask & BUFFER_BIT_STENCIL)
- intel->vtbl.meta_stencil_replace(intel,
- intel->ctx.Stencil.WriteMask[0],
- intel->ctx.Stencil.Clear);
- else
- intel->vtbl.meta_no_stencil_write(intel);
-
- if (mask & BUFFER_BIT_DEPTH)
- intel->vtbl.meta_depth_replace(intel);
- else
- intel->vtbl.meta_no_depth_write(intel);
-
- intel->vtbl.meta_draw_quad(intel,
- fb->_Xmin,
- fb->_Xmax,
- fb->_Ymin,
- fb->_Ymax,
- intel->ctx.Depth.Clear,
- intel->ClearColor8888,
- 0, 0, 0, 0); /* texcoords */
-
- mask &= ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
- }
-
- /* clear the remaining (color) renderbuffers */
- for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
- const GLuint bufBit = 1 << buf;
- if (mask & bufBit) {
- struct intel_renderbuffer *irbColor =
- intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
-
- ASSERT(irbColor);
-
- intel->vtbl.meta_no_depth_write(intel);
- intel->vtbl.meta_no_stencil_write(intel);
- intel->vtbl.meta_color_mask(intel, GL_TRUE);
- intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
-
- intel->vtbl.meta_draw_quad(intel,
- fb->_Xmin,
- fb->_Xmax,
- fb->_Ymin,
- fb->_Ymax,
- 0, intel->ClearColor8888,
- 0, 0, 0, 0); /* texcoords */
-
- mask &= ~bufBit;
- }
- }
-
- intel->vtbl.leave_meta_state(intel);
-}
-
-static const char *buffer_names[] = {
- [BUFFER_FRONT_LEFT] = "front",
- [BUFFER_BACK_LEFT] = "back",
- [BUFFER_FRONT_RIGHT] = "front right",
- [BUFFER_BACK_RIGHT] = "back right",
- [BUFFER_AUX0] = "aux0",
- [BUFFER_AUX1] = "aux1",
- [BUFFER_AUX2] = "aux2",
- [BUFFER_AUX3] = "aux3",
- [BUFFER_DEPTH] = "depth",
- [BUFFER_STENCIL] = "stencil",
- [BUFFER_ACCUM] = "accum",
- [BUFFER_COLOR0] = "color0",
- [BUFFER_COLOR1] = "color1",
- [BUFFER_COLOR2] = "color2",
- [BUFFER_COLOR3] = "color3",
- [BUFFER_COLOR4] = "color4",
- [BUFFER_COLOR5] = "color5",
- [BUFFER_COLOR6] = "color6",
- [BUFFER_COLOR7] = "color7",
-};
-
-/**
- * Called by ctx->Driver.Clear.
- */
-static void
-intelClear(GLcontext *ctx, GLbitfield mask)
-{
- struct intel_context *intel = intel_context(ctx);
- const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
- GLbitfield tri_mask = 0;
- GLbitfield blit_mask = 0;
- GLbitfield swrast_mask = 0;
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- GLuint i;
-
- if (0)
- fprintf(stderr, "%s\n", __FUNCTION__);
-
- /* HW color buffers (front, back, aux, generic FBO, etc) */
- if (colorMask == ~0) {
- /* clear all R,G,B,A */
- /* XXX FBO: need to check if colorbuffers are software RBOs! */
- blit_mask |= (mask & BUFFER_BITS_COLOR);
- }
- else {
- /* glColorMask in effect */
- tri_mask |= (mask & BUFFER_BITS_COLOR);
- }
-
- /* HW stencil */
- if (mask & BUFFER_BIT_STENCIL) {
- const struct intel_region *stencilRegion
- = intel_get_rb_region(fb, BUFFER_STENCIL);
- if (stencilRegion) {
- /* have hw stencil */
- if (IS_965(intel->intelScreen->deviceID) ||
- (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
- /* We have to use the 3D engine if we're clearing a partial mask
- * of the stencil buffer, or if we're on a 965 which has a tiled
- * depth/stencil buffer in a layout we can't blit to.
- */
- tri_mask |= BUFFER_BIT_STENCIL;
- }
- else {
- /* clearing all stencil bits, use blitting */
- blit_mask |= BUFFER_BIT_STENCIL;
- }
- }
- }
-
- /* HW depth */
- if (mask & BUFFER_BIT_DEPTH) {
- /* clear depth with whatever method is used for stencil (see above) */
- if (IS_965(intel->intelScreen->deviceID) ||
- tri_mask & BUFFER_BIT_STENCIL)
- tri_mask |= BUFFER_BIT_DEPTH;
- else
- blit_mask |= BUFFER_BIT_DEPTH;
- }
-
- /* SW fallback clearing */
- swrast_mask = mask & ~tri_mask & ~blit_mask;
-
- for (i = 0; i < BUFFER_COUNT; i++) {
- GLuint bufBit = 1 << i;
- if ((blit_mask | tri_mask) & bufBit) {
- if (!fb->Attachment[i].Renderbuffer->ClassID) {
- blit_mask &= ~bufBit;
- tri_mask &= ~bufBit;
- swrast_mask |= bufBit;
- }
- }
- }
-
- if (blit_mask) {
- if (INTEL_DEBUG & DEBUG_BLIT) {
- DBG("blit clear:");
- for (i = 0; i < BUFFER_COUNT; i++) {
- if (blit_mask & (1 << i))
- DBG(" %s", buffer_names[i]);
- }
- DBG("\n");
- }
- intelClearWithBlit(ctx, blit_mask);
- }
-
- if (tri_mask) {
- if (INTEL_DEBUG & DEBUG_BLIT) {
- DBG("tri clear:");
- for (i = 0; i < BUFFER_COUNT; i++) {
- if (tri_mask & (1 << i))
- DBG(" %s", buffer_names[i]);
- }
- DBG("\n");
- }
- intelClearWithTris(intel, tri_mask);
- }
-
- if (swrast_mask) {
- if (INTEL_DEBUG & DEBUG_BLIT) {
- DBG("swrast clear:");
- for (i = 0; i < BUFFER_COUNT; i++) {
- if (swrast_mask & (1 << i))
- DBG(" %s", buffer_names[i]);
- }
- DBG("\n");
- }
- _swrast_Clear(ctx, swrast_mask);
- }
-}
-
-
-
/**
* Update the hardware state for drawing into a window or framebuffer object.
*
@@ -562,7 +341,6 @@ intelReadBuffer(GLcontext * ctx, GLenum mode)
void
intelInitBufferFuncs(struct dd_function_table *functions)
{
- functions->Clear = intelClear;
functions->DrawBuffer = intelDrawBuffer;
functions->ReadBuffer = intelReadBuffer;
}
diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
new file mode 100644
index 00000000000..921ec2dc330
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -0,0 +1,260 @@
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#include "intel_clear.h"
+#include "intel_context.h"
+#include "intel_blit.h"
+#include "intel_buffers.h"
+#include "intel_chipset.h"
+#include "intel_fbo.h"
+#include "intel_regions.h"
+#include "intel_batchbuffer.h"
+#include "main/framebuffer.h"
+#include "swrast/swrast.h"
+#include "drirenderbuffer.h"
+
+#define FILE_DEBUG_FLAG DEBUG_BLIT
+
+/* A true meta version of this would be very simple and additionally
+ * machine independent. Maybe we'll get there one day.
+ */
+static void
+intelClearWithTris(struct intel_context *intel, GLbitfield mask)
+{
+ GLcontext *ctx = &intel->ctx;
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ GLuint buf;
+
+ intel->vtbl.install_meta_state(intel);
+
+ /* Back and stencil cliprects are the same. Try and do both
+ * buffers at once:
+ */
+ if (mask & (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
+ struct intel_region *backRegion =
+ intel_get_rb_region(fb, BUFFER_BACK_LEFT);
+ struct intel_region *depthRegion =
+ intel_get_rb_region(fb, BUFFER_DEPTH);
+
+ intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
+
+ if (mask & BUFFER_BIT_BACK_LEFT)
+ intel->vtbl.meta_color_mask(intel, GL_TRUE);
+ else
+ intel->vtbl.meta_color_mask(intel, GL_FALSE);
+
+ if (mask & BUFFER_BIT_STENCIL)
+ intel->vtbl.meta_stencil_replace(intel,
+ intel->ctx.Stencil.WriteMask[0],
+ intel->ctx.Stencil.Clear);
+ else
+ intel->vtbl.meta_no_stencil_write(intel);
+
+ if (mask & BUFFER_BIT_DEPTH)
+ intel->vtbl.meta_depth_replace(intel);
+ else
+ intel->vtbl.meta_no_depth_write(intel);
+
+ intel->vtbl.meta_draw_quad(intel,
+ fb->_Xmin,
+ fb->_Xmax,
+ fb->_Ymin,
+ fb->_Ymax,
+ intel->ctx.Depth.Clear,
+ intel->ClearColor8888,
+ 0, 0, 0, 0); /* texcoords */
+
+ mask &= ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
+ }
+
+ /* clear the remaining (color) renderbuffers */
+ for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
+ const GLuint bufBit = 1 << buf;
+ if (mask & bufBit) {
+ struct intel_renderbuffer *irbColor =
+ intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
+
+ ASSERT(irbColor);
+
+ intel->vtbl.meta_no_depth_write(intel);
+ intel->vtbl.meta_no_stencil_write(intel);
+ intel->vtbl.meta_color_mask(intel, GL_TRUE);
+ intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
+
+ intel->vtbl.meta_draw_quad(intel,
+ fb->_Xmin,
+ fb->_Xmax,
+ fb->_Ymin,
+ fb->_Ymax,
+ 0, intel->ClearColor8888,
+ 0, 0, 0, 0); /* texcoords */
+
+ mask &= ~bufBit;
+ }
+ }
+
+ intel->vtbl.leave_meta_state(intel);
+}
+
+static const char *buffer_names[] = {
+ [BUFFER_FRONT_LEFT] = "front",
+ [BUFFER_BACK_LEFT] = "back",
+ [BUFFER_FRONT_RIGHT] = "front right",
+ [BUFFER_BACK_RIGHT] = "back right",
+ [BUFFER_AUX0] = "aux0",
+ [BUFFER_AUX1] = "aux1",
+ [BUFFER_AUX2] = "aux2",
+ [BUFFER_AUX3] = "aux3",
+ [BUFFER_DEPTH] = "depth",
+ [BUFFER_STENCIL] = "stencil",
+ [BUFFER_ACCUM] = "accum",
+ [BUFFER_COLOR0] = "color0",
+ [BUFFER_COLOR1] = "color1",
+ [BUFFER_COLOR2] = "color2",
+ [BUFFER_COLOR3] = "color3",
+ [BUFFER_COLOR4] = "color4",
+ [BUFFER_COLOR5] = "color5",
+ [BUFFER_COLOR6] = "color6",
+ [BUFFER_COLOR7] = "color7",
+};
+
+/**
+ * Called by ctx->Driver.Clear.
+ */
+static void
+intelClear(GLcontext *ctx, GLbitfield mask)
+{
+ struct intel_context *intel = intel_context(ctx);
+ const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
+ GLbitfield tri_mask = 0;
+ GLbitfield blit_mask = 0;
+ GLbitfield swrast_mask = 0;
+ struct gl_framebuffer *fb = ctx->DrawBuffer;
+ GLuint i;
+
+ if (0)
+ fprintf(stderr, "%s\n", __FUNCTION__);
+
+ /* HW color buffers (front, back, aux, generic FBO, etc) */
+ if (colorMask == ~0) {
+ /* clear all R,G,B,A */
+ /* XXX FBO: need to check if colorbuffers are software RBOs! */
+ blit_mask |= (mask & BUFFER_BITS_COLOR);
+ }
+ else {
+ /* glColorMask in effect */
+ tri_mask |= (mask & BUFFER_BITS_COLOR);
+ }
+
+ /* HW stencil */
+ if (mask & BUFFER_BIT_STENCIL) {
+ const struct intel_region *stencilRegion
+ = intel_get_rb_region(fb, BUFFER_STENCIL);
+ if (stencilRegion) {
+ /* have hw stencil */
+ if (IS_965(intel->intelScreen->deviceID) ||
+ (ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
+ /* We have to use the 3D engine if we're clearing a partial mask
+ * of the stencil buffer, or if we're on a 965 which has a tiled
+ * depth/stencil buffer in a layout we can't blit to.
+ */
+ tri_mask |= BUFFER_BIT_STENCIL;
+ }
+ else {
+ /* clearing all stencil bits, use blitting */
+ blit_mask |= BUFFER_BIT_STENCIL;
+ }
+ }
+ }
+
+ /* HW depth */
+ if (mask & BUFFER_BIT_DEPTH) {
+ /* clear depth with whatever method is used for stencil (see above) */
+ if (IS_965(intel->intelScreen->deviceID) ||
+ tri_mask & BUFFER_BIT_STENCIL)
+ tri_mask |= BUFFER_BIT_DEPTH;
+ else
+ blit_mask |= BUFFER_BIT_DEPTH;
+ }
+
+ /* SW fallback clearing */
+ swrast_mask = mask & ~tri_mask & ~blit_mask;
+
+ for (i = 0; i < BUFFER_COUNT; i++) {
+ GLuint bufBit = 1 << i;
+ if ((blit_mask | tri_mask) & bufBit) {
+ if (!fb->Attachment[i].Renderbuffer->ClassID) {
+ blit_mask &= ~bufBit;
+ tri_mask &= ~bufBit;
+ swrast_mask |= bufBit;
+ }
+ }
+ }
+
+ if (blit_mask) {
+ if (INTEL_DEBUG & DEBUG_BLIT) {
+ DBG("blit clear:");
+ for (i = 0; i < BUFFER_COUNT; i++) {
+ if (blit_mask & (1 << i))
+ DBG(" %s", buffer_names[i]);
+ }
+ DBG("\n");
+ }
+ intelClearWithBlit(ctx, blit_mask);
+ }
+
+ if (tri_mask) {
+ if (INTEL_DEBUG & DEBUG_BLIT) {
+ DBG("tri clear:");
+ for (i = 0; i < BUFFER_COUNT; i++) {
+ if (tri_mask & (1 << i))
+ DBG(" %s", buffer_names[i]);
+ }
+ DBG("\n");
+ }
+ intelClearWithTris(intel, tri_mask);
+ }
+
+ if (swrast_mask) {
+ if (INTEL_DEBUG & DEBUG_BLIT) {
+ DBG("swrast clear:");
+ for (i = 0; i < BUFFER_COUNT; i++) {
+ if (swrast_mask & (1 << i))
+ DBG(" %s", buffer_names[i]);
+ }
+ DBG("\n");
+ }
+ _swrast_Clear(ctx, swrast_mask);
+ }
+}
+
+
+void
+intelInitClearFuncs(struct dd_function_table *functions)
+{
+ functions->Clear = intelClear;
+}
diff --git a/src/mesa/drivers/dri/intel/intel_clear.h b/src/mesa/drivers/dri/intel/intel_clear.h
new file mode 100644
index 00000000000..7fd6b310a9d
--- /dev/null
+++ b/src/mesa/drivers/dri/intel/intel_clear.h
@@ -0,0 +1,38 @@
+
+/**************************************************************************
+ *
+ * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **************************************************************************/
+
+#ifndef INTEL_CLEAR_H
+#define INTEL_CLEAR_H
+
+struct dd_function_table;
+
+extern void
+intelInitClearFuncs(struct dd_function_table *functions);
+
+
+#endif /* INTEL_CLEAR_H */
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 72610b2454f..265cf15e44c 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -53,6 +53,7 @@
#include "intel_tex.h"
#include "intel_batchbuffer.h"
#include "intel_blit.h"
+#include "intel_clear.h"
#include "intel_pixel.h"
#include "intel_regions.h"
#include "intel_buffer_objects.h"
@@ -565,6 +566,7 @@ intelInitDriverFunctions(struct dd_function_table *functions)
intelInitTextureFuncs(functions);
intelInitStateFuncs(functions);
+ intelInitClearFuncs(functions);
intelInitBufferFuncs(functions);
intelInitPixelFuncs(functions);
}