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-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c4
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c2
2 files changed, 1 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index aa8048c9fc3..b8b29a72144 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -1685,10 +1685,6 @@ void brw_vs_emit(struct brw_vs_compile *c )
printf("\n");
}
- /* FIXME Need to fix conditional instruction to remove this */
- if (intel->gen >= 6)
- p->single_program_flow = GL_TRUE;
-
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_access_mode(p, BRW_ALIGN_16);
if_depth_in_loop[loop_depth] = 0;
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index d8da216d15f..e94d0c0ddbb 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -135,7 +135,7 @@ upload_vs_state(struct brw_context *brw)
BEGIN_BATCH(6);
OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
- OUT_BATCH(GEN6_VS_SPF_MODE | (0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
+ OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
(brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
OUT_BATCH(0); /* scratch space base offset */
OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |