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-rw-r--r--src/mesa/pipe/i965simple/brw_flush.c80
1 files changed, 0 insertions, 80 deletions
diff --git a/src/mesa/pipe/i965simple/brw_flush.c b/src/mesa/pipe/i965simple/brw_flush.c
deleted file mode 100644
index 5216c680cf6..00000000000
--- a/src/mesa/pipe/i965simple/brw_flush.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/**************************************************************************
- *
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the
- * "Software"), to deal in the Software without restriction, including
- * without limitation the rights to use, copy, modify, merge, publish,
- * distribute, sub license, and/or sell copies of the Software, and to
- * permit persons to whom the Software is furnished to do so, subject to
- * the following conditions:
- *
- * The above copyright notice and this permission notice (including the
- * next paragraph) shall be included in all copies or substantial portions
- * of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
- * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
- * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
- * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
- * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- **************************************************************************/
-
-/* Author:
- * Keith Whitwell <[email protected]>
- */
-
-
-#include "pipe/p_defines.h"
-#include "brw_context.h"
-#include "brw_defines.h"
-#include "brw_batch.h"
-
-
-/**
- * In future we may want a fence-like interface instead of finish.
- */
-static void brw_flush( struct pipe_context *pipe,
- unsigned flags )
-{
- struct brw_context *brw = brw_context(pipe);
- struct pipe_fence_handle *fence;
-
- /* Do we need to emit an MI_FLUSH command to flush the hardware
- * caches?
- */
- if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
- struct brw_mi_flush flush;
-
- memset(&flush, 0, sizeof(flush));
- flush.opcode = CMD_MI_FLUSH;
-
- if (!(flags & PIPE_FLUSH_RENDER_CACHE))
- flush.flags |= BRW_INHIBIT_FLUSH_RENDER_CACHE;
-
- if (flags & PIPE_FLUSH_TEXTURE_CACHE)
- flush.flags |= BRW_FLUSH_READ_CACHE;
-
- BRW_BATCH_STRUCT(brw, &flush);
- }
-
- /* If there are no flags, just flush pending commands to hardware:
- */
- FLUSH_BATCH( &fence );
-
- if (flags & PIPE_FLUSH_WAIT) {
-// brw->winsys->wait_fence(brw->winsys, fence);
- }
-}
-
-
-
-void brw_init_flush_functions( struct brw_context *brw )
-{
- brw->pipe.flush = brw_flush;
-}