diff options
Diffstat (limited to 'src/mesa/drivers')
50 files changed, 320 insertions, 320 deletions
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index ca5600bc855..83841def596 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -809,13 +809,13 @@ uint32_t driGLFormatToImageFormat(mesa_format format) { switch (format) { - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return __DRI_IMAGE_FORMAT_RGB565; case MESA_FORMAT_B8G8R8X8_UNORM: return __DRI_IMAGE_FORMAT_XRGB8888; - case MESA_FORMAT_ARGB2101010: + case MESA_FORMAT_B10G10R10A2_UNORM: return __DRI_IMAGE_FORMAT_ARGB2101010; - case MESA_FORMAT_XRGB2101010_UNORM: + case MESA_FORMAT_B10G10R10X2_UNORM: return __DRI_IMAGE_FORMAT_XRGB2101010; case MESA_FORMAT_B8G8R8A8_UNORM: return __DRI_IMAGE_FORMAT_ARGB8888; @@ -825,11 +825,11 @@ driGLFormatToImageFormat(mesa_format format) return __DRI_IMAGE_FORMAT_XBGR8888; case MESA_FORMAT_R_UNORM8: return __DRI_IMAGE_FORMAT_R8; - case MESA_FORMAT_GR88: + case MESA_FORMAT_R8G8_UNORM: return __DRI_IMAGE_FORMAT_GR88; case MESA_FORMAT_NONE: return __DRI_IMAGE_FORMAT_NONE; - case MESA_FORMAT_SARGB8: + case MESA_FORMAT_B8G8R8A8_SRGB: return __DRI_IMAGE_FORMAT_SARGB8; default: return 0; @@ -841,13 +841,13 @@ driImageFormatToGLFormat(uint32_t image_format) { switch (image_format) { case __DRI_IMAGE_FORMAT_RGB565: - return MESA_FORMAT_RGB565; + return MESA_FORMAT_B5G6R5_UNORM; case __DRI_IMAGE_FORMAT_XRGB8888: return MESA_FORMAT_B8G8R8X8_UNORM; case __DRI_IMAGE_FORMAT_ARGB2101010: - return MESA_FORMAT_ARGB2101010; + return MESA_FORMAT_B10G10R10A2_UNORM; case __DRI_IMAGE_FORMAT_XRGB2101010: - return MESA_FORMAT_XRGB2101010_UNORM; + return MESA_FORMAT_B10G10R10X2_UNORM; case __DRI_IMAGE_FORMAT_ARGB8888: return MESA_FORMAT_B8G8R8A8_UNORM; case __DRI_IMAGE_FORMAT_ABGR8888: @@ -857,9 +857,9 @@ driImageFormatToGLFormat(uint32_t image_format) case __DRI_IMAGE_FORMAT_R8: return MESA_FORMAT_R_UNORM8; case __DRI_IMAGE_FORMAT_GR88: - return MESA_FORMAT_GR88; + return MESA_FORMAT_R8G8_UNORM; case __DRI_IMAGE_FORMAT_SARGB8: - return MESA_FORMAT_SARGB8; + return MESA_FORMAT_B8G8R8A8_SRGB; case __DRI_IMAGE_FORMAT_NONE: return MESA_FORMAT_NONE; default: diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c index b18256e355d..1f29e0b080c 100644 --- a/src/mesa/drivers/dri/common/utils.c +++ b/src/mesa/drivers/dri/common/utils.c @@ -184,15 +184,15 @@ driCreateConfigs(mesa_format format, GLboolean enable_accum) { static const uint32_t masks_table[][4] = { - /* MESA_FORMAT_RGB565 */ + /* MESA_FORMAT_B5G6R5_UNORM */ { 0x0000F800, 0x000007E0, 0x0000001F, 0x00000000 }, /* MESA_FORMAT_B8G8R8X8_UNORM */ { 0x00FF0000, 0x0000FF00, 0x000000FF, 0x00000000 }, /* MESA_FORMAT_B8G8R8A8_UNORM */ { 0x00FF0000, 0x0000FF00, 0x000000FF, 0xFF000000 }, - /* MESA_FORMAT_XRGB2101010_UNORM */ + /* MESA_FORMAT_B10G10R10X2_UNORM */ { 0x3FF00000, 0x000FFC00, 0x000003FF, 0x00000000 }, - /* MESA_FORMAT_ARGB2101010 */ + /* MESA_FORMAT_B10G10R10A2_UNORM */ { 0x3FF00000, 0x000FFC00, 0x000003FF, 0xC0000000 }, }; @@ -209,20 +209,20 @@ driCreateConfigs(mesa_format format, bool is_srgb; switch (format) { - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: masks = masks_table[0]; break; case MESA_FORMAT_B8G8R8X8_UNORM: masks = masks_table[1]; break; case MESA_FORMAT_B8G8R8A8_UNORM: - case MESA_FORMAT_SARGB8: + case MESA_FORMAT_B8G8R8A8_SRGB: masks = masks_table[2]; break; - case MESA_FORMAT_XRGB2101010_UNORM: + case MESA_FORMAT_B10G10R10X2_UNORM: masks = masks_table[3]; break; - case MESA_FORMAT_ARGB2101010: + case MESA_FORMAT_B10G10R10A2_UNORM: masks = masks_table[4]; break; default: diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index 4e90761497f..7209655c167 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -49,13 +49,13 @@ translate_texture_format(GLuint mesa_format) return MAPSURF_8BIT | MT_8BIT_I8; case MESA_FORMAT_A_UNORM8: return MAPSURF_8BIT | MT_8BIT_I8; /* Kludge! */ - case MESA_FORMAT_AL88: + case MESA_FORMAT_L8A8_UNORM: return MAPSURF_16BIT | MT_16BIT_AY88; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return MAPSURF_16BIT | MT_16BIT_RGB565; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return MAPSURF_16BIT | MT_16BIT_ARGB1555; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return MAPSURF_16BIT | MT_16BIT_ARGB4444; case MESA_FORMAT_B8G8R8A8_UNORM: return MAPSURF_32BIT | MT_32BIT_ARGB8888; diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 49c29939c0d..0d3e3e233d4 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -584,9 +584,9 @@ static uint32_t i830_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] = { [MESA_FORMAT_B8G8R8A8_UNORM] = DV_PF_8888, [MESA_FORMAT_B8G8R8X8_UNORM] = DV_PF_8888, - [MESA_FORMAT_RGB565] = DV_PF_565, - [MESA_FORMAT_ARGB1555] = DV_PF_1555, - [MESA_FORMAT_ARGB4444] = DV_PF_4444, + [MESA_FORMAT_B5G6R5_UNORM] = DV_PF_565, + [MESA_FORMAT_B5G5R5A1_UNORM] = DV_PF_1555, + [MESA_FORMAT_B4G4R4A4_UNORM] = DV_PF_4444, }; static bool @@ -595,8 +595,8 @@ i830_render_target_supported(struct intel_context *intel, { mesa_format format = rb->Format; - if (format == MESA_FORMAT_S8_Z24 || - format == MESA_FORMAT_X8_Z24 || + if (format == MESA_FORMAT_Z24_UNORM_X8_UINT || + format == MESA_FORMAT_Z24_UNORM_S8_UINT || format == MESA_FORMAT_Z_UNORM16) { return true; } @@ -804,7 +804,7 @@ i830_update_draw_buffer(struct intel_context *intel) /* Check for stencil fallback. */ if (irbStencil && irbStencil->mt) { - assert(intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24); + assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT); FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false); } else if (irbStencil && !irbStencil->mt) { FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true); @@ -817,7 +817,7 @@ i830_update_draw_buffer(struct intel_context *intel) * we still need to set up the shared depth/stencil state so we can use it. */ if (depthRegion == NULL && irbStencil && irbStencil->mt - && intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24) { + && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) { depthRegion = irbStencil->mt->region; } diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index bdb07294039..4cf6acc34c4 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -104,18 +104,18 @@ intel_init_texture_formats(struct gl_context *ctx) intel_screen->deviceID != PCI_CHIP_845_G) ctx->TextureFormatSupported[MESA_FORMAT_B8G8R8X8_UNORM] = true; if (intel->gen == 3) - ctx->TextureFormatSupported[MESA_FORMAT_SARGB8] = true; - ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = true; - ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = true; - ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = true; + ctx->TextureFormatSupported[MESA_FORMAT_B8G8R8A8_SRGB] = true; + ctx->TextureFormatSupported[MESA_FORMAT_B4G4R4A4_UNORM] = true; + ctx->TextureFormatSupported[MESA_FORMAT_B5G5R5A1_UNORM] = true; + ctx->TextureFormatSupported[MESA_FORMAT_B5G6R5_UNORM] = true; ctx->TextureFormatSupported[MESA_FORMAT_L_UNORM8] = true; ctx->TextureFormatSupported[MESA_FORMAT_A_UNORM8] = true; ctx->TextureFormatSupported[MESA_FORMAT_I_UNORM8] = true; - ctx->TextureFormatSupported[MESA_FORMAT_AL88] = true; + ctx->TextureFormatSupported[MESA_FORMAT_L8A8_UNORM] = true; /* Depth and stencil */ - ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true; - ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true; /* * This was disabled in initial FBO enabling to avoid combinations diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index ffca3901ca3..4f4b693f0f0 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -48,15 +48,15 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode) return MAPSURF_8BIT | MT_8BIT_I8; case MESA_FORMAT_A_UNORM8: return MAPSURF_8BIT | MT_8BIT_A8; - case MESA_FORMAT_AL88: + case MESA_FORMAT_L8A8_UNORM: return MAPSURF_16BIT | MT_16BIT_AY88; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return MAPSURF_16BIT | MT_16BIT_RGB565; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return MAPSURF_16BIT | MT_16BIT_ARGB1555; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return MAPSURF_16BIT | MT_16BIT_ARGB4444; - case MESA_FORMAT_SARGB8: + case MESA_FORMAT_B8G8R8A8_SRGB: case MESA_FORMAT_B8G8R8A8_UNORM: return MAPSURF_32BIT | MT_32BIT_ARGB8888; case MESA_FORMAT_B8G8R8X8_UNORM: @@ -88,8 +88,8 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode) case MESA_FORMAT_RGBA_DXT5: case MESA_FORMAT_SRGBA_DXT5: return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5); - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_Z24_UNORM_S8_UINT: if (DepthMode == GL_ALPHA) return (MAPSURF_32BIT | MT_32BIT_x8A24); else if (DepthMode == GL_INTENSITY) diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index e263da0d79a..0ab616c099f 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -551,9 +551,9 @@ static uint32_t i915_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] = { [MESA_FORMAT_B8G8R8A8_UNORM] = DV_PF_8888, [MESA_FORMAT_B8G8R8X8_UNORM] = DV_PF_8888, - [MESA_FORMAT_RGB565] = DV_PF_565 | DITHER_FULL_ALWAYS, - [MESA_FORMAT_ARGB1555] = DV_PF_1555 | DITHER_FULL_ALWAYS, - [MESA_FORMAT_ARGB4444] = DV_PF_4444 | DITHER_FULL_ALWAYS, + [MESA_FORMAT_B5G6R5_UNORM] = DV_PF_565 | DITHER_FULL_ALWAYS, + [MESA_FORMAT_B5G5R5A1_UNORM] = DV_PF_1555 | DITHER_FULL_ALWAYS, + [MESA_FORMAT_B4G4R4A4_UNORM] = DV_PF_4444 | DITHER_FULL_ALWAYS, }; static bool @@ -562,8 +562,8 @@ i915_render_target_supported(struct intel_context *intel, { mesa_format format = rb->Format; - if (format == MESA_FORMAT_S8_Z24 || - format == MESA_FORMAT_X8_Z24 || + if (format == MESA_FORMAT_Z24_UNORM_X8_UINT || + format == MESA_FORMAT_Z24_UNORM_S8_UINT || format == MESA_FORMAT_Z_UNORM16) { return true; } @@ -777,7 +777,7 @@ i915_update_draw_buffer(struct intel_context *intel) /* Check for stencil fallback. */ if (irbStencil && irbStencil->mt) { - assert(intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24); + assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT); FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false); } else if (irbStencil && !irbStencil->mt) { FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true); @@ -790,7 +790,7 @@ i915_update_draw_buffer(struct intel_context *intel) * we still need to set up the shared depth/stencil state so we can use it. */ if (depthRegion == NULL && irbStencil && irbStencil->mt - && intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24) { + && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_X8_UINT) { depthRegion = irbStencil->mt->region; } diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c index 5e9fc5ba625..d4e269dc841 100644 --- a/src/mesa/drivers/dri/i915/intel_blit.c +++ b/src/mesa/drivers/dri/i915/intel_blit.c @@ -455,14 +455,14 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) clear_val = PACK_COLOR_8888(clear[3], clear[0], clear[1], clear[2]); break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]); break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: clear_val = PACK_COLOR_4444(clear[3], clear[0], clear[1], clear[2]); break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: clear_val = PACK_COLOR_1555(clear[3], clear[0], clear[1], clear[2]); break; diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c index 735f3460f6a..161a1d62216 100644 --- a/src/mesa/drivers/dri/i915/intel_fbo.c +++ b/src/mesa/drivers/dri/i915/intel_fbo.c @@ -194,7 +194,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer case GL_STENCIL_INDEX8_EXT: case GL_STENCIL_INDEX16_EXT: /* These aren't actual texture formats, so force them here. */ - rb->Format = MESA_FORMAT_S8_Z24; + rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; break; } diff --git a/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c index 09ced23a8b3..f4a2293e6da 100644 --- a/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i915/intel_pixel_bitmap.c @@ -232,7 +232,7 @@ do_blit_bitmap( struct gl_context *ctx, case MESA_FORMAT_B8G8R8X8_UNORM: color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]); break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]); break; default: diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index 9b0262a4a79..f3c0fa32320 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -857,9 +857,9 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, _mesa_initialize_window_framebuffer(fb, mesaVis); if (mesaVis->redBits == 5) - rgbFormat = MESA_FORMAT_RGB565; + rgbFormat = MESA_FORMAT_B5G6R5_UNORM; else if (mesaVis->sRGBCapable) - rgbFormat = MESA_FORMAT_SARGB8; + rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB; else if (mesaVis->alphaBits == 0) rgbFormat = MESA_FORMAT_B8G8R8X8_UNORM; else @@ -886,7 +886,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, * Use combined depth/stencil. Note that the renderbuffer is * attached to two attachment points. */ - rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24); + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base); } @@ -1043,7 +1043,7 @@ static __DRIconfig** intel_screen_make_configs(__DRIscreen *dri_screen) { static const mesa_format formats[] = { - MESA_FORMAT_RGB565, + MESA_FORMAT_B5G6R5_UNORM, MESA_FORMAT_B8G8R8A8_UNORM }; @@ -1069,7 +1069,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) depth_bits[0] = 0; stencil_bits[0] = 0; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[1] = 16; stencil_bits[1] = 0; } else { @@ -1093,7 +1093,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) for (int i = 0; i < ARRAY_SIZE(formats); i++) { __DRIconfig **new_configs; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[0] = 16; stencil_bits[0] = 0; } else { diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c index 6aa11411439..57674b9b5cf 100644 --- a/src/mesa/drivers/dri/i915/intel_tex_image.c +++ b/src/mesa/drivers/dri/i915/intel_tex_image.c @@ -317,7 +317,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, } } else if (rb->mt->cpp == 2) { internalFormat = GL_RGB; - texFormat = MESA_FORMAT_RGB565; + texFormat = MESA_FORMAT_B5G6R5_UNORM; } _mesa_lock_texture(&intel->ctx, texObj); diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index e1b782dbba2..9fc410c215e 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -95,7 +95,7 @@ brw_blorp_surface_info::set(struct brw_context *brw, this->map_stencil_as_y_tiled = true; this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM; break; - case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_Z24_UNORM_S8_UINT: /* It would make sense to use BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS * here, but unfortunately it isn't supported as a render target, which * would prevent us from blitting to 24-bit depth. @@ -328,7 +328,7 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt, switch (mt->format) { case MESA_FORMAT_Z_UNORM16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break; case MESA_FORMAT_Z_FLOAT32: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break; - case MESA_FORMAT_X8_Z24: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break; + case MESA_FORMAT_Z24_UNORM_S8_UINT: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break; default: assert(0); break; } } diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 55ff1e6bfb2..08cba13c9dd 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -219,7 +219,7 @@ formats_match(GLbitfield buffer_bit, struct intel_renderbuffer *src_irb, { /* Note: don't just check gl_renderbuffer::Format, because in some cases * multiple gl_formats resolve to the same native type in the miptree (for - * example MESA_FORMAT_X8_Z24 and MESA_FORMAT_S8_Z24), and we can blit + * example MESA_FORMAT_Z24_UNORM_S8_UINT and MESA_FORMAT_Z24_UNORM_X8_UINT), and we can blit * between those formats. */ mesa_format src_format = find_miptree(buffer_bit, src_irb)->format; @@ -368,8 +368,8 @@ brw_blorp_copytexsubimage(struct brw_context *brw, * we have to lie about the surface format. See the comments in * brw_blorp_surface_info::set(). */ - if ((src_mt->format == MESA_FORMAT_X8_Z24) != - (dst_mt->format == MESA_FORMAT_X8_Z24)) { + if ((src_mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT) != + (dst_mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT)) { return false; } diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index b463be86ac6..953e9bae14e 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -129,8 +129,8 @@ brw_fast_clear_depth(struct gl_context *ctx) uint32_t depth_clear_value; switch (mt->format) { - case MESA_FORMAT_Z32_FLOAT_X24S8: - case MESA_FORMAT_S8_Z24: + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: + case MESA_FORMAT_Z24_UNORM_X8_UINT: /* From the Sandy Bridge PRM, volume 2 part 1, page 314: * * "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index b82f76f72cc..d46bdcd178d 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -891,7 +891,7 @@ intel_gles3_srgb_workaround(struct brw_context *brw, fb->Visual.sRGBCapable = false; for (int i = 0; i < BUFFER_COUNT; i++) { if (fb->Attachment[i].Renderbuffer && - fb->Attachment[i].Renderbuffer->Format == MESA_FORMAT_SARGB8) { + fb->Attachment[i].Renderbuffer->Format == MESA_FORMAT_B8G8R8A8_SRGB) { fb->Attachment[i].Renderbuffer->Format = MESA_FORMAT_B8G8R8A8_UNORM; } } diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 438637447de..cb2447ff8fe 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -142,8 +142,8 @@ brw_depthbuffer_format(struct brw_context *brw) if (!drb && (srb = intel_get_renderbuffer(fb, BUFFER_STENCIL)) && !srb->mt->stencil_mt && - (intel_rb_format(srb) == MESA_FORMAT_S8_Z24 || - intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_X24S8)) { + (intel_rb_format(srb) == MESA_FORMAT_Z24_UNORM_X8_UINT || + intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_S8X24_UINT)) { drb = srb; } @@ -155,7 +155,7 @@ brw_depthbuffer_format(struct brw_context *brw) return BRW_DEPTHFORMAT_D16_UNORM; case MESA_FORMAT_Z_FLOAT32: return BRW_DEPTHFORMAT_D32_FLOAT; - case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_Z24_UNORM_S8_UINT: if (brw->gen >= 6) { return BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; } else { @@ -173,9 +173,9 @@ brw_depthbuffer_format(struct brw_context *brw) */ return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT; } - case MESA_FORMAT_S8_Z24: + case MESA_FORMAT_Z24_UNORM_X8_UINT: return BRW_DEPTHFORMAT_D24_UNORM_S8_UINT; - case MESA_FORMAT_Z32_FLOAT_X24S8: + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: return BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT; default: _mesa_problem(ctx, "Unexpected depth format %s\n", diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 651c0f96217..e66a99fe57f 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -329,19 +329,19 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_X8R8G8B8_UNORM] = 0, [MESA_FORMAT_BGR_UNORM8] = 0, [MESA_FORMAT_RGB_UNORM8] = BRW_SURFACEFORMAT_R8G8B8_UNORM, - [MESA_FORMAT_RGB565] = BRW_SURFACEFORMAT_B5G6R5_UNORM, - [MESA_FORMAT_RGB565_REV] = 0, - [MESA_FORMAT_ARGB4444] = BRW_SURFACEFORMAT_B4G4R4A4_UNORM, - [MESA_FORMAT_ARGB4444_REV] = 0, - [MESA_FORMAT_RGBA5551] = 0, - [MESA_FORMAT_ARGB1555] = BRW_SURFACEFORMAT_B5G5R5A1_UNORM, - [MESA_FORMAT_ARGB1555_REV] = 0, - [MESA_FORMAT_AL44] = 0, - [MESA_FORMAT_AL88] = BRW_SURFACEFORMAT_L8A8_UNORM, - [MESA_FORMAT_AL88_REV] = 0, - [MESA_FORMAT_AL1616] = BRW_SURFACEFORMAT_L16A16_UNORM, - [MESA_FORMAT_AL1616_REV] = 0, - [MESA_FORMAT_RGB332] = 0, + [MESA_FORMAT_B5G6R5_UNORM] = BRW_SURFACEFORMAT_B5G6R5_UNORM, + [MESA_FORMAT_R5G6B5_UNORM] = 0, + [MESA_FORMAT_B4G4R4A4_UNORM] = BRW_SURFACEFORMAT_B4G4R4A4_UNORM, + [MESA_FORMAT_A4R4G4B4_UNORM] = 0, + [MESA_FORMAT_A1B5G5R5_UNORM] = 0, + [MESA_FORMAT_B5G5R5A1_UNORM] = BRW_SURFACEFORMAT_B5G5R5A1_UNORM, + [MESA_FORMAT_A1R5G5B5_UNORM] = 0, + [MESA_FORMAT_L4A4_UNORM] = 0, + [MESA_FORMAT_L8A8_UNORM] = BRW_SURFACEFORMAT_L8A8_UNORM, + [MESA_FORMAT_A8L8_UNORM] = 0, + [MESA_FORMAT_L16A16_UNORM] = BRW_SURFACEFORMAT_L16A16_UNORM, + [MESA_FORMAT_A16L16_UNORM] = 0, + [MESA_FORMAT_B2G3R3_UNORM] = 0, [MESA_FORMAT_A_UNORM8] = BRW_SURFACEFORMAT_A8_UNORM, [MESA_FORMAT_A_UNORM16] = BRW_SURFACEFORMAT_A16_UNORM, [MESA_FORMAT_L_UNORM8] = BRW_SURFACEFORMAT_L8_UNORM, @@ -351,25 +351,25 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_YCBCR_REV] = BRW_SURFACEFORMAT_YCRCB_NORMAL, [MESA_FORMAT_YCBCR] = BRW_SURFACEFORMAT_YCRCB_SWAPUVY, [MESA_FORMAT_R_UNORM8] = BRW_SURFACEFORMAT_R8_UNORM, - [MESA_FORMAT_GR88] = BRW_SURFACEFORMAT_R8G8_UNORM, - [MESA_FORMAT_RG88] = 0, + [MESA_FORMAT_R8G8_UNORM] = BRW_SURFACEFORMAT_R8G8_UNORM, + [MESA_FORMAT_G8R8_UNORM] = 0, [MESA_FORMAT_R_UNORM16] = BRW_SURFACEFORMAT_R16_UNORM, - [MESA_FORMAT_GR1616] = BRW_SURFACEFORMAT_R16G16_UNORM, - [MESA_FORMAT_RG1616] = 0, - [MESA_FORMAT_ARGB2101010] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM, - [MESA_FORMAT_Z24_S8] = 0, - [MESA_FORMAT_S8_Z24] = 0, + [MESA_FORMAT_R16G16_UNORM] = BRW_SURFACEFORMAT_R16G16_UNORM, + [MESA_FORMAT_G16R16_UNORM] = 0, + [MESA_FORMAT_B10G10R10A2_UNORM] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM, + [MESA_FORMAT_S8_UINT_Z24_UNORM] = 0, + [MESA_FORMAT_Z24_UNORM_X8_UINT] = 0, [MESA_FORMAT_Z_UNORM16] = 0, - [MESA_FORMAT_X8_Z24] = 0, - [MESA_FORMAT_Z24_X8] = 0, + [MESA_FORMAT_Z24_UNORM_S8_UINT] = 0, + [MESA_FORMAT_X8Z24_UNORM] = 0, [MESA_FORMAT_Z_UNORM32] = 0, [MESA_FORMAT_S_UINT8] = 0, [MESA_FORMAT_BGR_SRGB8] = 0, - [MESA_FORMAT_SRGBA8] = 0, - [MESA_FORMAT_SARGB8] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB, + [MESA_FORMAT_A8B8G8R8_SRGB] = 0, + [MESA_FORMAT_B8G8R8A8_SRGB] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB, [MESA_FORMAT_L_SRGB8] = BRW_SURFACEFORMAT_L8_UNORM_SRGB, - [MESA_FORMAT_SLA8] = BRW_SURFACEFORMAT_L8A8_UNORM_SRGB, + [MESA_FORMAT_L8A8_SRGB] = BRW_SURFACEFORMAT_L8A8_UNORM_SRGB, [MESA_FORMAT_SRGB_DXT1] = BRW_SURFACEFORMAT_DXT1_RGB_SRGB, [MESA_FORMAT_SRGBA_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM_SRGB, [MESA_FORMAT_SRGBA_DXT3] = BRW_SURFACEFORMAT_BC2_UNORM_SRGB, @@ -496,22 +496,22 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_SIGNED_AL1616] = 0, [MESA_FORMAT_SIGNED_I16] = 0, - [MESA_FORMAT_RGB9_E5_FLOAT] = BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP, - [MESA_FORMAT_R11_G11_B10_FLOAT] = BRW_SURFACEFORMAT_R11G11B10_FLOAT, + [MESA_FORMAT_R9G9B9E5_FLOAT] = BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP, + [MESA_FORMAT_R11G11B10_FLOAT] = BRW_SURFACEFORMAT_R11G11B10_FLOAT, [MESA_FORMAT_Z_FLOAT32] = 0, - [MESA_FORMAT_Z32_FLOAT_X24S8] = 0, + [MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = 0, - [MESA_FORMAT_ARGB2101010_UINT] = BRW_SURFACEFORMAT_B10G10R10A2_UINT, - [MESA_FORMAT_ABGR2101010_UINT] = BRW_SURFACEFORMAT_R10G10B10A2_UINT, + [MESA_FORMAT_B10G10R10A2_UINT] = BRW_SURFACEFORMAT_B10G10R10A2_UINT, + [MESA_FORMAT_R10G10B10A2_UINT] = BRW_SURFACEFORMAT_R10G10B10A2_UINT, - [MESA_FORMAT_XRGB4444_UNORM] = 0, - [MESA_FORMAT_XRGB1555_UNORM] = BRW_SURFACEFORMAT_B5G5R5X1_UNORM, - [MESA_FORMAT_XBGR8888_SNORM] = 0, - [MESA_FORMAT_XBGR8888_SRGB] = 0, + [MESA_FORMAT_B4G4R4X4_UNORM] = 0, + [MESA_FORMAT_B5G5R5X1_UNORM] = BRW_SURFACEFORMAT_B5G5R5X1_UNORM, + [MESA_FORMAT_R8G8B8X8_SNORM] = 0, + [MESA_FORMAT_R8G8B8X8_SRGB] = 0, [MESA_FORMAT_RGBX_UINT8] = 0, [MESA_FORMAT_RGBX_SINT8] = 0, - [MESA_FORMAT_XRGB2101010_UNORM] = BRW_SURFACEFORMAT_B10G10R10X2_UNORM, + [MESA_FORMAT_B10G10R10X2_UNORM] = BRW_SURFACEFORMAT_B10G10R10X2_UNORM, [MESA_FORMAT_RGBX_UNORM16] = BRW_SURFACEFORMAT_R16G16B16X16_UNORM, [MESA_FORMAT_RGBX_SNORM16] = 0, [MESA_FORMAT_RGBX_FLOAT16] = BRW_SURFACEFORMAT_R16G16B16X16_FLOAT, @@ -600,20 +600,20 @@ brw_init_surface_formats(struct brw_context *brw) /* We will check this table for FBO completeness, but the surface format * table above only covered color rendering. */ - brw->format_supported_as_render_target[MESA_FORMAT_S8_Z24] = true; - brw->format_supported_as_render_target[MESA_FORMAT_X8_Z24] = true; + brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; + brw->format_supported_as_render_target[MESA_FORMAT_Z24_UNORM_S8_UINT] = true; brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true; brw->format_supported_as_render_target[MESA_FORMAT_Z_UNORM16] = true; brw->format_supported_as_render_target[MESA_FORMAT_Z_FLOAT32] = true; - brw->format_supported_as_render_target[MESA_FORMAT_Z32_FLOAT_X24S8] = true; + brw->format_supported_as_render_target[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true; /* We remap depth formats to a supported texturing format in * translate_tex_format(). */ - ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true; - ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_X8_UINT] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z24_UNORM_S8_UINT] = true; ctx->TextureFormatSupported[MESA_FORMAT_Z_FLOAT32] = true; - ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_X24S8] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true; /* It appears that Z16 is slower than Z24 (on Intel Ivybridge and newer * hardware at least), so there's no real reason to prefer it unless you're @@ -697,14 +697,14 @@ translate_tex_format(struct brw_context *brw, case MESA_FORMAT_Z_UNORM16: return BRW_SURFACEFORMAT_R16_UNORM; - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_X8_Z24: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_Z24_UNORM_S8_UINT: return BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS; case MESA_FORMAT_Z_FLOAT32: return BRW_SURFACEFORMAT_R32_FLOAT; - case MESA_FORMAT_Z32_FLOAT_X24S8: + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: return BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS; case MESA_FORMAT_RGBA_FLOAT32: @@ -739,9 +739,9 @@ brw_is_hiz_depth_format(struct brw_context *brw, mesa_format format) switch (format) { case MESA_FORMAT_Z_FLOAT32: - case MESA_FORMAT_Z32_FLOAT_X24S8: - case MESA_FORMAT_X8_Z24: - case MESA_FORMAT_S8_Z24: + case MESA_FORMAT_Z32_FLOAT_S8X24_UINT: + case MESA_FORMAT_Z24_UNORM_S8_UINT: + case MESA_FORMAT_Z24_UNORM_X8_UINT: case MESA_FORMAT_Z_UNORM16: return true; default: diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 5f6e1b3c391..d99f9a67f73 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -209,7 +209,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer rb->Format = MESA_FORMAT_S_UINT8; } else { assert(!brw->must_use_separate_stencil); - rb->Format = MESA_FORMAT_S8_Z24; + rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; } break; } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 2a84391f732..47a0afbbd79 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -370,9 +370,9 @@ intel_miptree_create_layout(struct brw_context *brw, /* Fix up the Z miptree format for how we're splitting out separate * stencil. Gen7 expects there to be no stencil bits in its depth buffer. */ - if (mt->format == MESA_FORMAT_S8_Z24) { - mt->format = MESA_FORMAT_X8_Z24; - } else if (mt->format == MESA_FORMAT_Z32_FLOAT_X24S8) { + if (mt->format == MESA_FORMAT_Z24_UNORM_X8_UINT) { + mt->format = MESA_FORMAT_Z24_UNORM_S8_UINT; + } else if (mt->format == MESA_FORMAT_Z32_FLOAT_S8X24_UINT) { mt->format = MESA_FORMAT_Z_FLOAT32; mt->cpp = 4; } else { @@ -512,7 +512,7 @@ intel_miptree_create(struct brw_context *brw, case MESA_FORMAT_ETC2_SRGB8: case MESA_FORMAT_ETC2_SRGB8_ALPHA8_EAC: case MESA_FORMAT_ETC2_SRGB8_PUNCHTHROUGH_ALPHA1: - format = MESA_FORMAT_SARGB8; + format = MESA_FORMAT_B8G8R8A8_SRGB; break; case MESA_FORMAT_ETC2_RGBA8_EAC: case MESA_FORMAT_ETC2_RGB8_PUNCHTHROUGH_ALPHA1: @@ -525,7 +525,7 @@ intel_miptree_create(struct brw_context *brw, format = MESA_FORMAT_SIGNED_R16; break; case MESA_FORMAT_ETC2_RG11_EAC: - format = MESA_FORMAT_GR1616; + format = MESA_FORMAT_R16G16_UNORM; break; case MESA_FORMAT_ETC2_SIGNED_RG11_EAC: format = MESA_FORMAT_SIGNED_GR1616; @@ -918,10 +918,10 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt, assert(target_to_target(image->TexObject->Target) == mt->target); mesa_format mt_format = mt->format; - if (mt->format == MESA_FORMAT_X8_Z24 && mt->stencil_mt) - mt_format = MESA_FORMAT_S8_Z24; + if (mt->format == MESA_FORMAT_Z24_UNORM_S8_UINT && mt->stencil_mt) + mt_format = MESA_FORMAT_Z24_UNORM_X8_UINT; if (mt->format == MESA_FORMAT_Z_FLOAT32 && mt->stencil_mt) - mt_format = MESA_FORMAT_Z32_FLOAT_X24S8; + mt_format = MESA_FORMAT_Z32_FLOAT_S8X24_UINT; if (mt->etc_format != MESA_FORMAT_NONE) mt_format = mt->etc_format; diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index cb2eda60a54..775730c0a92 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -278,9 +278,9 @@ struct intel_mipmap_tree * However, for textures and renderbuffers with packed depth/stencil formats * on hardware where we want or need to use separate stencil, there will be * two miptrees for storing the data. If the depthstencil texture or rb is - * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be - * MESA_FORMAT_Z_FLOAT32, otherwise for MESA_FORMAT_S8_Z24 objects it will be - * MESA_FORMAT_X8_Z24. + * MESA_FORMAT_Z32_FLOAT_S8X24_UINT, then mt->format will be + * MESA_FORMAT_Z_FLOAT32, otherwise for MESA_FORMAT_Z24_UNORM_X8_UINT objects it will be + * MESA_FORMAT_Z24_UNORM_S8_UINT. * * For ETC1/ETC2 textures, this is one of the uncompressed mesa texture * formats if the hardware lacks support for ETC1/ETC2. See @ref wraps_etc. diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c index 34edc246cc3..a9674ca2db3 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c @@ -233,7 +233,7 @@ do_blit_bitmap( struct gl_context *ctx, case MESA_FORMAT_B8G8R8X8_UNORM: color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]); break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]); break; default: diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 1b884cbcad4..7700a4ef0cf 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -976,13 +976,13 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, _mesa_initialize_window_framebuffer(fb, mesaVis); if (mesaVis->redBits == 5) - rgbFormat = MESA_FORMAT_RGB565; + rgbFormat = MESA_FORMAT_B5G6R5_UNORM; else if (mesaVis->sRGBCapable) - rgbFormat = MESA_FORMAT_SARGB8; + rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB; else if (mesaVis->alphaBits == 0) rgbFormat = MESA_FORMAT_B8G8R8X8_UNORM; else { - rgbFormat = MESA_FORMAT_SARGB8; + rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB; fb->Visual.sRGBCapable = true; } @@ -1004,7 +1004,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, assert(mesaVis->stencilBits == 8); if (screen->devinfo->has_hiz_and_separate_stencil) { - rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24, + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8, @@ -1015,7 +1015,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, * Use combined depth/stencil. Note that the renderbuffer is * attached to two attachment points. */ - rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24, + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base); @@ -1125,7 +1125,7 @@ static __DRIconfig** intel_screen_make_configs(__DRIscreen *dri_screen) { static const mesa_format formats[] = { - MESA_FORMAT_RGB565, + MESA_FORMAT_B5G6R5_UNORM, MESA_FORMAT_B8G8R8A8_UNORM }; @@ -1154,7 +1154,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) depth_bits[0] = 0; stencil_bits[0] = 0; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[1] = 16; stencil_bits[1] = 0; if (devinfo->gen >= 6) { @@ -1183,7 +1183,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) for (int i = 0; i < ARRAY_SIZE(formats); i++) { __DRIconfig **new_configs; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[0] = 16; stencil_bits[0] = 0; } else { @@ -1223,7 +1223,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) depth_bits[0] = 0; stencil_bits[0] = 0; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[1] = 16; stencil_bits[1] = 0; } else { diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 40095312f3f..02b3ba5a569 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -308,7 +308,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, } } else if (rb->mt->cpp == 2) { internalFormat = GL_RGB; - texFormat = MESA_FORMAT_RGB565; + texFormat = MESA_FORMAT_B5G6R5_UNORM; } _mesa_lock_texture(&brw->ctx, texObj); diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c index 5d1853374e1..ae50fe03677 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c @@ -55,7 +55,7 @@ set_renderbuffer_format(struct gl_renderbuffer *rb, GLenum internalFormat) break; case GL_RGB5: rb->_BaseFormat = GL_RGB; - rb->Format = MESA_FORMAT_RGB565; + rb->Format = MESA_FORMAT_B5G6R5_UNORM; s->cpp = 2; break; case GL_DEPTH_COMPONENT16: @@ -68,7 +68,7 @@ set_renderbuffer_format(struct gl_renderbuffer *rb, GLenum internalFormat) case GL_STENCIL_INDEX8_EXT: case GL_DEPTH24_STENCIL8_EXT: rb->_BaseFormat = GL_DEPTH_STENCIL; - rb->Format = MESA_FORMAT_Z24_S8; + rb->Format = MESA_FORMAT_S8_UINT_Z24_UNORM; s->cpp = 4; break; default: @@ -274,9 +274,9 @@ validate_format_bpp(mesa_format format) switch (format) { case MESA_FORMAT_B8G8R8X8_UNORM: case MESA_FORMAT_B8G8R8A8_UNORM: - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_S8_UINT_Z24_UNORM: return 32; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: case MESA_FORMAT_Z_UNORM16: return 16; default: diff --git a/src/mesa/drivers/dri/nouveau/nouveau_screen.c b/src/mesa/drivers/dri/nouveau/nouveau_screen.c index 4ec4b675b31..a3810649234 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_screen.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_screen.c @@ -53,7 +53,7 @@ nouveau_get_configs(void) const uint8_t msaa_samples[] = { 0 }; static const mesa_format formats[3] = { - MESA_FORMAT_RGB565, + MESA_FORMAT_B5G6R5_UNORM, MESA_FORMAT_B8G8R8A8_UNORM, MESA_FORMAT_B8G8R8X8_UNORM, }; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_texture.c b/src/mesa/drivers/dri/nouveau/nouveau_texture.c index 6882e506190..a8c0268bc98 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_texture.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_texture.c @@ -177,7 +177,7 @@ nouveau_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_COMPRESSED_RGBA: return MESA_FORMAT_B8G8R8A8_UNORM; case GL_RGB5_A1: - return MESA_FORMAT_ARGB1555; + return MESA_FORMAT_B5G5R5A1_UNORM; case GL_RGB: case GL_RGB8: @@ -190,7 +190,7 @@ nouveau_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_R3_G3_B2: case GL_RGB4: case GL_RGB5: - return MESA_FORMAT_RGB565; + return MESA_FORMAT_B5G6R5_UNORM; case 2: case GL_LUMINANCE_ALPHA: diff --git a/src/mesa/drivers/dri/nouveau/nouveau_util.h b/src/mesa/drivers/dri/nouveau/nouveau_util.h index 547d1be35a7..0efaafadd52 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_util.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_util.h @@ -46,7 +46,7 @@ pack_rgba_i(mesa_format f, uint8_t c[]) return PACK_COLOR_8888(c[RCOMP], c[GCOMP], c[BCOMP], c[ACOMP]); case MESA_FORMAT_R8G8B8A8_UNORM: return PACK_COLOR_8888(c[ACOMP], c[BCOMP], c[GCOMP], c[RCOMP]); - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return PACK_COLOR_565(c[RCOMP], c[GCOMP], c[BCOMP]); default: assert(0); @@ -57,9 +57,9 @@ static inline unsigned pack_zs_i(mesa_format f, uint32_t z, uint8_t s) { switch (f) { - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_S8_UINT_Z24_UNORM: return (z & 0xffffff00) | (s & 0xff); - case MESA_FORMAT_Z24_X8: + case MESA_FORMAT_X8Z24_UNORM: return (z & 0xffffff00); case MESA_FORMAT_Z_UNORM16: return (z & 0xffff0000) >> 16; diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_fb.c b/src/mesa/drivers/dri/nouveau/nv04_state_fb.c index d3253bae88e..8b0857d281d 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_fb.c @@ -39,7 +39,7 @@ get_rt_format(mesa_format format) return NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_X8R8G8B8; case MESA_FORMAT_B8G8R8A8_UNORM: return NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_A8R8G8B8; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_R5G6B5; default: assert(0); diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c index c4a20fa575c..ff60b338648 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c @@ -42,11 +42,11 @@ get_tex_format(struct gl_texture_image *ti) case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A4R4G4B4; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_R5G6B5; case MESA_FORMAT_B8G8R8A8_UNORM: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A8R8G8B8; diff --git a/src/mesa/drivers/dri/nouveau/nv04_surface.c b/src/mesa/drivers/dri/nouveau/nv04_surface.c index 0d8cf3b59e3..f2fc83e0577 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_surface.c +++ b/src/mesa/drivers/dri/nouveau/nv04_surface.c @@ -40,18 +40,18 @@ swzsurf_format(mesa_format format) case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: - case MESA_FORMAT_RGB332: + case MESA_FORMAT_B2G3R3_UNORM: return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8; - case MESA_FORMAT_RGB565: - case MESA_FORMAT_RGB565_REV: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB4444_REV: - case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_RGBA5551: - case MESA_FORMAT_ARGB1555_REV: - case MESA_FORMAT_AL88: - case MESA_FORMAT_AL88_REV: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_R5G6B5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_A4R4G4B4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: + case MESA_FORMAT_A1B5G5R5_UNORM: + case MESA_FORMAT_A1R5G5B5_UNORM: + case MESA_FORMAT_L8A8_UNORM: + case MESA_FORMAT_A8L8_UNORM: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: case MESA_FORMAT_Z_UNORM16: @@ -62,8 +62,8 @@ swzsurf_format(mesa_format format) case MESA_FORMAT_B8G8R8X8_UNORM: case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_A8R8G8B8_UNORM: - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_S8_UINT_Z24_UNORM: case MESA_FORMAT_Z_UNORM32: return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8; @@ -79,18 +79,18 @@ surf2d_format(mesa_format format) case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: - case MESA_FORMAT_RGB332: + case MESA_FORMAT_B2G3R3_UNORM: return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; - case MESA_FORMAT_RGB565: - case MESA_FORMAT_RGB565_REV: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB4444_REV: - case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_RGBA5551: - case MESA_FORMAT_ARGB1555_REV: - case MESA_FORMAT_AL88: - case MESA_FORMAT_AL88_REV: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_R5G6B5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_A4R4G4B4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: + case MESA_FORMAT_A1B5G5R5_UNORM: + case MESA_FORMAT_A1R5G5B5_UNORM: + case MESA_FORMAT_L8A8_UNORM: + case MESA_FORMAT_A8L8_UNORM: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: case MESA_FORMAT_Z_UNORM16: @@ -101,8 +101,8 @@ surf2d_format(mesa_format format) case MESA_FORMAT_B8G8R8X8_UNORM: case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_A8R8G8B8_UNORM: - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_S8_UINT_Z24_UNORM: case MESA_FORMAT_Z_UNORM32: return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; @@ -118,18 +118,18 @@ rect_format(mesa_format format) case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: - case MESA_FORMAT_RGB332: + case MESA_FORMAT_B2G3R3_UNORM: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; - case MESA_FORMAT_RGB565: - case MESA_FORMAT_RGB565_REV: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB4444_REV: - case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_RGBA5551: - case MESA_FORMAT_ARGB1555_REV: - case MESA_FORMAT_AL88: - case MESA_FORMAT_AL88_REV: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_R5G6B5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_A4R4G4B4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: + case MESA_FORMAT_A1B5G5R5_UNORM: + case MESA_FORMAT_A1R5G5B5_UNORM: + case MESA_FORMAT_L8A8_UNORM: + case MESA_FORMAT_A8L8_UNORM: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: case MESA_FORMAT_Z_UNORM16: @@ -140,8 +140,8 @@ rect_format(mesa_format format) case MESA_FORMAT_B8G8R8X8_UNORM: case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_A8R8G8B8_UNORM: - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_S8_UINT_Z24_UNORM: case MESA_FORMAT_Z_UNORM32: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; @@ -157,18 +157,18 @@ sifm_format(mesa_format format) case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: - case MESA_FORMAT_RGB332: + case MESA_FORMAT_B2G3R3_UNORM: return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8; - case MESA_FORMAT_RGB565: - case MESA_FORMAT_RGB565_REV: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB4444_REV: - case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_RGBA5551: - case MESA_FORMAT_ARGB1555_REV: - case MESA_FORMAT_AL88: - case MESA_FORMAT_AL88_REV: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_R5G6B5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_A4R4G4B4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: + case MESA_FORMAT_A1B5G5R5_UNORM: + case MESA_FORMAT_A1R5G5B5_UNORM: + case MESA_FORMAT_L8A8_UNORM: + case MESA_FORMAT_A8L8_UNORM: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: case MESA_FORMAT_Z_UNORM16: @@ -179,8 +179,8 @@ sifm_format(mesa_format format) case MESA_FORMAT_B8G8R8X8_UNORM: case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_A8R8G8B8_UNORM: - case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_Z24_UNORM_X8_UINT: + case MESA_FORMAT_S8_UINT_Z24_UNORM: case MESA_FORMAT_Z_UNORM32: return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8; diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c index 4cd47abbd70..19769e5c47f 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c @@ -40,11 +40,11 @@ get_rt_format(mesa_format format) return NV10_3D_RT_FORMAT_COLOR_X8R8G8B8; case MESA_FORMAT_B8G8R8A8_UNORM: return NV10_3D_RT_FORMAT_COLOR_A8R8G8B8; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV10_3D_RT_FORMAT_COLOR_R5G6B5; case MESA_FORMAT_Z_UNORM16: return NV10_3D_RT_FORMAT_DEPTH_Z16; - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_S8_UINT_Z24_UNORM: return NV10_3D_RT_FORMAT_DEPTH_Z24S8; default: assert(0); diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c index 316ee2abe6a..22c7a42ec1c 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c @@ -96,13 +96,13 @@ get_tex_format_pot(struct gl_texture_image *ti) case MESA_FORMAT_B8G8R8X8_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_X8R8G8B8; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_A1R5G5B5; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_A4R4G4B4; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_R5G6B5; case MESA_FORMAT_A_UNORM8: @@ -131,10 +131,10 @@ static uint32_t get_tex_format_rect(struct gl_texture_image *ti) { switch (ti->TexFormat) { - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_A1R5G5B5_RECT; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_R5G6B5_RECT; case MESA_FORMAT_B8G8R8A8_UNORM: diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c index 6b6cf3e3d65..6e3049e402e 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c @@ -40,11 +40,11 @@ get_rt_format(mesa_format format) return NV20_3D_RT_FORMAT_COLOR_X8R8G8B8; case MESA_FORMAT_B8G8R8A8_UNORM: return NV20_3D_RT_FORMAT_COLOR_A8R8G8B8; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV20_3D_RT_FORMAT_COLOR_R5G6B5; case MESA_FORMAT_Z_UNORM16: return NV20_3D_RT_FORMAT_DEPTH_Z16; - case MESA_FORMAT_Z24_S8: + case MESA_FORMAT_S8_UINT_Z24_UNORM: return NV20_3D_RT_FORMAT_DEPTH_Z24S8; default: assert(0); @@ -117,7 +117,7 @@ nv20_emit_framebuffer(struct gl_context *ctx, int emit) if (context_chipset(ctx) >= 0x25) setup_hierz_buffer(ctx); } else { - rt_format |= get_rt_format(MESA_FORMAT_Z24_S8); + rt_format |= get_rt_format(MESA_FORMAT_S8_UINT_Z24_UNORM); zeta_pitch = rt_pitch; } diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c index 198e4f2a489..69984068604 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c @@ -90,16 +90,16 @@ get_tex_format_pot(struct gl_texture_image *ti) case MESA_FORMAT_B8G8R8A8_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A8R8G8B8; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A1R5G5B5; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A4R4G4B4; case MESA_FORMAT_B8G8R8X8_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_X8R8G8B8; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5; case MESA_FORMAT_A_UNORM8: @@ -131,16 +131,16 @@ get_tex_format_rect(struct gl_texture_image *ti) case MESA_FORMAT_B8G8R8A8_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A8R8G8B8_RECT; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A1R5G5B5_RECT; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_A4R4G4B4_RECT; case MESA_FORMAT_B8G8R8X8_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_R8G8B8_RECT; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5_RECT; case MESA_FORMAT_L_UNORM8: diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index 62e38aabb49..a33f338990f 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -44,9 +44,9 @@ unsigned r200_check_blit(mesa_format mesa_format, uint32_t dst_pitch) switch (mesa_format) { case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_B8G8R8X8_UNORM: - case MESA_FORMAT_RGB565: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: @@ -126,13 +126,13 @@ static void inline emit_tx_setup(struct r200_context *r200, case MESA_FORMAT_B8G8R8X8_UNORM: txformat |= R200_TXFORMAT_ARGB8888; break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: txformat |= R200_TXFORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: txformat |= R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: txformat |= R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP; break; case MESA_FORMAT_A_UNORM8: @@ -142,7 +142,7 @@ static void inline emit_tx_setup(struct r200_context *r200, case MESA_FORMAT_L_UNORM8: txformat |= R200_TXFORMAT_I8; break; - case MESA_FORMAT_AL88: + case MESA_FORMAT_L8A8_UNORM: txformat |= R200_TXFORMAT_AI88 | R200_TXFORMAT_ALPHA_IN_MAP; break; default: @@ -157,9 +157,9 @@ static void inline emit_tx_setup(struct r200_context *r200, switch (dst_mesa_format) { case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_B8G8R8X8_UNORM: - case MESA_FORMAT_RGB565: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: @@ -314,13 +314,13 @@ static inline void emit_cb_setup(struct r200_context *r200, case MESA_FORMAT_R8G8B8A8_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB8888; break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: dst_format = RADEON_COLOR_FORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB4444; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; case MESA_FORMAT_A_UNORM8: diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c index 79aa753dc94..eb93036691b 100644 --- a/src/mesa/drivers/dri/r200/r200_state_init.c +++ b/src/mesa/drivers/dri/r200/r200_state_init.c @@ -452,13 +452,13 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) if (rrb->cpp == 4) atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; else switch (rrb->base.Base.Format) { - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555; break; default: diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 505c99959c7..5160c2ce2d1 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -74,14 +74,14 @@ static const struct tx_table tx_table_be[] = [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_BGR_UNORM8 ] = { 0xffffffff, 0 }, - [ MESA_FORMAT_RGB565 ] = { R200_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_RGB565_REV ] = { R200_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_ARGB4444 ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB4444_REV ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555 ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555_REV ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88 ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88_REV ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G6R5_UNORM ] = { R200_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_R5G6B5_UNORM ] = { R200_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_B4G4R4A4_UNORM ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A4R4G4B4_UNORM ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G5R5A1_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A1R5G5B5_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L8A8_UNORM ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A8L8_UNORM ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A_UNORM8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_L_UNORM8 ] = { R200_TXFORMAT_L8, 0 }, [ MESA_FORMAT_I_UNORM8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -102,14 +102,14 @@ static const struct tx_table tx_table_le[] = [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_BGR_UNORM8 ] = { R200_TXFORMAT_ARGB8888, 0 }, - [ MESA_FORMAT_RGB565 ] = { R200_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_RGB565_REV ] = { R200_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_ARGB4444 ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB4444_REV ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555 ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555_REV ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88 ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88_REV ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G6R5_UNORM ] = { R200_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_R5G6B5_UNORM ] = { R200_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_B4G4R4A4_UNORM ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A4R4G4B4_UNORM ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G5R5A1_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A1R5G5B5_UNORM ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L8A8_UNORM ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A8L8_UNORM ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A_UNORM8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_L_UNORM8 ] = { R200_TXFORMAT_L8, 0 }, [ MESA_FORMAT_I_UNORM8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -784,9 +784,9 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format t->pp_txfilter |= tx_table_le[MESA_FORMAT_BGR_UNORM8].filter; break; case 2: - texFormat = MESA_FORMAT_RGB565; - t->pp_txformat = tx_table_le[MESA_FORMAT_RGB565].format; - t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB565].filter; + texFormat = MESA_FORMAT_B5G6R5_UNORM; + t->pp_txformat = tx_table_le[MESA_FORMAT_B5G6R5_UNORM].format; + t->pp_txfilter |= tx_table_le[MESA_FORMAT_B5G6R5_UNORM].filter; break; } diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c index a5b78550e6b..8c6a0865f14 100644 --- a/src/mesa/drivers/dri/radeon/radeon_blit.c +++ b/src/mesa/drivers/dri/radeon/radeon_blit.c @@ -44,9 +44,9 @@ unsigned r100_check_blit(mesa_format mesa_format, uint32_t dst_pitch) switch (mesa_format) { case MESA_FORMAT_B8G8R8A8_UNORM: case MESA_FORMAT_B8G8R8X8_UNORM: - case MESA_FORMAT_RGB565: - case MESA_FORMAT_ARGB4444: - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G6R5_UNORM: + case MESA_FORMAT_B4G4R4A4_UNORM: + case MESA_FORMAT_B5G5R5A1_UNORM: case MESA_FORMAT_A_UNORM8: case MESA_FORMAT_L_UNORM8: case MESA_FORMAT_I_UNORM8: @@ -117,13 +117,13 @@ static void inline emit_tx_setup(struct r100_context *r100, case MESA_FORMAT_B8G8R8X8_UNORM: txformat |= RADEON_TXFORMAT_ARGB8888; break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: txformat |= RADEON_TXFORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: txformat |= RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; case MESA_FORMAT_A_UNORM8: @@ -133,7 +133,7 @@ static void inline emit_tx_setup(struct r100_context *r100, case MESA_FORMAT_L_UNORM8: txformat |= RADEON_TXFORMAT_I8; break; - case MESA_FORMAT_AL88: + case MESA_FORMAT_L8A8_UNORM: txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; default: @@ -190,13 +190,13 @@ static inline void emit_cb_setup(struct r100_context *r100, case MESA_FORMAT_B8G8R8X8_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB8888; break; - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: dst_format = RADEON_COLOR_FORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB4444; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; case MESA_FORMAT_A_UNORM8: diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index f2496e68098..3d1bef3ac6d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -310,7 +310,7 @@ radeon_map_renderbuffer(struct gl_context *ctx, } if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) { - if (rb->Format == MESA_FORMAT_S8_Z24 || rb->Format == MESA_FORMAT_X8_Z24) { + if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) { radeon_map_renderbuffer_s8z24(ctx, rb, x, y, w, h, mode, out_map, out_stride); return; @@ -419,7 +419,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx, GLboolean ok; if ((rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_DEPTH_ALWAYS_TILED) && !rrb->has_surface) { - if (rb->Format == MESA_FORMAT_S8_Z24 || rb->Format == MESA_FORMAT_X8_Z24) { + if (rb->Format == MESA_FORMAT_Z24_UNORM_X8_UINT || rb->Format == MESA_FORMAT_Z24_UNORM_S8_UINT) { radeon_unmap_renderbuffer_s8z24(ctx, rb); return; } @@ -507,7 +507,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe case GL_STENCIL_INDEX8_EXT: case GL_STENCIL_INDEX16_EXT: /* alloc a depth+stencil buffer */ - rb->Format = MESA_FORMAT_S8_Z24; + rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; cpp = 4; break; case GL_DEPTH_COMPONENT16: @@ -517,12 +517,12 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe case GL_DEPTH_COMPONENT: case GL_DEPTH_COMPONENT24: case GL_DEPTH_COMPONENT32: - rb->Format = MESA_FORMAT_X8_Z24; + rb->Format = MESA_FORMAT_Z24_UNORM_S8_UINT; cpp = 4; break; case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - rb->Format = MESA_FORMAT_S8_Z24; + rb->Format = MESA_FORMAT_Z24_UNORM_X8_UINT; cpp = 4; break; default: diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c index ee0f7782793..6998444fb66 100644 --- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c +++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c @@ -45,9 +45,9 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type) case GL_RGB: switch (type) { case GL_UNSIGNED_SHORT_5_6_5: - return MESA_FORMAT_RGB565; + return MESA_FORMAT_B5G6R5_UNORM; case GL_UNSIGNED_SHORT_5_6_5_REV: - return MESA_FORMAT_RGB565_REV; + return MESA_FORMAT_R5G6B5_UNORM; } break; case GL_RGBA: @@ -55,7 +55,7 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type) case GL_FLOAT: return MESA_FORMAT_RGBA_FLOAT32; case GL_UNSIGNED_SHORT_5_5_5_1: - return MESA_FORMAT_RGBA5551; + return MESA_FORMAT_A1B5G5R5_UNORM; case GL_UNSIGNED_INT_8_8_8_8: return MESA_FORMAT_A8B8G8R8_UNORM; case GL_UNSIGNED_BYTE: @@ -66,13 +66,13 @@ static mesa_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type) case GL_BGRA: switch (type) { case GL_UNSIGNED_SHORT_4_4_4_4: - return MESA_FORMAT_ARGB4444_REV; + return MESA_FORMAT_A4R4G4B4_UNORM; case GL_UNSIGNED_SHORT_4_4_4_4_REV: - return MESA_FORMAT_ARGB4444; + return MESA_FORMAT_B4G4R4A4_UNORM; case GL_UNSIGNED_SHORT_5_5_5_1: - return MESA_FORMAT_ARGB1555_REV; + return MESA_FORMAT_A1R5G5B5_UNORM; case GL_UNSIGNED_SHORT_1_5_5_5_REV: - return MESA_FORMAT_ARGB1555; + return MESA_FORMAT_B5G5R5A1_UNORM; case GL_UNSIGNED_INT_8_8_8_8: return MESA_FORMAT_A8R8G8B8_UNORM; case GL_UNSIGNED_BYTE: diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 2c3186ec433..eb5df2ce16f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -214,7 +214,7 @@ radeon_create_image_from_name(__DRIscreen *screen, switch (format) { case __DRI_IMAGE_FORMAT_RGB565: - image->format = MESA_FORMAT_RGB565; + image->format = MESA_FORMAT_B5G6R5_UNORM; image->internal_format = GL_RGB; image->data_type = GL_UNSIGNED_BYTE; break; @@ -314,7 +314,7 @@ radeon_create_image(__DRIscreen *screen, switch (format) { case __DRI_IMAGE_FORMAT_RGB565: - image->format = MESA_FORMAT_RGB565; + image->format = MESA_FORMAT_B5G6R5_UNORM; image->internal_format = GL_RGB; image->data_type = GL_UNSIGNED_BYTE; break; @@ -611,7 +611,7 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv, _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); if (mesaVis->redBits == 5) - rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV; + rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM; else if (mesaVis->alphaBits == 0) rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM; else @@ -632,14 +632,14 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv, if (mesaVis->depthBits == 24) { if (mesaVis->stencilBits == 8) { struct radeon_renderbuffer *depthStencilRb = - radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv); + radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base); _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base); depthStencilRb->has_surface = screen->depthHasSurface; } else { /* depth renderbuffer */ struct radeon_renderbuffer *depth = - radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv); + radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base); depth->has_surface = screen->depthHasSurface; } @@ -709,7 +709,7 @@ static const __DRIconfig **radeonInitScreen2(__DRIscreen *psp) { static const mesa_format formats[3] = { - MESA_FORMAT_RGB565, + MESA_FORMAT_B5G6R5_UNORM, MESA_FORMAT_B8G8R8X8_UNORM, MESA_FORMAT_B8G8R8A8_UNORM }; diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c index ee8880027d4..2dd19184905 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state_init.c +++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c @@ -335,13 +335,13 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom) if (rrb->cpp == 4) atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB8888; else switch (rrb->base.Base.Format) { - case MESA_FORMAT_RGB565: + case MESA_FORMAT_B5G6R5_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_RGB565; break; - case MESA_FORMAT_ARGB4444: + case MESA_FORMAT_B4G4R4A4_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB4444; break; - case MESA_FORMAT_ARGB1555: + case MESA_FORMAT_B5G5R5A1_UNORM: atom->cmd[CTX_RB3D_CNTL] |= RADEON_COLOR_FORMAT_ARGB1555; break; default: diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c index f8430cb95c0..e52730411c4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c @@ -108,8 +108,8 @@ do_copy_texsubimage(struct gl_context *ctx, switch (dst_bpp) { case 2: - src_mesaformat = MESA_FORMAT_RGB565; - dst_mesaformat = MESA_FORMAT_RGB565; + src_mesaformat = MESA_FORMAT_B5G6R5_UNORM; + dst_mesaformat = MESA_FORMAT_B5G6R5_UNORM; break; case 4: src_mesaformat = MESA_FORMAT_B8G8R8A8_UNORM; diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index e79d8dfae17..66daccf0895 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -79,14 +79,14 @@ static const struct tx_table tx_table[] = [ MESA_FORMAT_B8G8R8A8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_BGR_UNORM8 ] = { RADEON_TXFORMAT_ARGB8888, 0 }, - [ MESA_FORMAT_RGB565 ] = { RADEON_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_RGB565_REV ] = { RADEON_TXFORMAT_RGB565, 0 }, - [ MESA_FORMAT_ARGB4444 ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB4444_REV ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555 ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_ARGB1555_REV ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88 ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_AL88_REV ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G6R5_UNORM ] = { RADEON_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_R5G6B5_UNORM ] = { RADEON_TXFORMAT_RGB565, 0 }, + [ MESA_FORMAT_B4G4R4A4_UNORM ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A4R4G4B4_UNORM ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_B5G5R5A1_UNORM ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A1R5G5B5_UNORM ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L8A8_UNORM ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A8L8_UNORM ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A_UNORM8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_L_UNORM8 ] = { RADEON_TXFORMAT_L8, 0 }, [ MESA_FORMAT_I_UNORM8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -659,9 +659,9 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form t->pp_txfilter |= tx_table[MESA_FORMAT_BGR_UNORM8].filter; break; case 2: - texFormat = MESA_FORMAT_RGB565; - t->pp_txformat = tx_table[MESA_FORMAT_RGB565].format; - t->pp_txfilter |= tx_table[MESA_FORMAT_RGB565].filter; + texFormat = MESA_FORMAT_B5G6R5_UNORM; + t->pp_txformat = tx_table[MESA_FORMAT_B5G6R5_UNORM].format; + t->pp_txfilter |= tx_table[MESA_FORMAT_B5G6R5_UNORM].filter; break; } diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 40b17bb8269..8c717205052 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -433,7 +433,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_DEPTH_COMPONENT32: case GL_DEPTH_STENCIL_EXT: case GL_DEPTH24_STENCIL8_EXT: - return MESA_FORMAT_S8_Z24; + return MESA_FORMAT_Z24_UNORM_X8_UINT; /* EXT_texture_sRGB */ case GL_SRGB: @@ -442,7 +442,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_SRGB8_ALPHA8: case GL_COMPRESSED_SRGB: case GL_COMPRESSED_SRGB_ALPHA: - return MESA_FORMAT_SARGB8; + return MESA_FORMAT_B8G8R8A8_SRGB; case GL_SLUMINANCE: case GL_SLUMINANCE8: @@ -452,7 +452,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_SLUMINANCE_ALPHA: case GL_SLUMINANCE8_ALPHA8: case GL_COMPRESSED_SLUMINANCE_ALPHA: - return MESA_FORMAT_SLA8; + return MESA_FORMAT_L8A8_SRGB; case GL_COMPRESSED_SRGB_S3TC_DXT1_EXT: return MESA_FORMAT_SRGB_DXT1; @@ -513,7 +513,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format) switch (mesa_format) { case MESA_FORMAT_Z_UNORM16: - case MESA_FORMAT_S8_Z24: + case MESA_FORMAT_Z24_UNORM_X8_UINT: return 1; default: return 0; @@ -594,18 +594,18 @@ radeonInitTextureFormats(void) if (_mesa_little_endian()) { _radeon_texformat_rgba8888 = MESA_FORMAT_A8B8G8R8_UNORM; _radeon_texformat_argb8888 = MESA_FORMAT_B8G8R8A8_UNORM; - _radeon_texformat_rgb565 = MESA_FORMAT_RGB565; - _radeon_texformat_argb4444 = MESA_FORMAT_ARGB4444; - _radeon_texformat_argb1555 = MESA_FORMAT_ARGB1555; - _radeon_texformat_al88 = MESA_FORMAT_AL88; + _radeon_texformat_rgb565 = MESA_FORMAT_B5G6R5_UNORM; + _radeon_texformat_argb4444 = MESA_FORMAT_B4G4R4A4_UNORM; + _radeon_texformat_argb1555 = MESA_FORMAT_B5G5R5A1_UNORM; + _radeon_texformat_al88 = MESA_FORMAT_L8A8_UNORM; } else { _radeon_texformat_rgba8888 = MESA_FORMAT_R8G8B8A8_UNORM; _radeon_texformat_argb8888 = MESA_FORMAT_A8R8G8B8_UNORM; - _radeon_texformat_rgb565 = MESA_FORMAT_RGB565_REV; - _radeon_texformat_argb4444 = MESA_FORMAT_ARGB4444_REV; - _radeon_texformat_argb1555 = MESA_FORMAT_ARGB1555_REV; - _radeon_texformat_al88 = MESA_FORMAT_AL88_REV; + _radeon_texformat_rgb565 = MESA_FORMAT_R5G6B5_UNORM; + _radeon_texformat_argb4444 = MESA_FORMAT_A4R4G4B4_UNORM; + _radeon_texformat_argb1555 = MESA_FORMAT_A1R5G5B5_UNORM; + _radeon_texformat_al88 = MESA_FORMAT_A8L8_UNORM; } } diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c index 47f07ae9fe7..48b07bd1169 100644 --- a/src/mesa/drivers/dri/swrast/swrast.c +++ b/src/mesa/drivers/dri/swrast/swrast.c @@ -166,7 +166,7 @@ swrastFillInModes(__DRIscreen *psp, switch (pixel_bits) { case 16: - format = MESA_FORMAT_RGB565; + format = MESA_FORMAT_B5G6R5_UNORM; break; case 24: format = MESA_FORMAT_B8G8R8X8_UNORM; @@ -357,13 +357,13 @@ swrast_new_renderbuffer(const struct gl_config *visual, __DRIdrawable *dPriv, xrb->bpp = 32; break; case PF_R5G6B5: - rb->Format = MESA_FORMAT_RGB565; + rb->Format = MESA_FORMAT_B5G6R5_UNORM; rb->InternalFormat = GL_RGB; rb->_BaseFormat = GL_RGB; xrb->bpp = 16; break; case PF_R3G3B2: - rb->Format = MESA_FORMAT_RGB332; + rb->Format = MESA_FORMAT_B2G3R3_UNORM; rb->InternalFormat = GL_RGB; rb->_BaseFormat = GL_RGB; xrb->bpp = 8; diff --git a/src/mesa/drivers/haiku/swrast/SoftwareRast.cpp b/src/mesa/drivers/haiku/swrast/SoftwareRast.cpp index a4afbdca0c6..813ad1ff27d 100644 --- a/src/mesa/drivers/haiku/swrast/SoftwareRast.cpp +++ b/src/mesa/drivers/haiku/swrast/SoftwareRast.cpp @@ -605,11 +605,11 @@ MesaSoftwareRast::_SetupRenderBuffer(struct gl_renderbuffer* rb, break; case B_RGB16: rb->_BaseFormat = GL_RGB; - rb->Format = MESA_FORMAT_RGB565; + rb->Format = MESA_FORMAT_B5G6R5_UNORM; break; case B_RGB15: rb->_BaseFormat = GL_RGB; - rb->Format = MESA_FORMAT_ARGB1555; + rb->Format = MESA_FORMAT_B5G5R5A1_UNORM; break; default: fprintf(stderr, "Unsupported screen color space %s\n", diff --git a/src/mesa/drivers/osmesa/osmesa.c b/src/mesa/drivers/osmesa/osmesa.c index cd137bec533..347913dd678 100644 --- a/src/mesa/drivers/osmesa/osmesa.c +++ b/src/mesa/drivers/osmesa/osmesa.c @@ -520,7 +520,7 @@ osmesa_renderbuffer_storage(struct gl_context *ctx, struct gl_renderbuffer *rb, } else if (osmesa->format == OSMESA_RGB_565) { ASSERT(osmesa->DataType == GL_UNSIGNED_BYTE); - rb->Format = MESA_FORMAT_RGB565; + rb->Format = MESA_FORMAT_B5G6R5_UNORM; } else { _mesa_problem(ctx, "bad pixel format in osmesa renderbuffer_storage"); diff --git a/src/mesa/drivers/x11/xm_buffer.c b/src/mesa/drivers/x11/xm_buffer.c index b9beb48526d..f6e14270a47 100644 --- a/src/mesa/drivers/x11/xm_buffer.c +++ b/src/mesa/drivers/x11/xm_buffer.c @@ -352,7 +352,7 @@ xmesa_new_renderbuffer(struct gl_context *ctx, GLuint name, xrb->Base.Base.Format = MESA_FORMAT_R8G8B8A8_UNORM; break; case PF_5R6G5B: - xrb->Base.Base.Format = MESA_FORMAT_RGB565; + xrb->Base.Base.Format = MESA_FORMAT_B5G6R5_UNORM; break; default: _mesa_warning(ctx, "Bad pixel format in xmesa_new_renderbuffer"); |