aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_link.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_program.c16
-rw-r--r--src/mesa/drivers/dri/i965/brw_tcs.c14
-rw-r--r--src/mesa/drivers/dri/i965/brw_tes.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c12
7 files changed, 29 insertions, 31 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index da38ec2516a..57aaf6b9dc0 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -211,7 +211,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
compiler->scalar_stage[stage]);
- infos[stage] = prog->nir->info;
+ infos[stage] = &prog->nir->info;
/* Make a pass over the IR to add state references for any built-in
* uniforms that are used. This has to be done now (during linking).
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 4641cfe8d4e..d26dce07f97 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -109,14 +109,12 @@ brw_create_nir(struct brw_context *brw,
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
- /* nir_shader may have been cloned so make sure shader_info is in sync */
- if (nir->info != &prog->info) {
- const char *name = prog->info.name;
- const char *label = prog->info.label;
- prog->info = *nir->info;
- prog->info.name = name;
- prog->info.label = label;
- }
+ /* Copy the info we just generated back into the gl_program */
+ const char *prog_name = prog->info.name;
+ const char *prog_label = prog->info.label;
+ prog->info = nir->info;
+ prog->info.name = prog_name;
+ prog->info.label = prog_label;
if (shader_prog) {
NIR_PASS_V(nir, nir_lower_samplers, shader_prog);
@@ -726,7 +724,7 @@ brw_assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
}
- if (prog->nir->info->uses_texture_gather) {
+ if (prog->nir->info.uses_texture_gather) {
if (devinfo->gen >= 8) {
stage_prog_data->binding_table.gather_texture_start =
stage_prog_data->binding_table.texture_start;
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 3cc6cdbf3c0..72c5872bcfd 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -50,11 +50,11 @@ create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler,
nir_ssa_def *invoc_id =
nir_load_system_value(&b, nir_intrinsic_load_invocation_id, 0);
- nir->info->inputs_read = key->outputs_written &
+ nir->info.inputs_read = key->outputs_written &
~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
- nir->info->outputs_written = key->outputs_written;
- nir->info->tess.tcs_vertices_out = key->input_vertices;
- nir->info->name = ralloc_strdup(nir, "passthrough");
+ nir->info.outputs_written = key->outputs_written;
+ nir->info.tess.tcs_vertices_out = key->input_vertices;
+ nir->info.name = ralloc_strdup(nir, "passthrough");
nir->num_uniforms = 8 * sizeof(uint32_t);
var = nir_variable_create(nir, nir_var_uniform, glsl_vec4_type(), "hdr_0");
@@ -81,7 +81,7 @@ create_passthrough_tcs(void *mem_ctx, const struct brw_compiler *compiler,
}
/* Copy inputs to outputs. */
- uint64_t varyings = nir->info->inputs_read;
+ uint64_t varyings = nir->info.inputs_read;
while (varyings != 0) {
const int varying = ffsll(varyings) - 1;
@@ -394,8 +394,8 @@ brw_tcs_precompile(struct gl_context *ctx,
key.tes_primitive_mode = GL_TRIANGLES;
}
- key.outputs_written = prog->nir->info->outputs_written;
- key.patch_outputs_written = prog->nir->info->patch_outputs_written;
+ key.outputs_written = prog->nir->info.outputs_written;
+ key.patch_outputs_written = prog->nir->info.patch_outputs_written;
success = brw_codegen_tcs_prog(brw, btcp, btep, &key);
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 449f946d854..372ef516a84 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -234,15 +234,15 @@ brw_tes_precompile(struct gl_context *ctx,
memset(&key, 0, sizeof(key));
key.program_string_id = btep->id;
- key.inputs_read = prog->nir->info->inputs_read;
- key.patch_inputs_read = prog->nir->info->patch_inputs_read;
+ key.inputs_read = prog->nir->info.inputs_read;
+ key.patch_inputs_read = prog->nir->info.patch_inputs_read;
if (shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]) {
struct gl_program *tcp =
shader_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program;
- key.inputs_read |= tcp->nir->info->outputs_written &
+ key.inputs_read |= tcp->nir->info.outputs_written &
~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
- key.patch_inputs_read |= tcp->nir->info->patch_outputs_written;
+ key.patch_inputs_read |= tcp->nir->info.patch_outputs_written;
}
brw_setup_tex_for_precompile(brw, &key.tex, prog);
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 74b07cb3ccc..b1ea01a9add 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -219,7 +219,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
brw_compute_vue_map(devinfo,
&prog_data.base.vue_map, outputs_written,
- vp->program.nir->info->separate_shader);
+ vp->program.nir->info.separate_shader);
if (0) {
_mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 59d503e746b..6fac3c4a849 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -58,7 +58,7 @@ assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
next_binding_table_offset);
- if (prog->nir->info->outputs_read && !key->coherent_fb_fetch) {
+ if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
prog_data->binding_table.render_target_read_start =
next_binding_table_offset;
next_binding_table_offset += key->nr_color_regions;
@@ -335,7 +335,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
}
/* gather4 for RG32* is broken in multiple ways on Gen7. */
- if (brw->gen == 7 && prog->nir->info->uses_texture_gather) {
+ if (brw->gen == 7 && prog->nir->info.uses_texture_gather) {
switch (img->InternalFormat) {
case GL_RG32I:
case GL_RG32UI: {
@@ -373,7 +373,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
/* Gen6's gather4 is broken for UINT/SINT; we treat them as
* UNORM/FLOAT instead and fix it in the shader.
*/
- if (brw->gen == 6 && prog->nir->info->uses_texture_gather) {
+ if (brw->gen == 6 && prog->nir->info.uses_texture_gather) {
key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 49383c7463b..c95fb3739b3 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1303,15 +1303,15 @@ brw_update_texture_surfaces(struct brw_context *brw)
* allows the surface format to be overriden for only the
* gather4 messages. */
if (brw->gen < 8) {
- if (vs && vs->nir->info->uses_texture_gather)
+ if (vs && vs->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, vs, &brw->vs.base, true, 0);
- if (tcs && tcs->nir->info->uses_texture_gather)
+ if (tcs && tcs->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true, 0);
- if (tes && tes->nir->info->uses_texture_gather)
+ if (tes && tes->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, tes, &brw->tes.base, true, 0);
- if (gs && gs->nir->info->uses_texture_gather)
+ if (gs && gs->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, gs, &brw->gs.base, true, 0);
- if (fs && fs->nir->info->uses_texture_gather)
+ if (fs && fs->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, fs, &brw->wm.base, true, 0);
}
@@ -1356,7 +1356,7 @@ brw_update_cs_texture_surfaces(struct brw_context *brw)
* gather4 messages.
*/
if (brw->gen < 8) {
- if (cs && cs->nir->info->uses_texture_gather)
+ if (cs && cs->nir->info.uses_texture_gather)
update_stage_texture_surfaces(brw, cs, &brw->cs.base, true, 0);
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 23:56:19 +0000