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-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_util.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp30
-rw-r--r--src/mesa/drivers/dri/i965/brw_sf_emit.c28
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_generator.cpp28
6 files changed, 46 insertions, 46 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index e495c2c6dfe..83f1eba999c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -277,7 +277,7 @@ void brw_SAMPLE(struct brw_compile *p,
unsigned simd_mode,
unsigned return_format);
-void brw_math( struct brw_compile *p,
+void gen4_math(struct brw_compile *p,
struct brw_reg dest,
unsigned function,
unsigned msg_reg_nr,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 63e7bdeb206..98cc13ff4f5 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1828,7 +1828,7 @@ void brw_WAIT (struct brw_compile *p)
/** Extended math function, float[8].
*/
-void brw_math( struct brw_compile *p,
+void gen4_math(struct brw_compile *p,
struct brw_reg dest,
unsigned function,
unsigned msg_reg_nr,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_util.c b/src/mesa/drivers/dri/i965/brw_eu_util.c
index 747c2d7d2e9..0950fad99fd 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_util.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_util.c
@@ -39,7 +39,7 @@ void brw_math_invert( struct brw_compile *p,
struct brw_reg dst,
struct brw_reg src)
{
- brw_math( p,
+ gen4_math(p,
dst,
BRW_MATH_FUNCTION_INV,
0,
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index e900967a356..6c028d8f73c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -360,19 +360,19 @@ fs_generator::generate_math_gen4(fs_inst *inst,
assert(inst->mlen >= 1);
brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
- brw_math(p, dst,
- op,
- inst->base_mrf, src,
- BRW_MATH_DATA_VECTOR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(p, dst,
+ op,
+ inst->base_mrf, src,
+ BRW_MATH_DATA_VECTOR,
+ BRW_MATH_PRECISION_FULL);
if (dispatch_width == 16) {
brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);
- brw_math(p, sechalf(dst),
- op,
- inst->base_mrf + 1, sechalf(src),
- BRW_MATH_DATA_VECTOR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(p, sechalf(dst),
+ op,
+ inst->base_mrf + 1, sechalf(src),
+ BRW_MATH_DATA_VECTOR,
+ BRW_MATH_PRECISION_FULL);
brw_set_default_compression_control(p, BRW_COMPRESSION_COMPRESSED);
}
@@ -394,11 +394,11 @@ fs_generator::generate_math_g45(fs_inst *inst,
assert(inst->mlen >= 1);
- brw_math(p, dst,
- op,
- inst->base_mrf, src,
- BRW_MATH_DATA_VECTOR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(p, dst,
+ op,
+ inst->base_mrf, src,
+ BRW_MATH_DATA_VECTOR,
+ BRW_MATH_PRECISION_FULL);
}
void
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index b0593f334a1..8f26e41f0aa 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -322,13 +322,13 @@ static void invert_det( struct brw_sf_compile *c)
/* Looks like we invert all 8 elements just to get 1/det in
* position 2 !?!
*/
- brw_math(&c->func,
- c->inv_det,
- BRW_MATH_FUNCTION_INV,
- 0,
- c->det,
- BRW_MATH_DATA_SCALAR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(&c->func,
+ c->inv_det,
+ BRW_MATH_FUNCTION_INV,
+ 0,
+ c->det,
+ BRW_MATH_DATA_SCALAR,
+ BRW_MATH_PRECISION_FULL);
}
@@ -611,13 +611,13 @@ void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate)
if (pc_coord_replace) {
set_predicate_control_flag_value(p, c, pc_coord_replace);
/* Caculate 1.0/PointWidth */
- brw_math(&c->func,
- c->tmp,
- BRW_MATH_FUNCTION_INV,
- 0,
- c->dx0,
- BRW_MATH_DATA_SCALAR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(&c->func,
+ c->tmp,
+ BRW_MATH_FUNCTION_INV,
+ 0,
+ c->dx0,
+ BRW_MATH_DATA_SCALAR,
+ BRW_MATH_PRECISION_FULL);
brw_set_default_access_mode(p, BRW_ALIGN_16);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 931741faa2b..97fd2224b68 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -158,13 +158,13 @@ vec4_generator::generate_math1_gen4(vec4_instruction *inst,
struct brw_reg dst,
struct brw_reg src)
{
- brw_math(p,
- dst,
- brw_math_function(inst->opcode),
- inst->base_mrf,
- src,
- BRW_MATH_DATA_VECTOR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(p,
+ dst,
+ brw_math_function(inst->opcode),
+ inst->base_mrf,
+ src,
+ BRW_MATH_DATA_VECTOR,
+ BRW_MATH_PRECISION_FULL);
}
static void
@@ -241,13 +241,13 @@ vec4_generator::generate_math2_gen4(vec4_instruction *inst,
brw_MOV(p, retype(brw_message_reg(inst->base_mrf + 1), op1.type), op1);
brw_pop_insn_state(p);
- brw_math(p,
- dst,
- brw_math_function(inst->opcode),
- inst->base_mrf,
- op0,
- BRW_MATH_DATA_VECTOR,
- BRW_MATH_PRECISION_FULL);
+ gen4_math(p,
+ dst,
+ brw_math_function(inst->opcode),
+ inst->base_mrf,
+ op0,
+ BRW_MATH_DATA_VECTOR,
+ BRW_MATH_PRECISION_FULL);
}
void
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 23:08:48 +0000