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-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c12
-rw-r--r--src/mesa/drivers/dri/i965/intel_buffer_objects.c1
2 files changed, 9 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 76dc5775121..7da4a404668 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -946,12 +946,14 @@ brw_upload_ubo_surfaces(struct brw_context *brw,
} else {
struct intel_buffer_object *intel_bo =
intel_buffer_object(binding->BufferObject);
+ GLsizeiptrARB size = MIN2(binding->BufferObject->BufferRangeSize,
+ binding->BufferObject->Size - binding->Offset);
drm_intel_bo *bo =
intel_bufferobj_buffer(brw, intel_bo,
binding->Offset,
- binding->BufferObject->Size - binding->Offset);
+ size);
brw_create_constant_surface(brw, bo, binding->Offset,
- binding->BufferObject->Size - binding->Offset,
+ size,
&ubo_surf_offsets[i]);
}
}
@@ -968,12 +970,14 @@ brw_upload_ubo_surfaces(struct brw_context *brw,
} else {
struct intel_buffer_object *intel_bo =
intel_buffer_object(binding->BufferObject);
+ GLsizeiptrARB size = MIN2(binding->BufferObject->BufferRangeSize,
+ binding->BufferObject->Size - binding->Offset);
drm_intel_bo *bo =
intel_bufferobj_buffer(brw, intel_bo,
binding->Offset,
- binding->BufferObject->Size - binding->Offset);
+ size);
brw_create_buffer_surface(brw, bo, binding->Offset,
- binding->BufferObject->Size - binding->Offset,
+ size,
&ssbo_surf_offsets[i]);
}
}
diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index 7a5b3fca595..b26c939c214 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -198,6 +198,7 @@ brw_buffer_data(struct gl_context *ctx,
(void) target;
intel_obj->Base.Size = size;
+ intel_obj->Base.BufferRangeSize = size;
intel_obj->Base.Usage = usage;
intel_obj->Base.StorageFlags = storageFlags;