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-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 6eebee16ed4..3aa5c3c6647 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1559,6 +1559,12 @@ fs_generator::enable_debug(const char *shader_name)
static bool
brw_supports_simd16_3src(const struct brw_context *brw)
{
+ /* WaDisableSIMD16On3SrcInstr: 3-source instructions don't work in SIMD16
+ * on a few steppings of Skylake.
+ */
+ if (brw->gen == 9)
+ return brw->revision != 2 && brw->revision != 3 && brw->revision != -1;
+
return brw->is_haswell || brw->gen >= 8;
}