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-rw-r--r--src/mesa/drivers/dri/i965/brw_pipe_control.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index bae4ba7c003..35f326a5c55 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -462,7 +462,7 @@ brw_emit_mi_flush(struct brw_context *brw)
if (brw->batch.ring == BLT_RING && devinfo->gen >= 6) {
BEGIN_BATCH_BLT(4);
- OUT_BATCH(MI_FLUSH_DW);
+ OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 13431a7bd2a..3d7bc92d137 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -104,7 +104,7 @@ set_blitter_tiling(struct brw_context *brw,
assert(brw->screen->devinfo.gen >= 6);
/* Idle the blitter before we update how tiling is interpreted. */
- OUT_BATCH(MI_FLUSH_DW);
+ OUT_BATCH(MI_FLUSH_DW | (4 - 2));
OUT_BATCH(0);
OUT_BATCH(0);
OUT_BATCH(0);