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-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_blit.c157
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_fbo.c1
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_softpipe.c32
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_surface.c1
-rw-r--r--src/mesa/drivers/dri/i915pipe/intel_tex_image.c6
5 files changed, 21 insertions, 176 deletions
diff --git a/src/mesa/drivers/dri/i915pipe/intel_blit.c b/src/mesa/drivers/dri/i915pipe/intel_blit.c
index 5d9cb0cf0f4..8e878f00887 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_blit.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_blit.c
@@ -391,161 +391,4 @@ intelEmitCopyBlit(struct intel_context *intel,
}
-/**
- * Use blitting to clear the renderbuffers named by 'flags'.
- * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferMask field
- * since that might include software renderbuffers or renderbuffers
- * which we're clearing with triangles.
- * \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
- */
-void
-intelClearWithBlit(GLcontext * ctx, GLbitfield mask)
-{
- struct intel_context *intel = intel_context(ctx);
- struct gl_framebuffer *fb = ctx->DrawBuffer;
- GLuint clear_depth;
- GLbitfield skipBuffers = 0;
- BATCH_LOCALS;
-
- DBG("%s %x\n", __FUNCTION__, mask);
- /*
- * Compute values for clearing the buffers.
- */
- clear_depth = 0;
- if (mask & BUFFER_BIT_DEPTH) {
- clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
- }
- if (mask & BUFFER_BIT_STENCIL) {
- clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
- }
-
- /* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
- * the loop below.
- */
- if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
- skipBuffers = BUFFER_BIT_STENCIL;
- }
-
- /* XXX Move this flush/lock into the following conditional? */
- intelFlush(&intel->ctx);
- LOCK_HARDWARE(intel);
-
- if (intel->numClipRects) {
- GLint cx, cy, cw, ch;
- drm_clip_rect_t b;
-
- /* Get clear bounds after locking */
- cx = fb->_Xmin;
- cy = fb->_Ymin;
- cw = fb->_Xmax - cx;
- ch = fb->_Ymax - cy;
-
- if (fb->Name == 0) {
- /* clearing a window */
- /* flip top to bottom */
- b.x1 = cx;
- b.y1 = fb->Height - cy - ch;
- b.x2 = b.x1 + cw;
- b.y2 = b.y1 + ch;
- }
- else {
- /* clearing FBO */
- b.x1 = cx;
- b.y1 = cy;
- b.x2 = b.x1 + cw;
- b.y2 = b.y1 + ch;
- /* no change to mask */
- }
-
- {
- GLuint buf;
- GLuint clearMask = mask; /* use copy, since we modify it below */
- GLboolean all = (cw == fb->Width && ch == fb->Height);
-
- DBG("clear %d,%d..%d,%d, mask %x\n",
- b.x1, b.y1, b.x2, b.y2, mask);
-
- /* Loop over all renderbuffers */
- for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
- const GLbitfield bufBit = 1 << buf;
- if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
- /* OK, clear this renderbuffer */
- struct pipe_region *irb_region =
- intel_get_rb_region(fb, buf);
- struct _DriBufferObject *write_buffer =
- intel->pipe->region_buffer(intel->pipe, irb_region,
- all ? INTEL_WRITE_FULL :
- INTEL_WRITE_PART);
-
- GLuint clearVal;
- GLint pitch, cpp;
- GLuint BR13, CMD;
-
- ASSERT(irb_region);
-
- pitch = irb_region->pitch;
- cpp = irb_region->cpp;
-
- DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
- __FUNCTION__,
- irb_region->buffer, (pitch * cpp),
- irb_region->draw_offset,
- b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1);
-
-
- /* Setup the blit command */
- if (cpp == 4) {
- BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24) | (1 << 25);
- if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
- CMD = XY_COLOR_BLT_CMD;
- if (clearMask & BUFFER_BIT_DEPTH)
- CMD |= XY_COLOR_BLT_WRITE_RGB;
- if (clearMask & BUFFER_BIT_STENCIL)
- CMD |= XY_COLOR_BLT_WRITE_ALPHA;
- }
- else {
- /* clearing RGBA */
- CMD = (XY_COLOR_BLT_CMD |
- XY_COLOR_BLT_WRITE_ALPHA |
- XY_COLOR_BLT_WRITE_RGB);
- }
- }
- else {
- ASSERT(cpp == 2 || cpp == 0);
- BR13 = (0xF0 << 16) | (pitch * cpp) | (1 << 24);
- CMD = XY_COLOR_BLT_CMD;
- }
-
- if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
- clearVal = clear_depth;
- }
- else {
- clearVal = (cpp == 4)
- ? intel->ClearColor8888 : intel->ClearColor565;
- }
- /*
- _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
- buf, irb->Base.Name);
- */
- intel_wait_flips(intel, INTEL_BATCH_NO_CLIPRECTS);
-
- BEGIN_BATCH(6, INTEL_BATCH_NO_CLIPRECTS);
- OUT_BATCH(CMD);
- OUT_BATCH(BR13);
- OUT_BATCH((b.y1 << 16) | b.x1);
- OUT_BATCH((b.y2 << 16) | b.x2);
- OUT_RELOC(write_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
- DRM_BO_MASK_MEM | DRM_BO_FLAG_WRITE,
- irb_region->draw_offset);
- OUT_BATCH(clearVal);
- ADVANCE_BATCH();
- clearMask &= ~bufBit; /* turn off bit, for faster loop exit */
- }
- }
- }
- intel_batchbuffer_flush(intel->batch);
- }
-
- UNLOCK_HARDWARE(intel);
-}
diff --git a/src/mesa/drivers/dri/i915pipe/intel_fbo.c b/src/mesa/drivers/dri/i915pipe/intel_fbo.c
index 9eee5cce457..267c12fd4b7 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_fbo.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_fbo.c
@@ -40,7 +40,6 @@
#include "intel_depthstencil.h"
#include "intel_fbo.h"
#include "intel_mipmap_tree.h"
-#include "intel_regions.h"
#include "intel_tex.h"
#include "pipe/p_context.h"
diff --git a/src/mesa/drivers/dri/i915pipe/intel_softpipe.c b/src/mesa/drivers/dri/i915pipe/intel_softpipe.c
index 4591730a02e..ef477443586 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_softpipe.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_softpipe.c
@@ -54,15 +54,15 @@ struct intel_softpipe_winsys {
* buffer pointer...
*/
static inline struct _DriBufferObject *
-dri_bo( struct softpipe_buffer_handle *bo )
+dri_bo( struct pipe_buffer_handle *bo )
{
return (struct _DriBufferObject *)bo;
}
-static inline struct softpipe_buffer_handle *
+static inline struct pipe_buffer_handle *
pipe_bo( struct _DriBufferObject *bo )
{
- return (struct softpipe_buffer_handle *)bo;
+ return (struct pipe_buffer_handle *)bo;
}
/* Turn a softpipe winsys into an intel/softpipe winsys:
@@ -77,36 +77,39 @@ intel_softpipe_winsys( struct softpipe_winsys *sws )
/* Most callbacks map direcly onto dri_bufmgr operations:
*/
static void *intel_buffer_map(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf )
+ struct pipe_buffer_handle *buf )
{
return driBOMap( dri_bo(buf),
DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE, 0 );
}
static void intel_buffer_unmap(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf)
+ struct pipe_buffer_handle *buf)
{
driBOUnmap( dri_bo(buf) );
}
-static struct softpipe_buffer_handle *
+static struct pipe_buffer_handle *
intel_buffer_reference(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf)
+ struct pipe_buffer_handle *buf)
{
return pipe_bo( driBOReference( dri_bo(buf) ) );
}
static void intel_buffer_unreference(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf)
+ struct pipe_buffer_handle **buf)
{
- driBOUnReference( dri_bo(buf) );
+ if (*buf) {
+ driBOUnReference( dri_bo(*buf) );
+ *buf = NULL;
+ }
}
/* Grabs the hardware lock!
*/
static void intel_buffer_data(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf,
+ struct pipe_buffer_handle *buf,
unsigned size, const void *data )
{
struct intel_context *intel = intel_softpipe_winsys(sws)->intel;
@@ -117,7 +120,7 @@ static void intel_buffer_data(struct softpipe_winsys *sws,
}
static void intel_buffer_subdata(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf,
+ struct pipe_buffer_handle *buf,
unsigned long offset,
unsigned long size,
const void *data)
@@ -126,7 +129,7 @@ static void intel_buffer_subdata(struct softpipe_winsys *sws,
}
static void intel_buffer_get_subdata(struct softpipe_winsys *sws,
- struct softpipe_buffer_handle *buf,
+ struct pipe_buffer_handle *buf,
unsigned long offset,
unsigned long size,
void *data)
@@ -137,9 +140,8 @@ static void intel_buffer_get_subdata(struct softpipe_winsys *sws,
/* Softpipe has no concept of pools. We choose the tex/region pool
* for all buffers.
*/
-static struct softpipe_buffer_handle *
+static struct pipe_buffer_handle *
intel_create_buffer(struct softpipe_winsys *sws,
- const char *name,
unsigned alignment)
{
struct intel_context *intel = intel_softpipe_winsys(sws)->intel;
@@ -147,7 +149,7 @@ intel_create_buffer(struct softpipe_winsys *sws,
LOCK_HARDWARE( intel );
driGenBuffers( intel->intelScreen->regionPool,
- name, 1, &buffer, alignment, 0, 0 );
+ "softpipe buffer", 1, &buffer, alignment, 0, 0 );
UNLOCK_HARDWARE( intel );
return pipe_bo(buffer);
diff --git a/src/mesa/drivers/dri/i915pipe/intel_surface.c b/src/mesa/drivers/dri/i915pipe/intel_surface.c
index 78ed9957945..3fa40271c83 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_surface.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_surface.c
@@ -10,7 +10,6 @@
#include "intel_context.h"
#include "intel_buffers.h"
-#include "intel_regions.h"
#include "intel_fbo.h"
#include "pipe/p_state.h"
diff --git a/src/mesa/drivers/dri/i915pipe/intel_tex_image.c b/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
index b4e440e49a1..9f8e115533c 100644
--- a/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i915pipe/intel_tex_image.c
@@ -225,9 +225,11 @@ try_pbo_upload(struct intel_context *intel,
{
struct _DriBufferObject *src_buffer =
intel_bufferobj_buffer(intel, pbo, INTEL_READ);
+
+ /* Temporary hack: cast to _DriBufferObject:
+ */
struct _DriBufferObject *dst_buffer =
- intel->pipe->region_buffer(intel->pipe, intelImage->mt->region,
- INTEL_WRITE_FULL);
+ (struct _DriBufferObject *)intelImage->mt->region->buffer;
intelEmitCopyBlit(intel,
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 15:47:27 +0000