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-rw-r--r--src/mesa/drivers/dri/r300/r300_context.c24
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.h1
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.h1
5 files changed, 36 insertions, 16 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 5b5c064aca7..c4b5afa23e1 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -241,8 +241,8 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
struct radeon_query_object *query = radeon->query.current;
BATCH_LOCALS(radeon);
- BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->num_z_pipes + 2);
- switch (r300->num_z_pipes) {
+ BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->radeon.radeonScreen->num_gb_pipes + 2);
+ switch (r300->radeon.radeonScreen->num_gb_pipes) {
case 4:
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_3);
OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1);
@@ -268,7 +268,7 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
}
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
END_BATCH();
- query->curr_offset += r300->num_z_pipes * sizeof(uint32_t);
+ query->curr_offset += r300->radeon.radeonScreen->num_gb_pipes * sizeof(uint32_t);
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
@@ -290,10 +290,8 @@ static void rv530_emit_query_finish_single_z(radeonContextPtr radeon)
query->emitted_begin = GL_FALSE;
}
-#if 0
static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
{
- r300ContextPtr r300 = (r300ContextPtr)radeon;
BATCH_LOCALS(radeon);
struct radeon_query_object *query = radeon->query.current;
@@ -311,7 +309,6 @@ static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
-#endif
static void r300_init_vtbl(radeonContextPtr radeon)
{
@@ -321,11 +318,12 @@ static void r300_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.swtcl_flush = r300_swtcl_flush;
radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms;
radeon->vtbl.fallback = r300_fallback;
- if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530)
- /* single Z gives me correct results on my hw need to check if we ever need
- * double z */
- radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
- else
+ if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530) {
+ if (radeon->radeonScreen->num_z_pipes == 2)
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_double_z;
+ else
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
+ } else
radeon->vtbl.emit_query_finish = r300_emit_query_finish;
}
@@ -399,10 +397,6 @@ static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
}
- if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530)
- r300->num_z_pipes = 2;
- else
- r300->num_z_pipes = r300->radeon.radeonScreen->num_gb_pipes;
}
static void r300ParseOptions(r300ContextPtr r300, radeonScreenPtr screen)
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 339b3045586..a8fe508c4a5 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -529,7 +529,6 @@ struct r300_context {
uint32_t fallback;
DECLARE_RENDERINPUTS(render_inputs_bitset);
- int num_z_pipes;
};
#define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx))
diff --git a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
index a42870f4a93..4520a7d7d49 100644
--- a/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
+++ b/src/mesa/drivers/dri/radeon/radeon_bocs_wrapper.h
@@ -45,6 +45,10 @@ struct drm_radeon_info {
#define RADEON_PARAM_DEVICE_ID 16
#endif
+#ifndef RADEON_PARAM_NUM_Z_PIPES
+#define RADEON_PARAM_NUM_Z_PIPES 17
+#endif
+
#ifndef RADEON_INFO_DEVICE_ID
#define RADEON_INFO_DEVICE_ID 0
#endif
@@ -52,6 +56,10 @@ struct drm_radeon_info {
#define RADEON_INFO_NUM_GB_PIPES 0
#endif
+#ifndef RADEON_INFO_NUM_Z_PIPES
+#define RADEON_INFO_NUM_Z_PIPES 0
+#endif
+
#ifndef DRM_RADEON_INFO
#define DRM_RADEON_INFO 0x1
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 10afe527d3d..bdcfd10c06e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -267,6 +267,9 @@ radeonGetParam(__DRIscreenPrivate *sPriv, int param, void *value)
case RADEON_PARAM_NUM_GB_PIPES:
info.request = RADEON_INFO_NUM_GB_PIPES;
break;
+ case RADEON_PARAM_NUM_Z_PIPES:
+ info.request = RADEON_INFO_NUM_Z_PIPES;
+ break;
default:
return -EINVAL;
}
@@ -1171,6 +1174,15 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
default:
break;
}
+
+ if ( sPriv->drm_version.minor >= 31 ) {
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+ } else
+ screen->num_z_pipes = 2;
}
if ( sPriv->drm_version.minor >= 10 ) {
@@ -1372,6 +1384,12 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
break;
}
+ ret = radeonGetParam(sPriv, RADEON_PARAM_NUM_Z_PIPES, &temp);
+ if (ret)
+ screen->num_z_pipes = 2;
+ else
+ screen->num_z_pipes = temp;
+
}
i = 0;
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index f0dd46b0b13..15744e88284 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -108,6 +108,7 @@ typedef struct radeon_screen {
const __DRIextension *extensions[16];
int num_gb_pipes;
+ int num_z_pipes;
int kernel_mm;
drm_radeon_sarea_t *sarea; /* Private SAREA data */
struct radeon_bo_manager *bom;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-20 17:19:10 +0000