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-rw-r--r--src/mesa/drivers/common/meta.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs_surface_state.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_gs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_surface_state.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_sol.c6
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_vs_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c2
14 files changed, 22 insertions, 22 deletions
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 76cbb41a9d0..0abdfb2cada 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -537,10 +537,10 @@ _mesa_meta_begin(struct gl_context *ctx, GLbitfield state)
for (i = 0; i < MESA_SHADER_STAGES; i++) {
_mesa_reference_shader_program(ctx, &save->Shader[i],
- ctx->Shader.CurrentProgram[i]);
+ ctx->_Shader->CurrentProgram[i]);
}
_mesa_reference_shader_program(ctx, &save->ActiveShader,
- ctx->Shader.ActiveProgram);
+ ctx->_Shader->ActiveProgram);
_mesa_UseProgram(0);
}
@@ -893,7 +893,7 @@ _mesa_meta_end(struct gl_context *ctx)
_mesa_use_shader_program(ctx, GL_FRAGMENT_SHADER,
save->Shader[MESA_SHADER_FRAGMENT]);
- _mesa_reference_shader_program(ctx, &ctx->Shader.ActiveProgram,
+ _mesa_reference_shader_program(ctx, &ctx->_Shader->ActiveProgram,
save->ActiveShader);
for (i = 0; i < MESA_SHADER_STAGES; i++)
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index bd5bf14cde1..ddfb296f2c1 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -187,7 +187,7 @@ static void populate_key(struct brw_context *brw,
/* BRW_NEW_TRANSFORM_FEEDBACK */
if (_mesa_is_xfb_active_and_unpaused(ctx)) {
const struct gl_shader_program *shaderprog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
const struct gl_transform_feedback_info *linked_xfb_info =
&shaderprog->LinkedTransformFeedback;
int i;
diff --git a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
index 0795e56580e..26a3fa89e39 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_surface_state.c
@@ -70,7 +70,7 @@ brw_upload_gs_ubo_surfaces(struct brw_context *brw)
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
- ctx->Shader.CurrentProgram[MESA_SHADER_GEOMETRY];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
if (!prog)
return;
@@ -95,7 +95,7 @@ brw_upload_gs_abo_surfaces(struct brw_context *brw)
struct gl_context *ctx = &brw->ctx;
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
- ctx->Shader.CurrentProgram[MESA_SHADER_GEOMETRY];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY];
if (prog) {
/* CACHE_NEW_GS_PROG */
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 407319b4d8d..bbc5f3def3d 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -248,7 +248,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
_mesa_reference_program(ctx, &prog, NULL);
- if (ctx->Shader.Flags & GLSL_DUMP) {
+ if (ctx->_Shader->Flags & GLSL_DUMP) {
fprintf(stderr, "\n");
fprintf(stderr, "GLSL IR for linked %s program %d:\n",
_mesa_shader_stage_to_string(shader->base.Stage),
@@ -258,7 +258,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
}
}
- if ((ctx->Shader.Flags & GLSL_DUMP) && shProg->Name != 0) {
+ if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
for (unsigned i = 0; i < shProg->NumShaders; i++) {
const struct gl_shader *sh = shProg->Shaders[i];
if (!sh)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs.c b/src/mesa/drivers/dri/i965/brw_vec4_gs.c
index 8a9625b52af..b48c420a9fb 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs.c
@@ -306,7 +306,7 @@ brw_upload_gs_prog(struct brw_context *brw)
&key, sizeof(key),
&stage_state->prog_offset, &brw->gs.prog_data)) {
bool success =
- do_gs_prog(brw, ctx->Shader.CurrentProgram[MESA_SHADER_GEOMETRY], gp,
+ do_gs_prog(brw, ctx->_Shader->CurrentProgram[MESA_SHADER_GEOMETRY], gp,
&key);
assert(success);
}
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index d98f1950726..e0f32b3333f 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -147,7 +147,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
*/
gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
{
- if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX]) {
+ if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) {
/* There is currently a GLSL vertex shader, so clip according to GLSL
* rules, which means compare gl_ClipVertex (or gl_Position, if
* gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
@@ -484,7 +484,7 @@ static void brw_upload_vs_prog(struct brw_context *brw)
&key, sizeof(key),
&brw->vs.base.prog_offset, &brw->vs.prog_data)) {
bool success =
- do_vs_prog(brw, ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX], vp,
+ do_vs_prog(brw, ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX], vp,
&key);
(void) success;
assert(success);
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 8f611242fc9..bd97a22f63c 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -131,7 +131,7 @@ brw_upload_vs_ubo_surfaces(struct brw_context *brw)
struct gl_context *ctx = &brw->ctx;
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
if (!prog)
return;
@@ -156,7 +156,7 @@ brw_upload_vs_abo_surfaces(struct brw_context *brw)
struct gl_context *ctx = &brw->ctx;
/* _NEW_PROGRAM */
struct gl_shader_program *prog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
if (prog) {
/* CACHE_NEW_VS_PROG */
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 0d0d6ec82ff..b97501c5d19 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -579,7 +579,7 @@ brw_upload_wm_prog(struct brw_context *brw)
if (!brw_search_cache(&brw->cache, BRW_WM_PROG,
&key, sizeof(key),
&brw->wm.base.prog_offset, &brw->wm.prog_data)) {
- bool success = do_wm_prog(brw, ctx->Shader._CurrentFragmentProgram, fp,
+ bool success = do_wm_prog(brw, ctx->_Shader->_CurrentFragmentProgram, fp,
&key);
(void) success;
assert(success);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index a0bb4bafaa3..61f7ba5daf7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -881,7 +881,7 @@ brw_upload_wm_ubo_surfaces(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* _NEW_PROGRAM */
- struct gl_shader_program *prog = ctx->Shader._CurrentFragmentProgram;
+ struct gl_shader_program *prog = ctx->_Shader->_CurrentFragmentProgram;
if (!prog)
return;
diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c
index 0047c8aa76e..e1c1b3cb060 100644
--- a/src/mesa/drivers/dri/i965/gen6_sol.c
+++ b/src/mesa/drivers/dri/i965/gen6_sol.c
@@ -43,7 +43,7 @@ gen6_update_sol_surfaces(struct brw_context *brw)
ctx->TransformFeedback.CurrentObject;
/* BRW_NEW_VERTEX_PROGRAM */
const struct gl_shader_program *shaderprog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
const struct gl_transform_feedback_info *linked_xfb_info =
&shaderprog->LinkedTransformFeedback;
int i;
@@ -89,7 +89,7 @@ brw_gs_upload_binding_table(struct brw_context *brw)
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_VERTEX_PROGRAM */
const struct gl_shader_program *shaderprog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
bool has_surfaces = false;
uint32_t *bind;
@@ -175,7 +175,7 @@ brw_begin_transform_feedback(struct gl_context *ctx, GLenum mode,
{
struct brw_context *brw = brw_context(ctx);
const struct gl_shader_program *vs_prog =
- ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX];
+ ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX];
const struct gl_transform_feedback_info *linked_xfb_info =
&vs_prog->LinkedTransformFeedback;
struct gl_transform_feedback_object *xfb_obj =
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index 5e9bb660d54..0af87d1f4df 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -158,7 +158,7 @@ upload_vs_state(struct brw_context *brw)
/* Use ALT floating point mode for ARB vertex programs, because they
* require 0^0 == 1.
*/
- if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
+ if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] == NULL)
floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
BEGIN_BATCH(6);
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index e7c955589ff..22e0925091e 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -140,7 +140,7 @@ upload_wm_state(struct brw_context *brw)
* rendering, CurrentProgram[MESA_SHADER_FRAGMENT] is used for this check
* to differentiate between the GLSL and non-GLSL cases.
*/
- if (ctx->Shader.CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
+ if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
/* CACHE_NEW_SAMPLER */
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index 0d9859bec59..b5fc871cfe1 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -87,7 +87,7 @@ upload_vs_state(struct brw_context *brw)
/* Use ALT floating point mode for ARB vertex programs, because they
* require 0^0 == 1.
*/
- if (ctx->Shader.CurrentProgram[MESA_SHADER_VERTEX] == NULL)
+ if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX] == NULL)
floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
BEGIN_BATCH(6);
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index ca3e2753935..71535a53fa1 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -168,7 +168,7 @@ upload_ps_state(struct brw_context *brw)
* to differentiate between the GLSL and non-GLSL cases.
*/
/* BRW_NEW_FRAGMENT_PROGRAM */
- if (ctx->Shader.CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
+ if (ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT] == NULL)
dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT;
/* Haswell requires the sample mask to be set in this packet as well as