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-rw-r--r--src/mesa/drivers/common/meta.c6
-rw-r--r--src/mesa/drivers/dri/common/dri_util.c2
-rw-r--r--src/mesa/drivers/dri/i810/i810tris.c3
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c18
-rw-r--r--src/mesa/drivers/dri/i965/brw_cc.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c14
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c11
-rw-r--r--src/mesa/drivers/dri/mach64/mach64_tris.c3
-rw-r--r--src/mesa/drivers/dri/mga/mgatris.c3
-rw-r--r--src/mesa/drivers/dri/r128/r128_tris.c3
-rw-r--r--src/mesa/drivers/dri/r300/r300_texstate.c6
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c5
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c14
-rw-r--r--src/mesa/drivers/dri/savage/savageioctl.c2
-rw-r--r--src/mesa/drivers/dri/savage/savagetris.c3
-rw-r--r--src/mesa/drivers/dri/sis/sis_clear.c1
-rw-r--r--src/mesa/drivers/dri/sis/sis_tris.c3
-rw-r--r--src/mesa/drivers/dri/unichrome/via_ioctl.c1
-rw-r--r--src/mesa/drivers/dri/unichrome/via_tris.c3
21 files changed, 77 insertions, 34 deletions
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 39b0ab13c6b..cd9075b3936 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -2170,6 +2170,9 @@ _mesa_meta_GenerateMipmap(GLcontext *ctx, GLenum target,
_mesa_meta_begin(ctx, META_ALL);
+ if (original_active_unit != 0)
+ _mesa_BindTexture(target, texObj->Name);
+
if (mipmap->ArrayObj == 0) {
/* one-time setup */
@@ -2289,9 +2292,6 @@ _mesa_meta_GenerateMipmap(GLcontext *ctx, GLenum target,
/* texture is already locked, unlock now */
_mesa_unlock_texture(ctx, texObj);
- if (original_active_unit != 0)
- _mesa_BindTexture(target, texObj->Name);
-
for (dstLevel = baseLevel + 1; dstLevel <= maxLevel; dstLevel++) {
const struct gl_texture_image *srcImage;
const GLuint srcLevel = dstLevel - 1;
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c
index da81ec9de51..547f18a009e 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -167,7 +167,7 @@ static int driBindContext(__DRIcontext *pcp,
__DRIdrawable *pdp,
__DRIdrawable *prp)
{
- __DRIscreenPrivate *psp;
+ __DRIscreenPrivate *psp = NULL;
/* Bind the drawable to the context */
diff --git a/src/mesa/drivers/dri/i810/i810tris.c b/src/mesa/drivers/dri/i810/i810tris.c
index b508496fb69..213ba541cee 100644
--- a/src/mesa/drivers/dri/i810/i810tris.c
+++ b/src/mesa/drivers/dri/i810/i810tris.c
@@ -270,7 +270,8 @@ do { \
#define LOCAL_VARS(n) \
i810ContextPtr imesa = I810_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint coloroffset = (imesa->vertex_size == 4 ? 3 : 4); \
GLboolean havespec = (imesa->vertex_size > 4); \
(void) color; (void) spec; (void) coloroffset; (void) havespec;
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 2b03331a004..221bf033327 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -139,6 +139,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
GLuint *state = i915->state.Tex[unit], format, pitch;
GLint lodbias, aniso = 0;
GLubyte border[4];
+ GLfloat maxlod;
memset(state, 0, sizeof(state));
@@ -176,18 +177,9 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
pitch = intelObj->pitchOverride;
} else {
- GLuint dst_x, dst_y;
-
- intel_miptree_get_image_offset(intelObj->mt, intelObj->firstLevel, 0, 0,
- &dst_x, &dst_y);
-
dri_bo_reference(intelObj->mt->region->buffer);
i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
- /* XXX: This calculation is probably broken for tiled images with
- * a non-page-aligned offset.
- */
- i915->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
- intelObj->mt->cpp;
+ i915->state.tex_offset[unit] = 0; /* Always the origin of the miptree */
format = translate_texture_format(firstImage->TexFormat,
firstImage->InternalFormat,
@@ -205,10 +197,14 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
state[I915_TEXREG_MS3] |= MS3_TILE_WALK;
}
+ /* We get one field with fraction bits to cover the maximum addressable (smallest
+ * resolution) LOD. Use it to cover both MAX_LEVEL and MAX_LOD.
+ */
+ maxlod = MIN2(tObj->MaxLod, tObj->MaxLevel - tObj->BaseLevel);
state[I915_TEXREG_MS4] =
((((pitch / 4) - 1) << MS4_PITCH_SHIFT) |
MS4_CUBE_FACE_ENA_MASK |
- (U_FIXED(CLAMP(tObj->MaxLod, 0.0, 11.0), 2) << MS4_MAX_LOD_SHIFT) |
+ (U_FIXED(CLAMP(maxlod, 0.0, 11.0), 2) << MS4_MAX_LOD_SHIFT) |
((firstImage->Depth - 1) << MS4_VOLUME_DEPTH_SHIFT));
diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c
index ab301b9a3a0..bac1c3a49c3 100644
--- a/src/mesa/drivers/dri/i965/brw_cc.c
+++ b/src/mesa/drivers/dri/i965/brw_cc.c
@@ -158,9 +158,9 @@ cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
/* If the renderbuffer is XRGB, we have to frob the blend function to
* force the destination alpha to 1.0. This means replacing GL_DST_ALPHA
- * with GL_ONE and GL_ONE_MINUS_DST_ALPAH with GL_ZERO.
+ * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
*/
- if (ctx->Visual.alphaBits == 0) {
+ if (ctx->DrawBuffer->Visual.alphaBits == 0) {
key->blend_src_rgb = fix_xRGB_alpha(key->blend_src_rgb);
key->blend_src_a = fix_xRGB_alpha(key->blend_src_a);
key->blend_dst_rgb = fix_xRGB_alpha(key->blend_dst_rgb);
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 00efd3443d1..27aac8b54a9 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -392,6 +392,17 @@ static void emit_sge( struct brw_vs_compile *c,
emit_sop(c, dst, arg0, arg1, BRW_CONDITIONAL_GE);
}
+static void emit_cmp( struct brw_compile *p,
+ struct brw_reg dst,
+ struct brw_reg arg0,
+ struct brw_reg arg1,
+ struct brw_reg arg2 )
+{
+ brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0, brw_imm_f(0));
+ brw_SEL(p, dst, arg1, arg2);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+}
+
static void emit_max( struct brw_compile *p,
struct brw_reg dst,
struct brw_reg arg0,
@@ -1485,6 +1496,9 @@ void brw_vs_emit(struct brw_vs_compile *c )
brw_MOV(p, brw_acc_reg(), args[2]);
brw_MAC(p, dst, args[0], args[1]);
break;
+ case OPCODE_CMP:
+ emit_cmp(p, dst, args[0], args[1], args[2]);
+ break;
case OPCODE_MAX:
emit_max(p, dst, args[0], args[1]);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 3f9b1fbfdc6..8335e5a650e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -581,7 +581,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
/* As mentioned above, disable writes to the alpha component when the
* renderbuffer is XRGB.
*/
- if (ctx->Visual.alphaBits == 0)
+ if (ctx->DrawBuffer->Visual.alphaBits == 0)
key.color_mask[3] = GL_FALSE;
key.color_blend = (!ctx->Color._LogicOpEnabled &&
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index 6b12d484d85..05643189a21 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -191,10 +191,15 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
return;
}
- /*
- * How many color buffers are we drawing into?
+ /* How many color buffers are we drawing into?
+ *
+ * If there are zero buffers or the buffer is too big, don't configure any
+ * regions for hardware drawing. We'll fallback to software below. Not
+ * having regions set makes some of the software fallback paths faster.
*/
- if (fb->_NumColorDrawBuffers == 0) {
+ if ((fb->Width > ctx->Const.MaxRenderbufferSize)
+ || (fb->Height > ctx->Const.MaxRenderbufferSize)
+ || (fb->_NumColorDrawBuffers == 0)) {
/* writing to 0 */
colorRegions[0] = NULL;
intel->constant_cliprect = GL_TRUE;
diff --git a/src/mesa/drivers/dri/mach64/mach64_tris.c b/src/mesa/drivers/dri/mach64/mach64_tris.c
index f2e8e2e3ae8..c2a0adfef02 100644
--- a/src/mesa/drivers/dri/mach64/mach64_tris.c
+++ b/src/mesa/drivers/dri/mach64/mach64_tris.c
@@ -1297,7 +1297,8 @@ do { \
#define LOCAL_VARS(n) \
mach64ContextPtr mmesa = MACH64_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint vertex_size = mmesa->vertex_size; \
const GLuint xyoffset = 9; \
const GLuint coloroffset = 8; \
diff --git a/src/mesa/drivers/dri/mga/mgatris.c b/src/mesa/drivers/dri/mga/mgatris.c
index b93a21c3acf..c1bcd4b8531 100644
--- a/src/mesa/drivers/dri/mga/mgatris.c
+++ b/src/mesa/drivers/dri/mga/mgatris.c
@@ -397,7 +397,8 @@ do { \
#define LOCAL_VARS(n) \
mgaContextPtr mmesa = MGA_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
(void) color; (void) spec;
diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c
index 448e34e047c..86d4717b050 100644
--- a/src/mesa/drivers/dri/r128/r128_tris.c
+++ b/src/mesa/drivers/dri/r128/r128_tris.c
@@ -216,7 +216,8 @@ do { \
#define LOCAL_VARS(n) \
r128ContextPtr rmesa = R128_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint coloroffset = rmesa->coloroffset; \
GLuint specoffset = rmesa->specoffset; \
GLboolean havespec = (rmesa->specoffset != 0); \
diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c
index d4a728381e4..eea3dee7bc6 100644
--- a/src/mesa/drivers/dri/r300/r300_texstate.c
+++ b/src/mesa/drivers/dri/r300/r300_texstate.c
@@ -181,9 +181,9 @@ void r300SetDepthTexMode(struct gl_texture_object *tObj)
R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X16),
},
{
- R300_EASY_TX_FORMAT(X, X, X, ONE, X24_Y8),
- R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8),
- R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X24_Y8),
+ R300_EASY_TX_FORMAT(Y, Y, Y, ONE, X24_Y8),
+ R300_EASY_TX_FORMAT(Y, Y, Y, Y, X24_Y8),
+ R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, Y, X24_Y8),
},
{
R300_EASY_TX_FORMAT(X, X, X, ONE, X32),
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 7b1fa732246..16b05d5cd9a 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -705,6 +705,10 @@ static void r700UpdateCulling(GLcontext * ctx)
CLEARbit(r700->PA_SU_SC_MODE_CNTL.u32All, FACE_bit); /* default: ccw */
break;
}
+
+ /* Winding is inverted when rendering to FBO */
+ if (ctx->DrawBuffer && ctx->DrawBuffer->Name)
+ r700->PA_SU_SC_MODE_CNTL.u32All ^= FACE_bit;
}
static void r700UpdateLineStipple(GLcontext * ctx)
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index a7f347202a1..033f26db2a1 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -452,7 +452,10 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_bo_unmap(image->mt->bo);
radeon_miptree_unreference(&image->mt);
- } else {
+ } else if (image->base.Data) {
+ /* This condition should be removed, it's here to workaround
+ * a segfault when mapping textures during software fallbacks.
+ */
const uint32_t srcrowstride = _mesa_format_row_stride(image->base.TexFormat, image->base.Width);
uint32_t rows = image->base.Height * image->base.Depth;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index 28690325d12..03178116c1a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -472,6 +472,19 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx,
case GL_RGBA32F_ARB:
return MESA_FORMAT_RGBA_FLOAT32;
+#ifdef RADEON_R300
+ case GL_DEPTH_COMPONENT:
+ case GL_DEPTH_COMPONENT16:
+ return MESA_FORMAT_Z16;
+ case GL_DEPTH_COMPONENT24:
+ case GL_DEPTH_COMPONENT32:
+ case GL_DEPTH_STENCIL_EXT:
+ case GL_DEPTH24_STENCIL8_EXT:
+ if (rmesa->radeonScreen->chip_family >= CHIP_FAMILY_RV515)
+ return MESA_FORMAT_S8_Z24;
+ else
+ return MESA_FORMAT_Z16;
+#else
case GL_DEPTH_COMPONENT:
case GL_DEPTH_COMPONENT16:
case GL_DEPTH_COMPONENT24:
@@ -479,6 +492,7 @@ gl_format radeonChooseTextureFormat(GLcontext * ctx,
case GL_DEPTH_STENCIL_EXT:
case GL_DEPTH24_STENCIL8_EXT:
return MESA_FORMAT_S8_Z24;
+#endif
/* EXT_texture_sRGB */
case GL_SRGB:
diff --git a/src/mesa/drivers/dri/savage/savageioctl.c b/src/mesa/drivers/dri/savage/savageioctl.c
index 948ed18419e..77ab8d16e0a 100644
--- a/src/mesa/drivers/dri/savage/savageioctl.c
+++ b/src/mesa/drivers/dri/savage/savageioctl.c
@@ -337,6 +337,8 @@ static void savageDDClear( GLcontext *ctx, GLbitfield mask )
GLint ch = ctx->DrawBuffer->_Ymax - cy;
/* XXX FIX ME: the cx,cy,cw,ch vars are currently ignored! */
+ (void) ch;
+ (void) cw;
if (SAVAGE_DEBUG & DEBUG_VERBOSE_MSG)
fprintf (stderr, "%s\n", __FUNCTION__);
diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c
index e9529d19391..9a92541ef7e 100644
--- a/src/mesa/drivers/dri/savage/savagetris.c
+++ b/src/mesa/drivers/dri/savage/savagetris.c
@@ -435,7 +435,8 @@ do { \
#define LOCAL_VARS(n) \
savageContextPtr imesa = SAVAGE_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint coloroffset = \
((imesa->skip & SAVAGE_SKIP_W) ? 3 : 4); \
GLboolean specoffset = \
diff --git a/src/mesa/drivers/dri/sis/sis_clear.c b/src/mesa/drivers/dri/sis/sis_clear.c
index 323383da62a..d358ef62dc7 100644
--- a/src/mesa/drivers/dri/sis/sis_clear.c
+++ b/src/mesa/drivers/dri/sis/sis_clear.c
@@ -393,7 +393,6 @@ sis_clear_z_stencil_buffer( GLcontext * ctx, GLbitfield mask,
GLint x, GLint y, GLint width, GLint height )
{
sisContextPtr smesa = SIS_CONTEXT(ctx);
- int cmd;
mWait3DCmdQueue (8);
MMIO(REG_SRC_PITCH, (smesa->zFormat == SiS_ZFORMAT_Z16) ?
diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c
index 3cf10007b58..4690274c3c0 100644
--- a/src/mesa/drivers/dri/sis/sis_tris.c
+++ b/src/mesa/drivers/dri/sis/sis_tris.c
@@ -430,7 +430,8 @@ do { \
#define LOCAL_VARS(n) \
sisContextPtr smesa = SIS_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint coloroffset = smesa->coloroffset; \
GLuint specoffset = smesa->specoffset; \
(void) color; (void) spec; (void) coloroffset; (void) specoffset;
diff --git a/src/mesa/drivers/dri/unichrome/via_ioctl.c b/src/mesa/drivers/dri/unichrome/via_ioctl.c
index b34c133600a..91c94fa377d 100644
--- a/src/mesa/drivers/dri/unichrome/via_ioctl.c
+++ b/src/mesa/drivers/dri/unichrome/via_ioctl.c
@@ -885,7 +885,6 @@ void viaFlushDmaLocked(struct via_context *vmesa, GLuint flags)
}
else if (vmesa->numClipRects) {
drm_clip_rect_t *pbox = vmesa->pClipRects;
- __DRIdrawablePrivate *dPriv = vmesa->driDrawable;
for (i = 0; i < vmesa->numClipRects; i++) {
drm_clip_rect_t b;
diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c
index ab457d41dc8..01359d51ea6 100644
--- a/src/mesa/drivers/dri/unichrome/via_tris.c
+++ b/src/mesa/drivers/dri/unichrome/via_tris.c
@@ -330,7 +330,8 @@ do { \
#define LOCAL_VARS(n) \
struct via_context *vmesa = VIA_CONTEXT(ctx); \
- GLuint color[n], spec[n]; \
+ GLuint color[n] = { 0 }; \
+ GLuint spec[n] = { 0 }; \
GLuint coloroffset = vmesa->coloroffset; \
GLuint specoffset = vmesa->specoffset; \
(void)color; (void)spec; (void)coloroffset; (void)specoffset;