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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h9
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_multisample_state.c103
-rw-r--r--src/mesa/drivers/dri/i965/gen8_multisample_state.c18
-rw-r--r--src/mesa/drivers/dri/i965/genX_state_upload.c100
5 files changed, 96 insertions, 136 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 5e627aeebc5..df7b6ebb1de 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1579,15 +1579,6 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
int dstX0, int dstY0,
int width, int height);
-/* gen6_multisample_state.c */
-unsigned
-gen6_determine_sample_mask(struct brw_context *brw);
-
-void
-gen6_emit_3dstate_multisample(struct brw_context *brw,
- unsigned num_samples);
-void
-gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask);
void
gen6_get_sample_position(struct gl_context *ctx,
struct gl_framebuffer *fb,
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index acb7334109e..2b5b1c4cbd9 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -109,7 +109,6 @@ extern const struct brw_tracked_state gen7_cs_push_constants;
extern const struct brw_tracked_state gen6_binding_table_pointers;
extern const struct brw_tracked_state gen6_color_calc_state;
extern const struct brw_tracked_state gen6_gs_binding_table;
-extern const struct brw_tracked_state gen6_multisample_state;
extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
extern const struct brw_tracked_state gen6_sampler_state;
extern const struct brw_tracked_state gen6_sol_surface;
@@ -122,7 +121,6 @@ extern const struct brw_tracked_state gen7_push_constant_space;
extern const struct brw_tracked_state gen7_urb;
extern const struct brw_tracked_state haswell_cut_index;
extern const struct brw_tracked_state gen8_index_buffer;
-extern const struct brw_tracked_state gen8_multisample_state;
extern const struct brw_tracked_state gen8_pma_fix;
extern const struct brw_tracked_state gen8_vf_topology;
extern const struct brw_tracked_state brw_cs_work_groups_surface;
diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
index a59ffec0398..bfa84fb9b77 100644
--- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
@@ -118,106 +118,3 @@ gen6_set_sample_maps(struct gl_context *ctx)
memcpy(ctx->Const.SampleMap8x, map_8x, sizeof(map_8x));
memcpy(ctx->Const.SampleMap16x, map_16x, sizeof(map_16x));
}
-
-/**
- * 3DSTATE_MULTISAMPLE
- */
-void
-gen6_emit_3dstate_multisample(struct brw_context *brw,
- unsigned num_samples)
-{
- uint32_t number_of_multisamples = 0;
- uint32_t sample_positions_3210 = 0;
- uint32_t sample_positions_7654 = 0;
-
- assert(brw->gen < 8);
-
- switch (num_samples) {
- case 0:
- case 1:
- number_of_multisamples = MS_NUMSAMPLES_1;
- break;
- case 4:
- number_of_multisamples = MS_NUMSAMPLES_4;
- sample_positions_3210 = brw_multisample_positions_4x;
- break;
- case 8:
- number_of_multisamples = MS_NUMSAMPLES_8;
- sample_positions_3210 = brw_multisample_positions_8x[0];
- sample_positions_7654 = brw_multisample_positions_8x[1];
- break;
- default:
- unreachable("Unrecognized num_samples in gen6_emit_3dstate_multisample");
- }
-
- int len = brw->gen >= 7 ? 4 : 3;
- BEGIN_BATCH(len);
- OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
- OUT_BATCH(MS_PIXEL_LOCATION_CENTER | number_of_multisamples);
- OUT_BATCH(sample_positions_3210);
- if (brw->gen >= 7)
- OUT_BATCH(sample_positions_7654);
- ADVANCE_BATCH();
-}
-
-unsigned
-gen6_determine_sample_mask(struct brw_context *brw)
-{
- struct gl_context *ctx = &brw->ctx;
- float coverage = 1.0f;
- float coverage_invert = false;
- unsigned sample_mask = ~0u;
-
- /* BRW_NEW_NUM_SAMPLES */
- unsigned num_samples = brw->num_samples;
-
- if (_mesa_is_multisample_enabled(ctx)) {
- if (ctx->Multisample.SampleCoverage) {
- coverage = ctx->Multisample.SampleCoverageValue;
- coverage_invert = ctx->Multisample.SampleCoverageInvert;
- }
- if (ctx->Multisample.SampleMask) {
- sample_mask = ctx->Multisample.SampleMaskValue;
- }
- }
-
- if (num_samples > 1) {
- int coverage_int = (int) (num_samples * coverage + 0.5f);
- uint32_t coverage_bits = (1 << coverage_int) - 1;
- if (coverage_invert)
- coverage_bits ^= (1 << num_samples) - 1;
- return coverage_bits & sample_mask;
- } else {
- return 1;
- }
-}
-
-/**
- * 3DSTATE_SAMPLE_MASK
- */
-void
-gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask)
-{
- BEGIN_BATCH(2);
- OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
- OUT_BATCH(mask);
- ADVANCE_BATCH();
-}
-
-static void
-upload_multisample_state(struct brw_context *brw)
-{
- /* BRW_NEW_NUM_SAMPLES */
- gen6_emit_3dstate_multisample(brw, brw->num_samples);
- gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw));
-}
-
-const struct brw_tracked_state gen6_multisample_state = {
- .dirty = {
- .mesa = _NEW_MULTISAMPLE,
- .brw = BRW_NEW_BLORP |
- BRW_NEW_CONTEXT |
- BRW_NEW_NUM_SAMPLES,
- },
- .emit = upload_multisample_state
-};
diff --git a/src/mesa/drivers/dri/i965/gen8_multisample_state.c b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
index e36d037d471..7a31a5df4a2 100644
--- a/src/mesa/drivers/dri/i965/gen8_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_multisample_state.c
@@ -69,21 +69,3 @@ gen8_emit_3dstate_sample_pattern(struct brw_context *brw)
OUT_BATCH(brw_multisample_positions_1x_2x);
ADVANCE_BATCH();
}
-
-
-static void
-upload_multisample_state(struct brw_context *brw)
-{
- gen8_emit_3dstate_multisample(brw, brw->num_samples);
- gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw));
-}
-
-const struct brw_tracked_state gen8_multisample_state = {
- .dirty = {
- .mesa = _NEW_MULTISAMPLE,
- .brw = BRW_NEW_BLORP |
- BRW_NEW_CONTEXT |
- BRW_NEW_NUM_SAMPLES,
- },
- .emit = upload_multisample_state
-};
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index bc7cbcc63e7..08cc7f1706f 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -24,6 +24,7 @@
#include <assert.h>
#include "common/gen_device_info.h"
+#include "common/gen_sample_positions.h"
#include "genxml/gen_macros.h"
#include "main/bufferobj.h"
@@ -36,6 +37,7 @@
#include "brw_defines.h"
#endif
#include "brw_draw.h"
+#include "brw_multisample_state.h"
#include "brw_state.h"
#include "brw_wm.h"
#include "brw_util.h"
@@ -2452,6 +2454,96 @@ static const struct brw_tracked_state genX(wm_push_constants) = {
.emit = genX(upload_wm_push_constants),
};
+/* ---------------------------------------------------------------------- */
+
+static unsigned
+genX(determine_sample_mask)(struct brw_context *brw)
+{
+ struct gl_context *ctx = &brw->ctx;
+ float coverage = 1.0f;
+ float coverage_invert = false;
+ unsigned sample_mask = ~0u;
+
+ /* BRW_NEW_NUM_SAMPLES */
+ unsigned num_samples = brw->num_samples;
+
+ if (_mesa_is_multisample_enabled(ctx)) {
+ if (ctx->Multisample.SampleCoverage) {
+ coverage = ctx->Multisample.SampleCoverageValue;
+ coverage_invert = ctx->Multisample.SampleCoverageInvert;
+ }
+ if (ctx->Multisample.SampleMask) {
+ sample_mask = ctx->Multisample.SampleMaskValue;
+ }
+ }
+
+ if (num_samples > 1) {
+ int coverage_int = (int) (num_samples * coverage + 0.5f);
+ uint32_t coverage_bits = (1 << coverage_int) - 1;
+ if (coverage_invert)
+ coverage_bits ^= (1 << num_samples) - 1;
+ return coverage_bits & sample_mask;
+ } else {
+ return 1;
+ }
+}
+
+/* ---------------------------------------------------------------------- */
+
+static void
+genX(emit_3dstate_multisample2)(struct brw_context *brw,
+ unsigned num_samples)
+{
+ assert(brw->num_samples <= 16);
+
+ unsigned log2_samples = ffs(MAX2(num_samples, 1)) - 1;
+
+ brw_batch_emit(brw, GENX(3DSTATE_MULTISAMPLE), multi) {
+ multi.PixelLocation = CENTER;
+ multi.NumberofMultisamples = log2_samples;
+#if GEN_GEN == 6
+ GEN_SAMPLE_POS_4X(multi.Sample);
+#elif GEN_GEN == 7
+ switch (num_samples) {
+ case 1:
+ GEN_SAMPLE_POS_1X(multi.Sample);
+ break;
+ case 2:
+ GEN_SAMPLE_POS_2X(multi.Sample);
+ break;
+ case 4:
+ GEN_SAMPLE_POS_4X(multi.Sample);
+ break;
+ case 8:
+ GEN_SAMPLE_POS_8X(multi.Sample);
+ break;
+ default:
+ break;
+ }
+#endif
+ }
+}
+
+static void
+genX(upload_multisample_state)(struct brw_context *brw)
+{
+ genX(emit_3dstate_multisample2)(brw, brw->num_samples);
+
+ brw_batch_emit(brw, GENX(3DSTATE_SAMPLE_MASK), sm) {
+ sm.SampleMask = genX(determine_sample_mask)(brw);
+ }
+}
+
+static const struct brw_tracked_state genX(multisample_state) = {
+ .dirty = {
+ .mesa = _NEW_MULTISAMPLE,
+ .brw = BRW_NEW_BLORP |
+ BRW_NEW_CONTEXT |
+ BRW_NEW_NUM_SAMPLES,
+ },
+ .emit = genX(upload_multisample_state)
+};
+
#endif
/* ---------------------------------------------------------------------- */
@@ -2913,7 +3005,7 @@ genX(upload_ps)(struct brw_context *brw)
/* _NEW_BUFFERS, _NEW_MULTISAMPLE */
#if GEN_IS_HASWELL
- ps.SampleMask = gen6_determine_sample_mask(brw);
+ ps.SampleMask = genX(determine_sample_mask(brw));
#endif
/* 3DSTATE_PS expects the number of threads per PSD, which is always 64;
@@ -3596,7 +3688,7 @@ genX(init_atoms)(struct brw_context *brw)
&brw_vs_samplers,
&brw_gs_samplers,
&gen6_sampler_state,
- &gen6_multisample_state,
+ &genX(multisample_state),
&genX(vs_state),
&genX(gs_state),
@@ -3680,7 +3772,7 @@ genX(init_atoms)(struct brw_context *brw)
&brw_tcs_samplers,
&brw_tes_samplers,
&brw_gs_samplers,
- &gen6_multisample_state,
+ &genX(multisample_state),
&genX(vs_state),
&genX(hs_state),
@@ -3767,7 +3859,7 @@ genX(init_atoms)(struct brw_context *brw)
&brw_tcs_samplers,
&brw_tes_samplers,
&brw_gs_samplers,
- &gen8_multisample_state,
+ &genX(multisample_state),
&genX(vs_state),
&genX(hs_state),
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 16:52:47 +0000