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-rw-r--r--src/mesa/drivers/dri/i965/Makefile.sources2
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h5
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c119
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_surface_state.c180
-rw-r--r--src/mesa/drivers/dri/i965/gen8_surface_state.c82
7 files changed, 49 insertions, 351 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index 425c883de84..9687eb957e1 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -74,10 +74,8 @@ i965_FILES = \
gen7_misc_state.c \
gen7_sol_state.c \
gen7_urb.c \
- gen7_wm_surface_state.c \
gen8_depth_state.c \
gen8_multisample_state.c \
- gen8_surface_state.c \
hsw_queryobj.c \
hsw_sol.c \
intel_batchbuffer.c \
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index d97a24fbf82..d157f059704 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -866,10 +866,10 @@ brwCreateContext(gl_api api,
brw->gs.base.stage = MESA_SHADER_GEOMETRY;
brw->wm.base.stage = MESA_SHADER_FRAGMENT;
if (brw->gen >= 8) {
- gen8_init_vtable_surface_functions(brw);
+ gen6_init_vtable_surface_functions(brw);
brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
} else if (brw->gen >= 7) {
- gen7_init_vtable_surface_functions(brw);
+ gen6_init_vtable_surface_functions(brw);
brw->vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
} else if (brw->gen >= 6) {
gen6_init_vtable_surface_functions(brw);
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index d41e6aa7bde..a227a61f654 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -635,11 +635,6 @@ struct brw_context
struct gl_renderbuffer *rb,
uint32_t flags, unsigned unit,
uint32_t surf_index);
- void (*emit_null_surface_state)(struct brw_context *brw,
- unsigned width,
- unsigned height,
- unsigned samples,
- uint32_t *out_offset);
/**
* Send the appropriate state packets to configure depth, stencil, and
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 46665aae12b..dc893e5b7bd 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -232,14 +232,6 @@ void brw_update_renderbuffer_surfaces(struct brw_context *brw,
uint32_t render_target_start,
uint32_t *surf_offset);
-/* gen7_wm_surface_state.c */
-void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
-void gen7_init_vtable_surface_functions(struct brw_context *brw);
-
-/* gen8_surface_state.c */
-
-void gen8_init_vtable_surface_functions(struct brw_context *brw);
-
/* brw_sampler_state.c */
void brw_emit_sampler_state(struct brw_context *brw,
uint32_t *sampler_state,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 8537d6eeeb5..ab55eee1ce4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -833,72 +833,48 @@ const struct brw_tracked_state brw_wm_pull_constants = {
* hardware discard the target 0 color output..
*/
static void
-brw_emit_null_surface_state(struct brw_context *brw,
- unsigned width,
- unsigned height,
- unsigned samples,
- uint32_t *out_offset)
+emit_null_surface_state(struct brw_context *brw,
+ unsigned width,
+ unsigned height,
+ unsigned samples,
+ uint32_t *out_offset)
{
- /* From the Sandy bridge PRM, Vol4 Part1 p71 (Surface Type: Programming
- * Notes):
- *
- * A null surface will be used in instances where an actual surface is
- * not bound. When a write message is generated to a null surface, no
- * actual surface is written to. When a read message (including any
- * sampling engine message) is generated to a null surface, the result
- * is all zeros. Note that a null surface type is allowed to be used
- * with all messages, even if it is not specificially indicated as
- * supported. All of the remaining fields in surface state are ignored
- * for null surfaces, with the following exceptions:
+ uint32_t *surf = brw_state_batch(brw,
+ brw->isl_dev.ss.size,
+ brw->isl_dev.ss.align,
+ out_offset);
+
+ if (brw->gen != 6 || samples <= 1) {
+ isl_null_fill_state(&brw->isl_dev, surf,
+ isl_extent3d(width, height, 1));
+ return;
+ }
+
+ /* On Gen6, null render targets seem to cause GPU hangs when multisampling.
+ * So work around this problem by rendering into dummy color buffer.
*
- * - [DevSNB+]: Width, Height, Depth, and LOD fields must match the
- * depth buffer’s corresponding state for all render target surfaces,
- * including null.
+ * To decrease the amount of memory needed by the workaround buffer, we
+ * set its pitch to 128 bytes (the width of a Y tile). This means that
+ * the amount of memory needed for the workaround buffer is
+ * (width_in_tiles + height_in_tiles - 1) tiles.
*
- * - Surface Format must be R8G8B8A8_UNORM.
+ * Note that since the workaround buffer will be interpreted by the
+ * hardware as an interleaved multisampled buffer, we need to compute
+ * width_in_tiles and height_in_tiles by dividing the width and height
+ * by 16 rather than the normal Y-tile size of 32.
*/
- unsigned surface_type = BRW_SURFACE_NULL;
- struct brw_bo *bo = NULL;
- unsigned pitch_minus_1 = 0;
- uint32_t multisampling_state = 0;
- uint32_t *surf = brw_state_batch(brw, 6 * 4, 32, out_offset);
+ unsigned width_in_tiles = ALIGN(width, 16) / 16;
+ unsigned height_in_tiles = ALIGN(height, 16) / 16;
+ unsigned pitch_minus_1 = 127;
+ unsigned size_needed = (width_in_tiles + height_in_tiles - 1) * 4096;
+ brw_get_scratch_bo(brw, &brw->wm.multisampled_null_render_target_bo,
+ size_needed);
- if (samples > 1) {
- /* On Gen6, null render targets seem to cause GPU hangs when
- * multisampling. So work around this problem by rendering into dummy
- * color buffer.
- *
- * To decrease the amount of memory needed by the workaround buffer, we
- * set its pitch to 128 bytes (the width of a Y tile). This means that
- * the amount of memory needed for the workaround buffer is
- * (width_in_tiles + height_in_tiles - 1) tiles.
- *
- * Note that since the workaround buffer will be interpreted by the
- * hardware as an interleaved multisampled buffer, we need to compute
- * width_in_tiles and height_in_tiles by dividing the width and height
- * by 16 rather than the normal Y-tile size of 32.
- */
- unsigned width_in_tiles = ALIGN(width, 16) / 16;
- unsigned height_in_tiles = ALIGN(height, 16) / 16;
- unsigned size_needed = (width_in_tiles + height_in_tiles - 1) * 4096;
- brw_get_scratch_bo(brw, &brw->wm.multisampled_null_render_target_bo,
- size_needed);
- bo = brw->wm.multisampled_null_render_target_bo;
- surface_type = BRW_SURFACE_2D;
- pitch_minus_1 = 127;
- multisampling_state = brw_get_surface_num_multisamples(samples);
- }
-
- surf[0] = (surface_type << BRW_SURFACE_TYPE_SHIFT |
+ surf[0] = (BRW_SURFACE_2D << BRW_SURFACE_TYPE_SHIFT |
ISL_FORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT);
- if (brw->gen < 6) {
- surf[0] |= (1 << BRW_SURFACE_WRITEDISABLE_R_SHIFT |
- 1 << BRW_SURFACE_WRITEDISABLE_G_SHIFT |
- 1 << BRW_SURFACE_WRITEDISABLE_B_SHIFT |
- 1 << BRW_SURFACE_WRITEDISABLE_A_SHIFT);
- }
- surf[1] = !bo ? 0 :
- brw_emit_reloc(&brw->batch, *out_offset + 4, bo, 0, RELOC_WRITE);
+ surf[1] = brw_emit_reloc(&brw->batch, *out_offset + 4,
+ brw->wm.multisampled_null_render_target_bo,
+ 0, RELOC_WRITE);
surf[2] = ((width - 1) << BRW_SURFACE_WIDTH_SHIFT |
(height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
@@ -910,7 +886,7 @@ brw_emit_null_surface_state(struct brw_context *brw,
*/
surf[3] = (BRW_SURFACE_TILED | BRW_SURFACE_TILED_Y |
pitch_minus_1 << BRW_SURFACE_PITCH_SHIFT);
- surf[4] = multisampling_state;
+ surf[4] = BRW_SURFACE_MULTISAMPLECOUNT_4;
surf[5] = 0;
}
@@ -1047,14 +1023,12 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw,
brw->vtbl.update_renderbuffer_surface(
brw, fb->_ColorDrawBuffers[i], flags, i, surf_index);
} else {
- brw->vtbl.emit_null_surface_state(brw, w, h, s,
- &surf_offset[surf_index]);
+ emit_null_surface_state(brw, w, h, s, &surf_offset[surf_index]);
}
}
} else {
const uint32_t surf_index = render_target_start;
- brw->vtbl.emit_null_surface_state(brw, w, h, s,
- &surf_offset[surf_index]);
+ emit_null_surface_state(brw, w, h, s, &surf_offset[surf_index]);
}
}
@@ -1160,9 +1134,11 @@ update_renderbuffer_read_surfaces(struct brw_context *brw)
0);
} else {
- brw->vtbl.emit_null_surface_state(
- brw, _mesa_geometric_width(fb), _mesa_geometric_height(fb),
- _mesa_geometric_samples(fb), surf_offset);
+ emit_null_surface_state(brw,
+ _mesa_geometric_width(fb),
+ _mesa_geometric_height(fb),
+ _mesa_geometric_samples(fb),
+ surf_offset);
}
}
@@ -1334,7 +1310,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_program *prog,
&ctx->UniformBufferBindings[prog->sh.UniformBlocks[i]->Binding];
if (binding->BufferObject == ctx->Shared->NullBufferObj) {
- brw->vtbl.emit_null_surface_state(brw, 1, 1, 1, &ubo_surf_offsets[i]);
+ emit_null_surface_state(brw, 1, 1, 1, &ubo_surf_offsets[i]);
} else {
struct intel_buffer_object *intel_bo =
intel_buffer_object(binding->BufferObject);
@@ -1359,7 +1335,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_program *prog,
&ctx->ShaderStorageBufferBindings[prog->sh.ShaderStorageBlocks[i]->Binding];
if (binding->BufferObject == ctx->Shared->NullBufferObj) {
- brw->vtbl.emit_null_surface_state(brw, 1, 1, 1, &ssbo_surf_offsets[i]);
+ emit_null_surface_state(brw, 1, 1, 1, &ssbo_surf_offsets[i]);
} else {
struct intel_buffer_object *intel_bo =
intel_buffer_object(binding->BufferObject);
@@ -1655,7 +1631,7 @@ update_image_surface(struct brw_context *brw,
}
} else {
- brw->vtbl.emit_null_surface_state(brw, 1, 1, 1, surf_offset);
+ emit_null_surface_state(brw, 1, 1, 1, surf_offset);
update_default_image_param(brw, u, surface_idx, param);
}
}
@@ -1718,7 +1694,6 @@ void
gen4_init_vtable_surface_functions(struct brw_context *brw)
{
brw->vtbl.update_renderbuffer_surface = gen4_update_renderbuffer_surface;
- brw->vtbl.emit_null_surface_state = brw_emit_null_surface_state;
}
void
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
deleted file mode 100644
index c9d777bcc57..00000000000
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/*
- * Copyright © 2011 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-#include "main/mtypes.h"
-#include "main/blend.h"
-#include "main/samplerobj.h"
-#include "main/texformat.h"
-#include "main/teximage.h"
-#include "program/prog_parameter.h"
-#include "program/prog_instruction.h"
-
-#include "intel_mipmap_tree.h"
-#include "intel_batchbuffer.h"
-#include "intel_tex.h"
-#include "intel_fbo.h"
-#include "intel_buffer_objects.h"
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_wm.h"
-
-void
-gen7_check_surface_setup(uint32_t *surf, bool is_render_target)
-{
- unsigned num_multisamples = surf[4] & INTEL_MASK(5, 3);
- unsigned multisampled_surface_storage_format = surf[4] & (1 << 6);
- unsigned surface_array_spacing = surf[0] & (1 << 10);
- bool is_multisampled = num_multisamples != GEN7_SURFACE_MULTISAMPLECOUNT_1;
-
- (void) surface_array_spacing;
-
- /* From the Ivybridge PRM, Volume 4 Part 1, page 66 (RENDER_SURFACE_STATE
- * dword 0 bit 10 "Surface Array Spacing" Programming Notes):
- *
- * If Multisampled Surface Storage Format is MSFMT_MSS and Number of
- * Multisamples is not MULTISAMPLECOUNT_1, this field must be set to
- * ARYSPC_LOD0.
- */
- if (multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS
- && is_multisampled)
- assert(surface_array_spacing == GEN7_SURFACE_ARYSPC_LOD0);
-
- /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
- * dword 4 bit 6 "Multisampled Surface Storage" Programming Notes):
- *
- * All multisampled render target surfaces must have this field set to
- * MSFMT_MSS.
- *
- * But also:
- *
- * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
- */
- if (is_render_target && is_multisampled) {
- assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
- }
-
- /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
- * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
- *
- * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8, Width
- * is >= 8192 (meaning the actual surface width is >= 8193 pixels), this
- * field must be set to MSFMT_MSS.
- */
- uint32_t width = GET_FIELD(surf[2], GEN7_SURFACE_WIDTH) + 1;
- if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 && width >= 8193) {
- assert(multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS);
- }
-
- /* From the Ivybridge PRM, Volume 4 Part 1, page 72 (RENDER_SURFACE_STATE
- * dword 4 bit 6 "Multisampled Surface Storage Format" Errata):
- *
- * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8,
- * ((Depth+1) * (Height+1)) is > 4,194,304, OR if the surface’s Number of
- * Multisamples is MULTISAMPLECOUNT_4, ((Depth+1) * (Height+1)) is >
- * 8,388,608, this field must be set to MSFMT_DEPTH_STENCIL.This field
- * must be set to MSFMT_DEPTH_STENCIL if Surface Format is one of the
- * following: I24X8_UNORM, L24X8_UNORM, A24X8_UNORM, or
- * R24_UNORM_X8_TYPELESS.
- *
- * But also (from the Programming Notes):
- *
- * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1.
- */
- uint32_t depth = GET_FIELD(surf[3], BRW_SURFACE_DEPTH) + 1;
- uint32_t height = GET_FIELD(surf[2], GEN7_SURFACE_HEIGHT) + 1;
- if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 &&
- depth * height > 4194304) {
- assert(multisampled_surface_storage_format ==
- GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
- }
- if (num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_4 &&
- depth * height > 8388608) {
- assert(multisampled_surface_storage_format ==
- GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
- }
- if (is_multisampled) {
- switch (GET_FIELD(surf[0], BRW_SURFACE_FORMAT)) {
- case ISL_FORMAT_I24X8_UNORM:
- case ISL_FORMAT_L24X8_UNORM:
- case ISL_FORMAT_A24X8_UNORM:
- case ISL_FORMAT_R24_UNORM_X8_TYPELESS:
- assert(multisampled_surface_storage_format ==
- GEN7_SURFACE_MSFMT_DEPTH_STENCIL);
- }
- }
-}
-
-/**
- * Creates a null surface.
- *
- * This is used when the shader doesn't write to any color output. An FB
- * write to target 0 will still be emitted, because that's how the thread is
- * terminated (and computed depth is returned), so we need to have the
- * hardware discard the target 0 color output..
- */
-static void
-gen7_emit_null_surface_state(struct brw_context *brw,
- unsigned width,
- unsigned height,
- unsigned samples,
- uint32_t *out_offset)
-{
- /* From the Ivy bridge PRM, Vol4 Part1 p62 (Surface Type: Programming
- * Notes):
- *
- * A null surface is used in instances where an actual surface is not
- * bound. When a write message is generated to a null surface, no
- * actual surface is written to. When a read message (including any
- * sampling engine message) is generated to a null surface, the result
- * is all zeros. Note that a null surface type is allowed to be used
- * with all messages, even if it is not specificially indicated as
- * supported. All of the remaining fields in surface state are ignored
- * for null surfaces, with the following exceptions: Width, Height,
- * Depth, LOD, and Render Target View Extent fields must match the
- * depth buffer’s corresponding state for all render target surfaces,
- * including null.
- */
- uint32_t *surf = brw_state_batch(brw, 8 * 4, 32, out_offset);
- memset(surf, 0, 8 * 4);
-
- /* From the Ivybridge PRM, Volume 4, Part 1, page 65,
- * Tiled Surface: Programming Notes:
- * "If Surface Type is SURFTYPE_NULL, this field must be TRUE."
- */
- surf[0] = BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
- ISL_FORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
- GEN7_SURFACE_TILING_Y;
-
- surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
- SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
-
- gen7_check_surface_setup(surf, true /* is_render_target */);
-}
-
-void
-gen7_init_vtable_surface_functions(struct brw_context *brw)
-{
- brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
- brw->vtbl.emit_null_surface_state = gen7_emit_null_surface_state;
-}
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
deleted file mode 100644
index c2ac7c74a61..00000000000
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright © 2012 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- */
-
-#include "main/blend.h"
-#include "main/mtypes.h"
-#include "main/samplerobj.h"
-#include "main/texformat.h"
-#include "main/teximage.h"
-#include "program/prog_parameter.h"
-#include "program/prog_instruction.h"
-
-#include "intel_mipmap_tree.h"
-#include "intel_batchbuffer.h"
-#include "intel_tex.h"
-#include "intel_fbo.h"
-#include "intel_buffer_objects.h"
-#include "intel_image.h"
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_wm.h"
-#include "isl/isl.h"
-
-static uint32_t *
-gen8_allocate_surface_state(struct brw_context *brw, uint32_t *out_offset)
-{
- uint32_t *surf = brw_state_batch(brw, 64, 64, out_offset);
- memset(surf, 0, 64);
- return surf;
-}
-
-/**
- * Creates a null surface.
- *
- * This is used when the shader doesn't write to any color output. An FB
- * write to target 0 will still be emitted, because that's how the thread is
- * terminated (and computed depth is returned), so we need to have the
- * hardware discard the target 0 color output..
- */
-static void
-gen8_emit_null_surface_state(struct brw_context *brw,
- unsigned width,
- unsigned height,
- unsigned samples,
- uint32_t *out_offset)
-{
- uint32_t *surf = gen8_allocate_surface_state(brw, out_offset);
-
- surf[0] = BRW_SURFACE_NULL << BRW_SURFACE_TYPE_SHIFT |
- ISL_FORMAT_B8G8R8A8_UNORM << BRW_SURFACE_FORMAT_SHIFT |
- GEN8_SURFACE_TILING_Y;
- surf[2] = SET_FIELD(width - 1, GEN7_SURFACE_WIDTH) |
- SET_FIELD(height - 1, GEN7_SURFACE_HEIGHT);
-}
-
-void
-gen8_init_vtable_surface_functions(struct brw_context *brw)
-{
- brw->vtbl.update_renderbuffer_surface = brw_update_renderbuffer_surface;
- brw->vtbl.emit_null_surface_state = gen8_emit_null_surface_state;
-}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 01:57:30 +0000