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-rw-r--r--src/mesa/drivers/common/meta.c13
-rw-r--r--src/mesa/drivers/dri/Makefile.template7
-rw-r--r--src/mesa/drivers/dri/common/dri_test.c89
-rw-r--r--src/mesa/drivers/dri/common/dri_util.c24
-rw-r--r--src/mesa/drivers/dri/common/dri_util.h22
-rw-r--r--src/mesa/drivers/dri/common/drisw_util.c (renamed from src/mesa/drivers/dri/common/dri_sw.c)9
-rw-r--r--src/mesa/drivers/dri/common/drisw_util.h (renamed from src/mesa/drivers/dri/common/dri_sw.h)88
-rw-r--r--src/mesa/drivers/dri/i915/i830_texstate.c6
-rw-r--r--src/mesa/drivers/dri/i915/i915_state.c2
-rw-r--r--src/mesa/drivers/dri/i915/i915_tex_layout.c27
-rw-r--r--src/mesa/drivers/dri/i915/i915_texstate.c2
-rw-r--r--src/mesa/drivers/dri/i915/intel_tris.c16
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_disasm.c7
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_tex_layout.c23
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c48
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c51
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_glsl.c38
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_clip_state.c2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_gs_state.c3
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c51
-rw-r--r--src/mesa/drivers/dri/intel/intel_buffers.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c31
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.h4
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c11
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c103
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.h16
-rw-r--r--src/mesa/drivers/dri/intel/intel_pixel_copy.c32
-rw-r--r--src/mesa/drivers/dri/intel/intel_reg.h4
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.c29
-rw-r--r--src/mesa/drivers/dri/intel/intel_regions.h4
-rw-r--r--src/mesa/drivers/dri/intel/intel_screen.c19
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c20
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_copy.c16
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_image.c4
-rw-r--r--src/mesa/drivers/dri/intel/intel_tex_layout.c14
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_context.c5
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_driver.c4
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_fbo.c6
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_gldefs.h19
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_render.h4
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_render_t.c2
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_span.c30
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_state.c26
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_state.h4
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_texture.c100
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_texture.h2
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_util.h18
-rw-r--r--src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c53
-rw-r--r--src/mesa/drivers/dri/nouveau/nv04_context.c4
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_context.c6
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_driver.h3
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state_fb.c5
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state_tex.c55
-rw-r--r--src/mesa/drivers/dri/nouveau/nv10_state_tnl.c57
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_context.c18
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_driver.h6
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_state_fb.c4
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_state_tex.c56
-rw-r--r--src/mesa/drivers/dri/nouveau/nv20_state_tnl.c57
-rw-r--r--src/mesa/drivers/dri/r200/r200_cmdbuf.c3
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.c7
-rw-r--r--src/mesa/drivers/dri/r200/r200_tcl.c56
-rw-r--r--src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c28
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c4
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c5
-rw-r--r--src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c41
-rw-r--r--src/mesa/drivers/dri/r300/r300_cmdbuf.c42
-rw-r--r--src/mesa/drivers/dri/r300/r300_fragprog_common.c13
-rw-r--r--src/mesa/drivers/dri/r300/r300_state.c7
-rw-r--r--src/mesa/drivers/dri/r300/r300_vertprog.c30
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c9
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c7
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c7
-rw-r--r--src/mesa/drivers/dri/swrast/Makefile4
-rw-r--r--src/mesa/drivers/dri/swrast/swrast.c19
-rw-r--r--src/mesa/drivers/dri/swrast/swrast_priv.h10
-rw-r--r--src/mesa/drivers/dri/swrast/swrast_span.c2
-rw-r--r--src/mesa/drivers/dri/swrast/swrast_spantemp.h17
-rw-r--r--src/mesa/drivers/glslcompiler/Makefile7
-rw-r--r--src/mesa/drivers/glslcompiler/glslcompiler.c49
-rw-r--r--src/mesa/drivers/x11/glxapi.c15
86 files changed, 1045 insertions, 736 deletions
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index b97b760f181..84a2a5fcb3a 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -429,13 +429,15 @@ _mesa_meta_begin(GLcontext *ctx, GLbitfield state)
if (state & META_SHADER) {
if (ctx->Extensions.ARB_vertex_program) {
save->VertexProgramEnabled = ctx->VertexProgram.Enabled;
- save->VertexProgram = ctx->VertexProgram.Current;
+ _mesa_reference_vertprog(ctx, &save->VertexProgram,
+ ctx->VertexProgram.Current);
_mesa_set_enable(ctx, GL_VERTEX_PROGRAM_ARB, GL_FALSE);
}
if (ctx->Extensions.ARB_fragment_program) {
save->FragmentProgramEnabled = ctx->FragmentProgram.Enabled;
- save->FragmentProgram = ctx->FragmentProgram.Current;
+ _mesa_reference_fragprog(ctx, &save->FragmentProgram,
+ ctx->FragmentProgram.Current);
_mesa_set_enable(ctx, GL_FRAGMENT_PROGRAM_ARB, GL_FALSE);
}
@@ -663,6 +665,7 @@ _mesa_meta_end(GLcontext *ctx)
save->VertexProgramEnabled);
_mesa_reference_vertprog(ctx, &ctx->VertexProgram.Current,
save->VertexProgram);
+ _mesa_reference_vertprog(ctx, &save->VertexProgram, NULL);
}
if (ctx->Extensions.ARB_fragment_program) {
@@ -670,6 +673,7 @@ _mesa_meta_end(GLcontext *ctx)
save->FragmentProgramEnabled);
_mesa_reference_fragprog(ctx, &ctx->FragmentProgram.Current,
save->FragmentProgram);
+ _mesa_reference_fragprog(ctx, &save->FragmentProgram, NULL);
}
if (ctx->Extensions.ARB_shader_objects) {
@@ -720,6 +724,7 @@ _mesa_meta_end(GLcontext *ctx)
for (tgt = 0; tgt < NUM_TEXTURE_TARGETS; tgt++) {
_mesa_reference_texobj(&ctx->Texture.Unit[0].CurrentTex[tgt],
save->CurrentTexture[tgt]);
+ _mesa_reference_texobj(&save->CurrentTexture[tgt], NULL);
}
/* Re-enable textures, texgen */
@@ -2062,8 +2067,10 @@ _mesa_meta_Bitmap(GLcontext *ctx,
}
bitmap1 = _mesa_map_pbo_source(ctx, &unpackSave, bitmap1);
- if (!bitmap1)
+ if (!bitmap1) {
+ _mesa_meta_end(ctx);
return;
+ }
bitmap8 = (GLubyte *) calloc(1, width * height);
if (bitmap8) {
diff --git a/src/mesa/drivers/dri/Makefile.template b/src/mesa/drivers/dri/Makefile.template
index a0c25d26cdf..f19cc039b22 100644
--- a/src/mesa/drivers/dri/Makefile.template
+++ b/src/mesa/drivers/dri/Makefile.template
@@ -51,9 +51,12 @@ lib: symlinks subdirs depend
@$(MAKE) $(LIBNAME) $(TOP)/$(LIB_DIR)/$(LIBNAME)
$(LIBNAME): $(OBJECTS) $(MESA_MODULES) $(EXTRA_MODULES) Makefile \
- $(TOP)/src/mesa/drivers/dri/Makefile.template
- $(MKLIB) -o $@ -noprefix -linker '$(CC)' -ldflags '$(LDFLAGS)' \
+ $(TOP)/src/mesa/drivers/dri/Makefile.template $(TOP)/src/mesa/drivers/dri/common/dri_test.o
+ $(MKLIB) -o [email protected] -noprefix -linker '$(CC)' -ldflags '$(LDFLAGS)' \
$(OBJECTS) $(MESA_MODULES) $(EXTRA_MODULES) $(DRI_LIB_DEPS)
+ $(CC) -o [email protected] $(TOP)/src/mesa/drivers/dri/common/dri_test.o [email protected] $(DRI_LIB_DEPS)
$(TOP)/$(LIB_DIR)/$(LIBNAME): $(LIBNAME)
diff --git a/src/mesa/drivers/dri/common/dri_test.c b/src/mesa/drivers/dri/common/dri_test.c
new file mode 100644
index 00000000000..793f0c37d79
--- /dev/null
+++ b/src/mesa/drivers/dri/common/dri_test.c
@@ -0,0 +1,89 @@
+#include "main/glheader.h"
+#include "main/compiler.h"
+#include "glapi/glapi.h"
+
+/* This is just supposed to make sure we get a reference to
+ the driver entry symbol that the compiler doesn't optimize away */
+
+extern char __driDriverExtensions[];
+
+/* provide glapi symbols */
+
+#if defined(GLX_USE_TLS)
+
+PUBLIC __thread struct _glapi_table * _glapi_tls_Dispatch
+ __attribute__((tls_model("initial-exec")));
+
+PUBLIC __thread void * _glapi_tls_Context
+ __attribute__((tls_model("initial-exec")));
+
+PUBLIC const struct _glapi_table *_glapi_Dispatch;
+PUBLIC const void *_glapi_Context;
+
+#else
+
+PUBLIC struct _glapi_table *_glapi_Dispatch;
+PUBLIC void *_glapi_Context;
+
+#endif
+
+PUBLIC void
+_glapi_check_multithread(void)
+{}
+
+PUBLIC void
+_glapi_set_context(void *context)
+{}
+
+PUBLIC void *
+_glapi_get_context(void)
+{
+ return 0;
+}
+
+PUBLIC void
+_glapi_set_dispatch(struct _glapi_table *dispatch)
+{}
+
+PUBLIC struct _glapi_table *
+_glapi_get_dispatch(void)
+{
+ return 0;
+}
+
+PUBLIC int
+_glapi_add_dispatch( const char * const * function_names,
+ const char * parameter_signature )
+{
+ return 0;
+}
+
+PUBLIC GLint
+_glapi_get_proc_offset(const char *funcName)
+{
+ return 0;
+}
+
+PUBLIC _glapi_proc
+_glapi_get_proc_address(const char *funcName)
+{
+ return 0;
+}
+
+PUBLIC GLuint
+_glapi_get_dispatch_table_size(void)
+{
+ return 0;
+}
+
+PUBLIC unsigned long
+_glthread_GetID(void)
+{
+ return 0;
+}
+
+int main(int argc, char** argv)
+{
+ void* p = __driDriverExtensions;
+ return (int)(unsigned long)p;
+}
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c
index badbb5ff824..f1bbd386128 100644
--- a/src/mesa/drivers/dri/common/dri_util.c
+++ b/src/mesa/drivers/dri/common/dri_util.c
@@ -129,11 +129,6 @@ static int driUnbindContext(__DRIcontext *pcp)
*/
pcp->driDrawablePriv = pcp->driReadablePriv = NULL;
-#if 0
- /* Unbind the drawable */
- pdp->driContextPriv = &psp->dummyContextPriv;
-#endif
-
return GL_TRUE;
}
@@ -433,7 +428,6 @@ driCreateNewDrawable(__DRIscreen *psp, const __DRIconfig *config,
pdp->vblFlags = 0;
pdp->driScreenPriv = psp;
- pdp->driContextPriv = &psp->dummyContextPriv;
if (!(*psp->DriverAPI.CreateBuffer)(psp, pdp, &config->modes,
renderType == GLX_PIXMAP_BIT)) {
@@ -567,17 +561,6 @@ driCreateNewContext(__DRIscreen *psp, const __DRIconfig *config,
pcp->dri2.draw_stamp = 0;
pcp->dri2.read_stamp = 0;
- /* When the first context is created for a screen, initialize a "dummy"
- * context.
- */
-
- if (!psp->dri2.enabled && !psp->dummyContextPriv.driScreenPriv) {
- psp->dummyContextPriv.hHWContext = psp->pSAREA->dummy_context;
- psp->dummyContextPriv.driScreenPriv = psp;
- psp->dummyContextPriv.driDrawablePriv = NULL;
- psp->dummyContextPriv.driverPrivate = NULL;
- /* No other fields should be used! */
- }
pcp->hHWContext = hwContext;
@@ -734,13 +717,6 @@ driCreateNewScreen(int scrn,
psp->myNum = scrn;
psp->dri2.enabled = GL_FALSE;
- /*
- ** Do not init dummy context here; actual initialization will be
- ** done when the first DRI context is created. Init screen priv ptr
- ** to NULL to let CreateContext routine that it needs to be inited.
- */
- psp->dummyContextPriv.driScreenPriv = NULL;
-
psp->DriverAPI = driDriverAPI;
*driver_modes = driDriverAPI.InitScreen(psp);
diff --git a/src/mesa/drivers/dri/common/dri_util.h b/src/mesa/drivers/dri/common/dri_util.h
index f63583cebc0..038a81604fc 100644
--- a/src/mesa/drivers/dri/common/dri_util.h
+++ b/src/mesa/drivers/dri/common/dri_util.h
@@ -399,11 +399,6 @@ struct __DRIcontextRec {
void *driverPrivate;
/**
- * Pointer back to the \c __DRIcontext that contains this structure.
- */
- __DRIcontext *pctx;
-
- /**
* Pointer to drawable currently bound to this context for drawing.
*/
__DRIdrawable *driDrawablePriv;
@@ -511,29 +506,12 @@ struct __DRIscreenRec {
/*@}*/
/**
- * Dummy context to which drawables are bound when not bound to any
- * other context.
- *
- * A dummy hHWContext is created for this context, and is used by the GL
- * core when a hardware lock is required but the drawable is not currently
- * bound (e.g., potentially during a SwapBuffers request). The dummy
- * context is created when the first "real" context is created on this
- * screen.
- */
- __DRIcontext dummyContextPriv;
-
- /**
* Device-dependent private information (not stored in the SAREA).
*
* This pointer is never touched by the DRI layer.
*/
void *private;
- /**
- * Pointer back to the \c __DRIscreen that contains this structure.
- */
- __DRIscreen *psc;
-
/* Extensions provided by the loader. */
const __DRIgetDrawableInfoExtension *getDrawableInfo;
const __DRIsystemTimeExtension *systemTime;
diff --git a/src/mesa/drivers/dri/common/dri_sw.c b/src/mesa/drivers/dri/common/drisw_util.c
index b7f9036f473..8d08b93bfb5 100644
--- a/src/mesa/drivers/dri/common/dri_sw.c
+++ b/src/mesa/drivers/dri/common/drisw_util.c
@@ -22,12 +22,12 @@
*/
/**
- * \file dri_sw.c
+ * \file drisw_util.c
*
* DRISW utility functions, i.e. dri_util.c stripped from drm-specific bits.
*/
-#include "dri_sw.h"
+#include "drisw_util.h"
#include "utils.h"
@@ -63,6 +63,7 @@ driCreateNewScreen(int scrn, const __DRIextension **extensions,
setupLoaderExtensions(psp, extensions);
psp->extensions = emptyExtensionList;
+ psp->fd = -1;
psp->myNum = scrn;
*driver_configs = driDriverAPI.InitScreen(psp);
@@ -146,6 +147,7 @@ static int driBindContext(__DRIcontext *pcp,
pcp->driDrawablePriv = pdp;
pcp->driReadablePriv = prp;
if (pdp) {
+ pdp->driContextPriv = pcp;
dri_get_drawable(pdp);
}
if ( prp && pdp != prp ) {
@@ -221,6 +223,7 @@ driCreateNewDrawable(__DRIscreen *psp,
pdp->loaderPrivate = data;
pdp->driScreenPriv = psp;
+ pdp->driContextPriv = NULL;
dri_get_drawable(pdp);
@@ -229,6 +232,8 @@ driCreateNewDrawable(__DRIscreen *psp,
return NULL;
}
+ pdp->lastStamp = 1; /* const */
+
return pdp;
}
diff --git a/src/mesa/drivers/dri/common/dri_sw.h b/src/mesa/drivers/dri/common/drisw_util.h
index e353e26b34d..08d5a116e96 100644
--- a/src/mesa/drivers/dri/common/dri_sw.h
+++ b/src/mesa/drivers/dri/common/drisw_util.h
@@ -21,13 +21,25 @@
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
+/**
+ * @file
+ * Binding of the DRI interface (dri_interface.h) for DRISW.
+ *
+ * The DRISW structs are 'base classes' of the corresponding DRI1 / DRI2 (DRM)
+ * structs. The bindings for SW and DRM can be unified by making the DRM structs
+ * 'sub-classes' of the SW structs, either proper or with field re-ordering.
+ *
+ * The code can also be unified but that requires cluttering the common code
+ * with ifdef's and guarding with (__DRIscreen::fd >= 0) for DRM.
+ */
-#ifndef _DRI_SW_H
-#define _DRI_SW_H
+#ifndef _DRISW_UTIL_H
+#define _DRISW_UTIL_H
#include <GL/gl.h>
#include <GL/internal/glcore.h>
#include <GL/internal/dri_interface.h>
+typedef struct _drmLock drmLock;
/**
@@ -38,6 +50,39 @@ extern const __DRIswrastExtension driSWRastExtension;
/**
+ * Driver callback functions
+ */
+struct __DriverAPIRec {
+ const __DRIconfig **(*InitScreen) (__DRIscreen * priv);
+
+ void (*DestroyScreen)(__DRIscreen *driScrnPriv);
+
+ GLboolean (*CreateContext)(const __GLcontextModes *glVis,
+ __DRIcontext *driContextPriv,
+ void *sharedContextPrivate);
+
+ void (*DestroyContext)(__DRIcontext *driContextPriv);
+
+ GLboolean (*CreateBuffer)(__DRIscreen *driScrnPriv,
+ __DRIdrawable *driDrawPriv,
+ const __GLcontextModes *glVis,
+ GLboolean pixmapBuffer);
+
+ void (*DestroyBuffer)(__DRIdrawable *driDrawPriv);
+
+ void (*SwapBuffers)(__DRIdrawable *driDrawPriv);
+
+ GLboolean (*MakeCurrent)(__DRIcontext *driContextPriv,
+ __DRIdrawable *driDrawPriv,
+ __DRIdrawable *driReadPriv);
+
+ GLboolean (*UnbindContext)(__DRIcontext *driContextPriv);
+};
+
+extern const struct __DriverAPIRec driDriverAPI;
+
+
+/**
* Data types
*/
struct __DRIscreenRec {
@@ -71,42 +116,17 @@ struct __DRIdrawableRec {
void *loaderPrivate;
+ __DRIcontext *driContextPriv;
+
__DRIscreen *driScreenPriv;
int refcount;
-};
-
-
-/**
- * Driver callback functions
- */
-struct __DriverAPIRec {
- const __DRIconfig **(*InitScreen) (__DRIscreen * priv);
-
- void (*DestroyScreen)(__DRIscreen *driScrnPriv);
-
- GLboolean (*CreateContext)(const __GLcontextModes *glVis,
- __DRIcontext *driContextPriv,
- void *sharedContextPrivate);
- void (*DestroyContext)(__DRIcontext *driContextPriv);
+ /* gallium */
+ unsigned int lastStamp;
- GLboolean (*CreateBuffer)(__DRIscreen *driScrnPriv,
- __DRIdrawable *driDrawPriv,
- const __GLcontextModes *glVis,
- GLboolean pixmapBuffer);
-
- void (*DestroyBuffer)(__DRIdrawable *driDrawPriv);
-
- void (*SwapBuffers)(__DRIdrawable *driDrawPriv);
-
- GLboolean (*MakeCurrent)(__DRIcontext *driContextPriv,
- __DRIdrawable *driDrawPriv,
- __DRIdrawable *driReadPriv);
-
- GLboolean (*UnbindContext)(__DRIcontext *driContextPriv);
+ int w;
+ int h;
};
-extern const struct __DriverAPIRec driDriverAPI;
-
-#endif /* _DRI_SW_H */
+#endif /* _DRISW_UTIL_H */
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index e8f7e378ec7..a28073919cb 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -146,15 +146,15 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
dri_bo_reference(intelObj->mt->region->buffer);
i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+ pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
+
/* XXX: This calculation is probably broken for tiled images with
* a non-page-aligned offset.
*/
- i830->state.tex_offset[unit] = (dst_x + dst_y * intelObj->mt->pitch) *
- intelObj->mt->cpp;
+ i830->state.tex_offset[unit] = dst_x * intelObj->mt->cpp + dst_y * pitch;
format = translate_texture_format(firstImage->TexFormat,
firstImage->InternalFormat);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
(LOAD_TEXTURE_MAP0 << unit) | 4);
diff --git a/src/mesa/drivers/dri/i915/i915_state.c b/src/mesa/drivers/dri/i915/i915_state.c
index 7275617a6fb..91b228d52b9 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -374,7 +374,7 @@ intelCalcViewport(GLcontext * ctx)
else {
/* window buffer, y=0=top */
yScale = -1.0;
- yBias = (intel->driDrawable) ? intel->driDrawable->h : 0.0F;
+ yBias = ctx->DrawBuffer->Height;
}
m[MAT_SX] = v[MAT_SX];
diff --git a/src/mesa/drivers/dri/i915/i915_tex_layout.c b/src/mesa/drivers/dri/i915/i915_tex_layout.c
index fe3908f580a..702655283ba 100644
--- a/src/mesa/drivers/dri/i915/i915_tex_layout.c
+++ b/src/mesa/drivers/dri/i915/i915_tex_layout.c
@@ -123,13 +123,12 @@ i915_miptree_layout_cube(struct intel_context *intel,
assert(lvlWidth == lvlHeight); /* cubemap images are square */
/* double pitch for cube layouts */
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+ mt->total_width = dim * 2;
mt->total_height = dim * 4;
for (level = mt->first_level; level <= mt->last_level; level++) {
intel_miptree_set_level_info(mt, level, 6,
0, 0,
- /*OLD: mt->pitch, mt->total_height,*/
lvlWidth, lvlHeight,
1);
lvlWidth /= 2;
@@ -167,7 +166,7 @@ i915_miptree_layout_3d(struct intel_context *intel,
GLint level;
/* Calculate the size of a single slice. */
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
/* XXX: hardware expects/requires 9 levels at minimum. */
for (level = mt->first_level; level <= MAX2(8, mt->last_level); level++) {
@@ -210,7 +209,7 @@ i915_miptree_layout_2d(struct intel_context *intel,
GLuint img_height;
GLint level;
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
mt->total_height = 0;
for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -251,9 +250,8 @@ i915_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
break;
}
- DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
- mt->pitch,
- mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+ DBG("%s: %dx%dx%d\n", __FUNCTION__,
+ mt->total_width, mt->total_height, mt->cpp);
return GL_TRUE;
}
@@ -336,9 +334,9 @@ i945_miptree_layout_cube(struct intel_context *intel,
* or the final row of 4x4, 2x2 and 1x1 faces below this.
*/
if (dim > 32)
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, dim * 2);
+ mt->total_width = dim * 2;
else
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, 14 * 8);
+ mt->total_width = 14 * 8;
if (dim >= 4)
mt->total_height = dim * 4 + 4;
@@ -423,11 +421,11 @@ i945_miptree_layout_3d(struct intel_context *intel,
GLuint pack_y_pitch;
GLuint level;
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
mt->total_height = 0;
pack_y_pitch = MAX2(mt->height0, 2);
- pack_x_pitch = mt->pitch;
+ pack_x_pitch = mt->total_width;
pack_x_nr = 1;
for (level = mt->first_level; level <= mt->last_level; level++) {
@@ -454,7 +452,7 @@ i945_miptree_layout_3d(struct intel_context *intel,
if (pack_x_pitch > 4) {
pack_x_pitch >>= 1;
pack_x_nr <<= 1;
- assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+ assert(pack_x_pitch * pack_x_nr <= mt->total_width);
}
if (pack_y_pitch > 2) {
@@ -491,9 +489,8 @@ i945_miptree_layout(struct intel_context *intel, struct intel_mipmap_tree * mt,
break;
}
- DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
- mt->pitch,
- mt->total_height, mt->cpp, mt->pitch * mt->total_height * mt->cpp);
+ DBG("%s: %dx%dx%d\n", __FUNCTION__,
+ mt->total_width, mt->total_height, mt->cpp);
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index a1ab8f8b6d2..ff9ab88c5ab 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -165,7 +165,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
format = translate_texture_format(firstImage->TexFormat,
firstImage->InternalFormat,
tObj->DepthMode);
- pitch = intelObj->mt->pitch * intelObj->mt->cpp;
+ pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
state[I915_TEXREG_MS3] =
(((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |
diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index fb191fe346f..9449a158dc6 100644
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -251,7 +251,7 @@ void intel_flush_prim(struct intel_context *intel)
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
- assert((offset & !S0_VB_OFFSET_MASK) == 0);
+ assert((offset & ~S0_VB_OFFSET_MASK) == 0);
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, offset);
OUT_BATCH((intel->vertex_size << S1_VERTEX_WIDTH_SHIFT) |
(intel->vertex_size << S1_VERTEX_PITCH_SHIFT));
@@ -270,7 +270,7 @@ void intel_flush_prim(struct intel_context *intel)
OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
/* S0 */
- assert((offset & !S0_VB_OFFSET_MASK_830) == 0);
+ assert((offset & ~S0_VB_OFFSET_MASK_830) == 0);
OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
offset | (intel->vertex_size << S0_VB_PITCH_SHIFT_830) |
S0_VB_ENABLE_830);
@@ -488,9 +488,9 @@ intel_wpos_triangle(struct intel_context *intel,
__memcpy(v1_wpos, v1, size);
__memcpy(v2_wpos, v2, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
- v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
- v2_wpos[1] = -v2_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v1_wpos[1] = -v1_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v2_wpos[1] = -v2_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_triangle(intel, v0, v1, v2);
@@ -509,8 +509,8 @@ intel_wpos_line(struct intel_context *intel,
__memcpy(v0_wpos, v0, size);
__memcpy(v1_wpos, v1, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
- v1_wpos[1] = -v1_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
+ v1_wpos[1] = -v1_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_line(intel, v0, v1);
}
@@ -524,7 +524,7 @@ intel_wpos_point(struct intel_context *intel, intelVertexPtr v0)
GLfloat *v0_wpos = (GLfloat *)((char *)v0 + offset);
__memcpy(v0_wpos, v0, size);
- v0_wpos[1] = -v0_wpos[1] + intel->driDrawable->h;
+ v0_wpos[1] = -v0_wpos[1] + intel->ctx.DrawBuffer->Height;
intel_draw_point(intel, v0);
}
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 984e56d00c8..6fe574b22e2 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -831,8 +831,8 @@
#define CMD_URB 0x7805 /* GEN6+ */
# define GEN6_URB_VS_SIZE_SHIFT 16
# define GEN6_URB_VS_ENTRIES_SHIFT 0
-# define GEN6_URB_GS_SIZE_SHIFT 8
-# define GEN6_URB_GS_ENTRIES_SHIFT 0
+# define GEN6_URB_GS_ENTRIES_SHIFT 8
+# define GEN6_URB_GS_SIZE_SHIFT 0
#define CMD_VIEWPORT_STATE_POINTERS 0x780d /* GEN6+ */
# define GEN6_CC_VIEWPORT_MODIFY (1 << 12)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index ad61770212c..db3fc50a63b 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -57,6 +57,7 @@ struct {
[BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 },
[BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 },
[BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 },
+ [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 },
[BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 },
[BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 },
@@ -797,7 +798,11 @@ int brw_disasm (FILE *file, struct brw_instruction *inst)
err |= control (file, "saturate", saturate, inst->header.saturate, NULL);
err |= control (file, "debug control", debug_ctrl, inst->header.debug_control, NULL);
- if (inst->header.opcode != BRW_OPCODE_SEND)
+ if (inst->header.opcode == BRW_OPCODE_MATH) {
+ string (file, " ");
+ err |= control (file, "function", math_function,
+ inst->header.destreg__conditionalmod, NULL);
+ } else if (inst->header.opcode != BRW_OPCODE_SEND)
err |= control (file, "conditional modifier", conditional_modifier,
inst->header.destreg__conditionalmod, NULL);
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index d2395dec288..c33c3def304 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1416,7 +1416,10 @@ void brw_urb_WRITE(struct brw_compile *p,
* and the first message register index comes from src0.
*/
if (intel->gen >= 6) {
+ brw_push_insn_state(p);
+ brw_set_mask_control( p, BRW_MASK_DISABLE );
brw_MOV(p, brw_message_reg(msg_reg_nr), src0);
+ brw_pop_insn_state(p);
src0 = brw_message_reg(msg_reg_nr);
}
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 09edfd81fde..b1f56a8e648 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -58,12 +58,12 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
GLuint qpitch = 0;
GLuint y_pitch = 0;
- mt->pitch = mt->width0;
+ mt->total_width = mt->width0;
intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
y_pitch = ALIGN(height, align_h);
if (mt->compressed) {
- mt->pitch = ALIGN(mt->width0, align_w);
+ mt->total_width = ALIGN(mt->width0, align_w);
}
if (mt->first_level != mt->last_level) {
@@ -77,13 +77,11 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
+ minify(minify(mt->width0));
}
- if (mip1_width > mt->pitch) {
- mt->pitch = mip1_width;
+ if (mip1_width > mt->total_width) {
+ mt->total_width = mip1_width;
}
}
- mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch);
-
if (mt->compressed) {
qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4;
mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6;
@@ -137,10 +135,10 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
if (mt->compressed) {
- mt->pitch = ALIGN(width, align_w);
+ mt->total_width = ALIGN(width, align_w);
pack_y_pitch = (height + 3) / 4;
} else {
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
+ mt->total_width = mt->width0;
pack_y_pitch = ALIGN(mt->height0, align_h);
}
@@ -184,7 +182,7 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
if (pack_x_pitch > 4) {
pack_x_pitch >>= 1;
pack_x_nr <<= 1;
- assert(pack_x_pitch * pack_x_nr <= mt->pitch);
+ assert(pack_x_pitch * pack_x_nr <= mt->total_width);
}
if (pack_y_pitch > 2) {
@@ -211,11 +209,8 @@ GLboolean brw_miptree_layout(struct intel_context *intel,
i945_miptree_layout_2d(intel, mt, tiling);
break;
}
- DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
- mt->pitch,
- mt->total_height,
- mt->cpp,
- mt->pitch * mt->total_height * mt->cpp );
+ DBG("%s: %dx%dx%d\n", __FUNCTION__,
+ mt->total_width, mt->total_height, mt->cpp);
return GL_TRUE;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index d16e916832e..227261409c4 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -384,8 +384,9 @@ static void emit_sop( struct brw_vs_compile *c,
{
struct brw_compile *p = &c->func;
- brw_CMP(p, brw_null_reg(), cond, arg1, arg0);
- brw_SEL(p, dst, brw_null_reg(), brw_imm_f(1.0f));
+ brw_MOV(p, dst, brw_imm_f(0.0f));
+ brw_CMP(p, brw_null_reg(), cond, arg0, arg1);
+ brw_MOV(p, dst, brw_imm_f(1.0f));
brw_set_predicate_control_flag_value(p, 0xff);
}
@@ -1360,31 +1361,6 @@ static void emit_vertex_write( struct brw_vs_compile *c)
}
}
-
-/**
- * Called after code generation to resolve subroutine calls and the
- * END instruction.
- * \param end_inst points to brw code for END instruction
- * \param last_inst points to last instruction emitted before vertex write
- */
-static void
-post_vs_emit( struct brw_vs_compile *c,
- struct brw_instruction *end_inst,
- struct brw_instruction *last_inst )
-{
- GLint offset;
-
- brw_resolve_cals(&c->func);
-
- /* patch up the END code to jump past subroutines, etc */
- offset = last_inst - end_inst;
- if (offset > 1) {
- brw_set_src1(end_inst, brw_imm_d(offset * 16));
- } else {
- end_inst->header.opcode = BRW_OPCODE_NOP;
- }
-}
-
static GLboolean
accumulator_contains(struct brw_vs_compile *c, struct brw_reg val)
{
@@ -1465,8 +1441,6 @@ void brw_vs_emit(struct brw_vs_compile *c )
struct intel_context *intel = &brw->intel;
const GLuint nr_insns = c->vp->program.Base.NumInstructions;
GLuint insn, if_depth = 0, loop_depth = 0;
- GLuint end_offset = 0;
- struct brw_instruction *end_inst, *last_inst;
struct brw_instruction *if_inst[MAX_IF_DEPTH], *loop_inst[MAX_LOOP_DEPTH] = { 0 };
const struct brw_indirect stack_index = brw_indirect(0, 0);
GLuint index;
@@ -1750,12 +1724,8 @@ void brw_vs_emit(struct brw_vs_compile *c )
brw_MOV(p, brw_ip_reg(), deref_1d(stack_index, 0));
brw_set_access_mode(p, BRW_ALIGN_16);
break;
- case OPCODE_END:
- end_offset = p->nr_insn;
- /* this instruction will get patched later to jump past subroutine
- * code, etc.
- */
- brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
+ case OPCODE_END:
+ emit_vertex_write(c);
break;
case OPCODE_PRINT:
/* no-op */
@@ -1816,13 +1786,7 @@ void brw_vs_emit(struct brw_vs_compile *c )
release_tmps(c);
}
- end_inst = &p->store[end_offset];
- last_inst = &p->store[p->nr_insn];
-
- /* The END instruction will be patched to jump to this code */
- emit_vertex_write(c);
-
- post_vs_emit(c, end_inst, last_inst);
+ brw_resolve_cals(p);
brw_optimize(p);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 47b764d24d1..5aade1c4e69 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -286,7 +286,7 @@ void brw_wm_pass0( struct brw_wm_compile *c );
void brw_wm_pass1( struct brw_wm_compile *c );
void brw_wm_pass2( struct brw_wm_compile *c );
void brw_wm_emit( struct brw_wm_compile *c );
-
+GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
void brw_wm_print_value( struct brw_wm_compile *c,
struct brw_wm_value *value );
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 05e464d4b61..f79de5dbffc 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -61,6 +61,44 @@ static INLINE struct brw_reg sechalf( struct brw_reg reg )
return reg;
}
+/* Return the SrcReg index of the channels that can be immediate float operands
+ * instead of usage of PROGRAM_CONSTANT values through push/pull.
+ */
+GLboolean
+brw_wm_arg_can_be_immediate(enum prog_opcode opcode, int arg)
+{
+ int opcode_array[] = {
+ [OPCODE_ADD] = 2,
+ [OPCODE_CMP] = 3,
+ [OPCODE_DP3] = 2,
+ [OPCODE_DP4] = 2,
+ [OPCODE_DPH] = 2,
+ [OPCODE_MAX] = 2,
+ [OPCODE_MIN] = 2,
+ [OPCODE_MOV] = 1,
+ [OPCODE_MUL] = 2,
+ [OPCODE_SEQ] = 2,
+ [OPCODE_SGE] = 2,
+ [OPCODE_SGT] = 2,
+ [OPCODE_SLE] = 2,
+ [OPCODE_SLT] = 2,
+ [OPCODE_SNE] = 2,
+ [OPCODE_XPD] = 2,
+ };
+
+ /* These opcodes get broken down in a way that allow two
+ * args to be immediates.
+ */
+ if (opcode == OPCODE_MAD || opcode == OPCODE_LRP) {
+ if (arg == 1 || arg == 2)
+ return GL_TRUE;
+ }
+
+ if (opcode > ARRAY_SIZE(opcode_array))
+ return GL_FALSE;
+
+ return arg == opcode_array[opcode] - 1;
+}
/**
* Computes the screen-space x,y position of the pixels.
@@ -545,8 +583,11 @@ void emit_sop(struct brw_compile *p,
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
brw_push_insn_state(p);
- brw_CMP(p, brw_null_reg(), cond, arg1[i], arg0[i]);
- brw_SEL(p, dst[i], brw_null_reg(), brw_imm_f(1.0));
+ brw_CMP(p, brw_null_reg(), cond, arg0[i], arg1[i]);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+ brw_MOV(p, dst[i], brw_imm_f(0));
+ brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
+ brw_MOV(p, dst[i], brw_imm_f(1.0));
brw_pop_insn_state(p);
}
}
@@ -617,14 +658,10 @@ void emit_cmp(struct brw_compile *p,
for (i = 0; i < 4; i++) {
if (mask & (1<<i)) {
- brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
- brw_MOV(p, dst[i], arg2[i]);
- brw_set_saturate(p, 0);
-
brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, arg0[i], brw_imm_f(0));
brw_set_saturate(p, (mask & SATURATE) ? 1 : 0);
- brw_MOV(p, dst[i], arg1[i]);
+ brw_SEL(p, dst[i], arg1[i], arg2[i]);
brw_set_saturate(p, 0);
brw_set_predicate_control_flag_value(p, 0xff);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 0b66cc6c9f3..3b7e421b16a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -23,6 +23,9 @@ GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp)
{
int i;
+ if (INTEL_DEBUG & DEBUG_GLSL_FORCE)
+ return GL_TRUE;
+
for (i = 0; i < fp->Base.NumInstructions; i++) {
const struct prog_instruction *inst = &fp->Base.Instructions[i];
switch (inst->Opcode) {
@@ -567,12 +570,35 @@ static struct brw_reg get_src_reg(struct brw_wm_compile *c,
const GLuint nr = 1;
const GLuint component = GET_SWZ(src->Swizzle, channel);
- /* Extended swizzle terms */
- if (component == SWIZZLE_ZERO) {
- return brw_imm_f(0.0F);
- }
- else if (component == SWIZZLE_ONE) {
- return brw_imm_f(1.0F);
+ /* Only one immediate value can be used per native opcode, and it
+ * has be in the src1 slot, so not all Mesa instructions will get
+ * to take advantage of immediate constants.
+ */
+ if (brw_wm_arg_can_be_immediate(inst->Opcode, srcRegIndex)) {
+ const struct gl_program_parameter_list *params;
+
+ params = c->fp->program.Base.Parameters;
+
+ /* Extended swizzle terms */
+ if (component == SWIZZLE_ZERO) {
+ return brw_imm_f(0.0F);
+ } else if (component == SWIZZLE_ONE) {
+ if (src->Negate)
+ return brw_imm_f(-1.0F);
+ else
+ return brw_imm_f(1.0F);
+ }
+
+ if (src->File == PROGRAM_CONSTANT) {
+ float f = params->ParameterValues[src->Index][component];
+
+ if (src->Abs)
+ f = fabs(f);
+ if (src->Negate)
+ f = -f;
+
+ return brw_imm_f(f);
+ }
}
if (c->fp->use_const_buffer &&
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index ce0bf0b97d2..6b9e5668862 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -261,7 +261,7 @@ brw_update_texture_surface( GLcontext *ctx, GLuint unit )
key.format = firstImage->TexFormat;
key.internal_format = firstImage->InternalFormat;
- key.pitch = intelObj->mt->pitch;
+ key.pitch = intelObj->mt->region->pitch;
key.depth = firstImage->Depth;
key.bo = intelObj->mt->region->buffer;
key.offset = 0;
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index 06f8145e32d..acc4b7f1019 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -55,7 +55,7 @@ upload_clip_state(struct brw_context *brw)
OUT_BATCH(GEN6_CLIP_STATISTICS_ENABLE);
OUT_BATCH(GEN6_CLIP_ENABLE |
GEN6_CLIP_API_OGL |
- GEN6_CLIP_MODE_REJECT_ALL | /* XXX: debug: get VS working */
+ GEN6_CLIP_MODE_NORMAL |
GEN6_CLIP_XY_TEST |
depth_clamp |
provoking);
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index 161e7b85c28..cefc93ba48b 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -50,7 +50,8 @@ upload_gs_state(struct brw_context *brw)
BEGIN_BATCH(7);
OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
OUT_RELOC(brw->gs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
- OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
+ OUT_BATCH(GEN6_GS_SPF_MODE |
+ (0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
(0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
OUT_BATCH(0); /* scratch space base offset */
OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index fe597dfb945..5916a139946 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -100,7 +100,8 @@ upload_vs_state(struct brw_context *brw)
(brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
(0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
- GEN6_VS_STATISTICS_ENABLE);
+ GEN6_VS_STATISTICS_ENABLE |
+ GEN6_VS_ENABLE);
ADVANCE_BATCH();
intel_batchbuffer_emit_mi_flush(intel->batch);
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index f2769aa3e8c..167140d274a 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -119,24 +119,8 @@ intelEmitCopyBlit(struct intel_context *intel,
break;
} while (pass < 2);
- intel_prepare_render(intel);
-
- if (pass >= 2) {
- drm_intel_gem_bo_map_gtt(dst_buffer);
- drm_intel_gem_bo_map_gtt(src_buffer);
- _mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
- cpp,
- dst_pitch,
- dst_x, dst_y,
- w, h,
- (GLubyte *)src_buffer->virtual + src_offset,
- src_pitch,
- src_x, src_y);
- drm_intel_gem_bo_unmap_gtt(src_buffer);
- drm_intel_gem_bo_unmap_gtt(dst_buffer);
-
- return GL_TRUE;
- }
+ if (pass >= 2)
+ return GL_FALSE;
intel_batchbuffer_require_space(intel->batch, 8 * 4);
DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
@@ -482,6 +466,7 @@ intel_emit_linear_blit(struct intel_context *intel,
unsigned int size)
{
GLuint pitch, height;
+ GLboolean ok;
/* Blits are in a different ringbuffer so we don't use them. */
assert(intel->gen < 6);
@@ -489,25 +474,27 @@ intel_emit_linear_blit(struct intel_context *intel,
/* The pitch is a signed value. */
pitch = MIN2(size, (1 << 15) - 1);
height = size / pitch;
- intelEmitCopyBlit(intel, 1,
- pitch, src_bo, src_offset, I915_TILING_NONE,
- pitch, dst_bo, dst_offset, I915_TILING_NONE,
- 0, 0, /* src x/y */
- 0, 0, /* dst x/y */
- pitch, height, /* w, h */
- GL_COPY);
+ ok = intelEmitCopyBlit(intel, 1,
+ pitch, src_bo, src_offset, I915_TILING_NONE,
+ pitch, dst_bo, dst_offset, I915_TILING_NONE,
+ 0, 0, /* src x/y */
+ 0, 0, /* dst x/y */
+ pitch, height, /* w, h */
+ GL_COPY);
+ assert(ok);
src_offset += pitch * height;
dst_offset += pitch * height;
size -= pitch * height;
assert (size < (1 << 15));
if (size != 0) {
- intelEmitCopyBlit(intel, 1,
- size, src_bo, src_offset, I915_TILING_NONE,
- size, dst_bo, dst_offset, I915_TILING_NONE,
- 0, 0, /* src x/y */
- 0, 0, /* dst x/y */
- size, 1, /* w, h */
- GL_COPY);
+ ok = intelEmitCopyBlit(intel, 1,
+ size, src_bo, src_offset, I915_TILING_NONE,
+ size, dst_bo, dst_offset, I915_TILING_NONE,
+ 0, 0, /* src x/y */
+ 0, 0, /* dst x/y */
+ size, 1, /* w, h */
+ GL_COPY);
+ assert(ok);
}
}
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index b10693050a9..0480770ba1d 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -226,7 +226,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
* only changes with _NEW_STENCIL (which seems sensible). So flag it
* here since this is the _NEW_BUFFERS path.
*/
- ctx->NewState |= (_NEW_DEPTH | _NEW_STENCIL);
+ intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
}
intel->vtbl.set_draw_region(intel, colorRegions, depthRegion,
@@ -236,7 +236,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
#ifdef I915
intelCalcViewport(ctx);
#else
- ctx->NewState |= _NEW_VIEWPORT;
+ intel->NewGLState |= _NEW_VIEWPORT;
#endif
/* Set state we know depends on drawable parameters:
*/
@@ -256,7 +256,7 @@ intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
if (ctx->Driver.FrontFace)
ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace);
else
- ctx->NewState |= _NEW_POLYGON;
+ intel->NewGLState |= _NEW_POLYGON;
}
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index d6a1ba69524..9077a611328 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -63,7 +63,7 @@ int INTEL_DEBUG = (0);
#endif
-#define DRIVER_DATE "20091221 DEVELOPMENT"
+#define DRIVER_DATE "20100330 DEVELOPMENT"
#define DRIVER_DATE_GEM "GEM " DRIVER_DATE
@@ -389,7 +389,7 @@ intel_prepare_render(struct intel_context *intel)
__DRIcontext *driContext = intel->driContext;
__DRIdrawable *drawable;
- drawable = intel->driDrawable;
+ drawable = driContext->driDrawablePriv;
if (drawable->dri2.stamp != driContext->dri2.draw_stamp) {
if (drawable->lastStamp != drawable->dri2.stamp)
intel_update_renderbuffers(driContext, drawable);
@@ -397,7 +397,7 @@ intel_prepare_render(struct intel_context *intel)
driContext->dri2.draw_stamp = drawable->dri2.stamp;
}
- drawable = intel->driReadDrawable;
+ drawable = driContext->driReadablePriv;
if (drawable->dri2.stamp != driContext->dri2.read_stamp) {
if (drawable->lastStamp != drawable->dri2.stamp)
intel_update_renderbuffers(driContext, drawable);
@@ -444,6 +444,7 @@ static const struct dri_debug_control debug_control[] = {
{ "sing", DEBUG_SINGLE_THREAD },
{ "thre", DEBUG_SINGLE_THREAD },
{ "wm", DEBUG_WM },
+ { "glsl_force", DEBUG_GLSL_FORCE },
{ "urb", DEBUG_URB },
{ "vs", DEBUG_VS },
{ NULL, 0 }
@@ -471,6 +472,7 @@ void
intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
{
struct intel_context *intel = intel_context(ctx);
+ __DRIcontext *driContext = intel->driContext;
if (intel->Fallback)
_swrast_flush(ctx);
@@ -487,9 +489,10 @@ intel_flush(GLcontext *ctx, GLboolean needs_mi_flush)
if (screen->dri2.loader &&
(screen->dri2.loader->base.version >= 2)
&& (screen->dri2.loader->flushFrontBuffer != NULL) &&
- intel->driDrawable && intel->driDrawable->loaderPrivate) {
- (*screen->dri2.loader->flushFrontBuffer)(intel->driDrawable,
- intel->driDrawable->loaderPrivate);
+ driContext->driDrawablePriv &&
+ driContext->driDrawablePriv->loaderPrivate) {
+ (*screen->dri2.loader->flushFrontBuffer)(driContext->driDrawablePriv,
+ driContext->driDrawablePriv->loaderPrivate);
/* Only clear the dirty bit if front-buffer rendering is no longer
* enabled. This is done so that the dirty bit can only be set in
@@ -606,7 +609,6 @@ intelInitContext(struct intel_context *intel,
driContextPriv->driverPrivate = intel;
intel->intelScreen = intelScreen;
- intel->driScreen = sPriv;
intel->driContext = driContextPriv;
intel->driFd = sPriv->fd;
@@ -635,8 +637,7 @@ intelInitContext(struct intel_context *intel,
}
driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
- intel->driScreen->myNum,
- (intel->gen >= 4) ? "i965" : "i915");
+ sPriv->myNum, (intel->gen >= 4) ? "i965" : "i915");
if (intelScreen->deviceID == PCI_CHIP_I865_G)
intel->maxBatchSize = 4096;
else
@@ -844,14 +845,6 @@ intelDestroyContext(__DRIcontext * driContextPriv)
GLboolean
intelUnbindContext(__DRIcontext * driContextPriv)
{
- struct intel_context *intel =
- (struct intel_context *) driContextPriv->driverPrivate;
-
- /* Deassociate the context with the drawables.
- */
- intel->driDrawable = NULL;
- intel->driReadDrawable = NULL;
-
return GL_TRUE;
}
@@ -880,12 +873,10 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
struct gl_framebuffer *readFb = driReadPriv->driverPrivate;
- _mesa_make_current(&intel->ctx, fb, readFb);
- intel->driReadDrawable = driReadPriv;
- intel->driDrawable = driDrawPriv;
driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
intel_prepare_render(intel);
+ _mesa_make_current(&intel->ctx, fb, readFb);
}
else {
_mesa_make_current(NULL, NULL, NULL);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 22736a93279..c4bb2bed8e0 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -243,9 +243,6 @@ struct intel_context
int driFd;
__DRIcontext *driContext;
- __DRIdrawable *driDrawable;
- __DRIdrawable *driReadDrawable;
- __DRIscreen *driScreen;
struct intel_screen *intelScreen;
/**
@@ -342,6 +339,7 @@ extern int INTEL_DEBUG;
#define DEBUG_WM 0x800000
#define DEBUG_URB 0x1000000
#define DEBUG_VS 0x2000000
+#define DEBUG_GLSL_FORCE 0x4000000
#define DBG(...) do { \
if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index a429f8d003d..8278d12bb90 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -104,7 +104,6 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
struct intel_context *intel = intel_context(ctx);
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
int cpp;
- GLuint pitch;
ASSERT(rb->Name != 0);
@@ -176,15 +175,11 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
/* allocate new memory region/renderbuffer */
- /* Choose a pitch to match hardware requirements:
- */
- pitch = ((cpp * width + 63) & ~63) / cpp;
-
/* alloc hardware renderbuffer */
- DBG("Allocating %d x %d Intel RBO (pitch %d)\n", width, height, pitch);
+ DBG("Allocating %d x %d Intel RBO\n", width, height);
irb->region = intel_region_alloc(intel, I915_TILING_NONE, cpp,
- width, height, pitch, GL_TRUE);
+ width, height, GL_TRUE);
if (!irb->region)
return GL_FALSE; /* out of memory? */
@@ -573,7 +568,7 @@ intel_render_texture(GLcontext * ctx,
att->Zoffset,
&dst_x, &dst_y);
- intel_image->mt->region->draw_offset = (dst_y * intel_image->mt->pitch +
+ intel_image->mt->region->draw_offset = (dst_y * intel_image->mt->region->pitch +
dst_x) * intel_image->mt->cpp;
intel_image->mt->region->draw_x = dst_x;
intel_image->mt->region->draw_y = dst_y;
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 4f14946ec72..ef1966ea7e1 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -83,7 +83,6 @@ intel_miptree_create_internal(struct intel_context *intel,
mt->cpp = compress_byte ? compress_byte : cpp;
mt->compressed = compress_byte ? 1 : 0;
mt->refcount = 1;
- mt->pitch = 0;
#ifdef I915
if (intel->is_945)
@@ -136,7 +135,7 @@ intel_miptree_create(struct intel_context *intel,
/*
* pitch == 0 || height == 0 indicates the null texture
*/
- if (!mt || !mt->pitch || !mt->total_height) {
+ if (!mt || !mt->total_height) {
free(mt);
return NULL;
}
@@ -144,9 +143,8 @@ intel_miptree_create(struct intel_context *intel,
mt->region = intel_region_alloc(intel,
tiling,
mt->cpp,
- mt->pitch,
+ mt->total_width,
mt->total_height,
- mt->pitch,
expect_accelerated_upload);
if (!mt->region) {
@@ -177,81 +175,12 @@ intel_miptree_create_for_region(struct intel_context *intel,
I915_TILING_NONE);
if (!mt)
return mt;
-#if 0
- if (mt->pitch != region->pitch) {
- fprintf(stderr,
- "region pitch (%d) doesn't match mipmap tree pitch (%d)\n",
- region->pitch, mt->pitch);
- free(mt);
- return NULL;
- }
-#else
- /* The mipmap tree pitch is aligned to 64 bytes to make sure render
- * to texture works, but we don't need that for texturing from a
- * pixmap. Just override it here. */
- mt->pitch = region->pitch;
-#endif
intel_region_reference(&mt->region, region);
return mt;
}
-
-/**
- * intel_miptree_pitch_align:
- *
- * @intel: intel context pointer
- *
- * @mt: the miptree to compute pitch alignment for
- *
- * @pitch: the natural pitch value
- *
- * Given @pitch, compute a larger value which accounts for
- * any necessary alignment required by the device
- */
-int intel_miptree_pitch_align (struct intel_context *intel,
- struct intel_mipmap_tree *mt,
- uint32_t tiling,
- int pitch)
-{
-#ifdef I915
- GLcontext *ctx = &intel->ctx;
-#endif
-
- if (!mt->compressed) {
- int pitch_align;
-
- /* XXX: Align pitch to multiple of 64 bytes for now to allow
- * render-to-texture to work in all cases. This should probably be
- * replaced at some point by some scheme to only do this when really
- * necessary.
- */
- pitch_align = 64;
-
- if (tiling == I915_TILING_X)
- pitch_align = 512;
- else if (tiling == I915_TILING_Y)
- pitch_align = 128;
-
- pitch = ALIGN(pitch * mt->cpp, pitch_align);
-
-#ifdef I915
- /* Do a little adjustment to linear allocations so that we avoid
- * hitting the same channel of memory for 2 different pages when
- * reading a 2x2 subspan or doing bilinear filtering.
- */
- if (tiling == I915_TILING_NONE && !(pitch & 511) &&
- (pitch + pitch_align) < (1 << ctx->Const.MaxTextureLevels))
- pitch += pitch_align;
-#endif
-
- pitch /= mt->cpp;
- }
- return pitch;
-}
-
-
void
intel_miptree_reference(struct intel_mipmap_tree **dst,
struct intel_mipmap_tree *src)
@@ -351,13 +280,12 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt,
mt->level[level].width = w;
mt->level[level].height = h;
mt->level[level].depth = d;
- mt->level[level].level_offset = (x + y * mt->pitch) * mt->cpp;
mt->level[level].level_x = x;
mt->level[level].level_y = y;
mt->level[level].nr_images = nr_images;
- DBG("%s level %d size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
- level, w, h, d, x, y, mt->level[level].level_offset);
+ DBG("%s level %d size: %d,%d,%d offset %d,%d\n", __FUNCTION__,
+ level, w, h, d, x, y);
assert(nr_images);
assert(!mt->level[level].x_offset);
@@ -424,7 +352,7 @@ intel_miptree_image_map(struct intel_context * intel,
DBG("%s \n", __FUNCTION__);
if (row_stride)
- *row_stride = mt->pitch * mt->cpp;
+ *row_stride = mt->region->pitch * mt->cpp;
if (mt->target == GL_TEXTURE_3D) {
int i;
@@ -433,7 +361,7 @@ intel_miptree_image_map(struct intel_context * intel,
intel_miptree_get_image_offset(mt, level, face, i,
&x, &y);
- image_offsets[i] = x + y * mt->pitch;
+ image_offsets[i] = x + y * mt->region->pitch;
}
return intel_region_map(intel, mt->region);
@@ -444,7 +372,7 @@ intel_miptree_image_map(struct intel_context * intel,
image_offsets[0] = 0;
return intel_region_map(intel, mt->region) +
- (x + y * mt->pitch) * mt->cpp;
+ (x + y * mt->region->pitch) * mt->cpp;
}
}
@@ -520,12 +448,15 @@ intel_miptree_image_copy(struct intel_context *intel,
width = ALIGN(width, align_w);
}
+ intel_prepare_render(intel);
+
for (i = 0; i < depth; i++) {
intel_miptree_get_image_offset(src, level, face, i, &src_x, &src_y);
intel_miptree_get_image_offset(dst, level, face, i, &dst_x, &dst_y);
success = intel_region_copy(intel,
dst->region, 0, dst_x, dst_y,
- src->region, 0, src_x, src_y, width, height,
+ src->region, 0, src_x, src_y,
+ width, height, GL_FALSE,
GL_COPY);
if (!success) {
GLubyte *src_ptr, *dst_ptr;
@@ -533,13 +464,13 @@ intel_miptree_image_copy(struct intel_context *intel,
src_ptr = intel_region_map(intel, src->region);
dst_ptr = intel_region_map(intel, dst->region);
- _mesa_copy_rect(dst_ptr + dst->cpp * (dst_x + dst_y * dst->pitch),
+ _mesa_copy_rect(dst_ptr,
dst->cpp,
- dst->pitch,
- 0, 0, width, height,
- src_ptr + src->cpp * (src_x + src_y * src->pitch),
- src->pitch,
- 0, 0);
+ dst->region->pitch,
+ dst_x, dst_y, width, height,
+ src_ptr,
+ src->region->pitch,
+ src_x, src_y);
intel_region_unmap(intel, src->region);
intel_region_unmap(intel, dst->region);
}
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index b19c548def3..21db2f4d3b3 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -62,14 +62,6 @@
*/
struct intel_mipmap_level
{
- /**
- * Byte offset to the base of this level.
- *
- * This is used for mipmap levels of 1D/2D/3D textures. However, CUBE
- * layouts spread images around the whole tree, so the level offset is
- * always zero in that case.
- */
- GLuint level_offset;
/** Offset to this miptree level, used in computing x_offset. */
GLuint level_x;
/** Offset to this miptree level, used in computing y_offset. */
@@ -81,8 +73,8 @@ struct intel_mipmap_level
/** Number of images at this level: 1 for 1D/2D, 6 for CUBE, depth for 3D */
GLuint nr_images;
- /**
- * Byte offset from level_offset to the image for each cube face or depth
+ /** @{
+ * offsets from level_[xy] to the image for each cube face or depth
* level.
*
* Pretty much have to accept that hardware formats
@@ -91,6 +83,7 @@ struct intel_mipmap_level
* so have to store them as a lookup table.
*/
GLuint *x_offset, *y_offset;
+ /** @} */
};
struct intel_mipmap_tree
@@ -109,8 +102,7 @@ struct intel_mipmap_tree
/* Derived from the above:
*/
- GLuint pitch;
- GLuint depth_pitch; /* per-image on i945? */
+ GLuint total_width;
GLuint total_height;
/* Includes image offset tables:
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_copy.c b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
index f4f3fd6d889..56faf076c7e 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_copy.c
@@ -108,14 +108,15 @@ do_blit_copypixels(GLcontext * ctx,
GLint dstx, GLint dsty, GLenum type)
{
struct intel_context *intel = intel_context(ctx);
- struct intel_region *dst = intel_drawbuf_region(intel);
- struct intel_region *src = copypix_src_region(intel, type);
+ struct intel_region *dst;
+ struct intel_region *src;
struct gl_framebuffer *fb = ctx->DrawBuffer;
struct gl_framebuffer *read_fb = ctx->ReadBuffer;
GLint orig_dstx;
GLint orig_dsty;
GLint orig_srcx;
GLint orig_srcy;
+ GLboolean flip = GL_FALSE;
if (type == GL_DEPTH || type == GL_STENCIL) {
if (INTEL_DEBUG & DEBUG_FALLBACKS)
@@ -133,15 +134,16 @@ do_blit_copypixels(GLcontext * ctx,
ctx->Pixel.ZoomX != 1.0F || ctx->Pixel.ZoomY != 1.0F)
return GL_FALSE;
+ intel_prepare_render(intel);
+
+ dst = intel_drawbuf_region(intel);
+ src = copypix_src_region(intel, type);
+
if (!src || !dst)
return GL_FALSE;
intelFlush(&intel->ctx);
- intel_prepare_render(intel);
-
- /* XXX: We fail to handle different inversion between read and draw framebuffer. */
-
/* Clip to destination buffer. */
orig_dstx = dstx;
orig_dsty = dsty;
@@ -164,23 +166,23 @@ do_blit_copypixels(GLcontext * ctx,
dstx += srcx - orig_srcx;
dsty += srcy - orig_srcy;
- /* Convert from GL to hardware coordinates: */
+ /* Flip dest Y if it's a window system framebuffer. */
if (fb->Name == 0) {
- /* copypixels to a system framebuffer */
+ /* copypixels to a window system framebuffer */
dsty = fb->Height - dsty - height;
- } else {
- /* copypixels to a user framebuffer object */
- dsty = dsty;
+ flip = !flip;
}
- /* Flip source Y if it's a system framebuffer. */
- if (read_fb->Name == 0)
- srcy = fb->Height - srcy - height;
+ /* Flip source Y if it's a window system framebuffer. */
+ if (read_fb->Name == 0) {
+ srcy = read_fb->Height - srcy - height;
+ flip = !flip;
+ }
if (!intel_region_copy(intel,
dst, 0, dstx, dsty,
src, 0, srcx, srcy,
- width, height,
+ width, height, flip,
ctx->Color.ColorLogicOpEnabled ?
ctx->Color.LogicOp : GL_COPY)) {
DBG("%s: blit failure\n", __FUNCTION__);
diff --git a/src/mesa/drivers/dri/intel/intel_reg.h b/src/mesa/drivers/dri/intel/intel_reg.h
index d19f1bae34c..36d8180598e 100644
--- a/src/mesa/drivers/dri/intel/intel_reg.h
+++ b/src/mesa/drivers/dri/intel/intel_reg.h
@@ -70,8 +70,10 @@
/** @{
* 915 definitions
+ *
+ * 915 documents say that bits 31:28 and 1 are "undefined, must be zero."
*/
-#define S0_VB_OFFSET_MASK 0xffffffc0
+#define S0_VB_OFFSET_MASK 0x0ffffffc
#define S0_AUTO_CACHE_INV_DISABLE (1<<0)
/** @} */
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index f042bcbc28c..1172de90b13 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -164,7 +164,6 @@ intel_region_alloc_internal(struct intel_context *intel,
/* Default to no tiling */
region->tiling = I915_TILING_NONE;
- region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE;
_DBG("%s <-- %p\n", __FUNCTION__, region);
return region;
@@ -173,7 +172,7 @@ intel_region_alloc_internal(struct intel_context *intel,
struct intel_region *
intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
- GLuint cpp, GLuint width, GLuint height, GLuint pitch,
+ GLuint cpp, GLuint width, GLuint height,
GLboolean expect_accelerated_upload)
{
dri_bo *buffer;
@@ -187,19 +186,10 @@ intel_region_alloc(struct intel_context *intel,
buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "region",
width, height, cpp,
&tiling, &aligned_pitch, flags);
- /* We've already chosen a pitch as part of miptree layout. It had
- * better be the same.
- */
- assert(aligned_pitch == pitch * cpp);
region = intel_region_alloc_internal(intel, cpp, width, height,
- pitch, buffer);
-
- if (tiling != I915_TILING_NONE) {
- assert(((pitch * cpp) & 127) == 0);
- drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp);
- drm_intel_bo_get_tiling(buffer, &region->tiling, &region->bit_6_swizzle);
- }
+ aligned_pitch / cpp, buffer);
+ region->tiling = tiling;
return region;
}
@@ -213,6 +203,7 @@ intel_region_alloc_for_handle(struct intel_context *intel,
struct intel_region *region, *dummy;
dri_bo *buffer;
int ret;
+ uint32_t bit_6_swizzle;
region = _mesa_HashLookup(intel->intelScreen->named_regions, handle);
if (region != NULL) {
@@ -236,7 +227,7 @@ intel_region_alloc_for_handle(struct intel_context *intel,
return region;
ret = dri_bo_get_tiling(region->buffer, &region->tiling,
- &region->bit_6_swizzle);
+ &bit_6_swizzle);
if (ret != 0) {
fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n",
handle, name, strerror(-ret));
@@ -316,7 +307,7 @@ _mesa_copy_rect(GLubyte * dst,
dst += dst_x * cpp;
src += src_x * cpp;
dst += dst_y * dst_pitch;
- src += src_y * dst_pitch;
+ src += src_y * src_pitch;
width *= cpp;
if (width == dst_pitch && width == src_pitch)
@@ -380,8 +371,11 @@ intel_region_copy(struct intel_context *intel,
struct intel_region *src,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height,
+ GLboolean flip,
GLenum logicop)
{
+ uint32_t src_pitch = src->pitch;
+
_DBG("%s\n", __FUNCTION__);
if (intel == NULL)
@@ -397,9 +391,12 @@ intel_region_copy(struct intel_context *intel,
assert(src->cpp == dst->cpp);
+ if (flip)
+ src_pitch = -src_pitch;
+
return intelEmitCopyBlit(intel,
dst->cpp,
- src->pitch, src->buffer, src_offset, src->tiling,
+ src_pitch, src->buffer, src_offset, src->tiling,
dst->pitch, dst->buffer, dst_offset, dst->tiling,
srcx, srcy, dstx, dsty, width, height,
logicop);
diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h
index 7ee6a988eae..2459c9a924d 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.h
+++ b/src/mesa/drivers/dri/intel/intel_regions.h
@@ -65,7 +65,6 @@ struct intel_region
GLuint draw_x, draw_y; /**< Offset of drawing within the region */
uint32_t tiling; /**< Which tiling mode the region is in */
- uint32_t bit_6_swizzle; /**< GEM flag for address swizzling requirement */
struct intel_buffer_object *pbo; /* zero-copy uploads */
uint32_t name; /**< Global name for the bo */
@@ -79,7 +78,7 @@ struct intel_region
struct intel_region *intel_region_alloc(struct intel_context *intel,
uint32_t tiling,
GLuint cpp, GLuint width,
- GLuint height, GLuint pitch,
+ GLuint height,
GLboolean expect_accelerated_upload);
struct intel_region *
@@ -122,6 +121,7 @@ intel_region_copy(struct intel_context *intel,
struct intel_region *src,
GLuint src_offset,
GLuint srcx, GLuint srcy, GLuint width, GLuint height,
+ GLboolean flip,
GLenum logicop);
/* Helpers for zerocopy uploads, particularly texture image uploads:
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c
index 6e4bb643651..5e3f40836d0 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -312,18 +312,13 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
}
if (mesaVis->depthBits == 24) {
- if (mesaVis->stencilBits == 8) {
- /* combined depth/stencil buffer */
- struct intel_renderbuffer *depthStencilRb
- = intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
- /* note: bind RB to two attachment points */
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base);
- _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base);
- } else {
- struct intel_renderbuffer *depthRb
- = intel_create_renderbuffer(MESA_FORMAT_X8_Z24);
- _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base);
- }
+ assert(mesaVis->stencilBits == 8);
+ /* combined depth/stencil buffer */
+ struct intel_renderbuffer *depthStencilRb
+ = intel_create_renderbuffer(MESA_FORMAT_S8_Z24);
+ /* note: bind RB to two attachment points */
+ _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthStencilRb->Base);
+ _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &depthStencilRb->Base);
}
else if (mesaVis->depthBits == 16) {
/* just 16-bit depth buffer, no hw stencil */
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index fb5c01bc4dc..c1e15d1b0f2 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -48,11 +48,11 @@ intel_set_span_functions(struct intel_context *intel,
#define LOCAL_VARS \
struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
- const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1; \
- const GLint yBias = ctx->DrawBuffer->Name ? 0 : irb->Base.Height - 1;\
+ const GLint yScale = rb->Name ? 1 : -1; \
+ const GLint yBias = rb->Name ? 0 : rb->Height - 1; \
int minx = 0, miny = 0; \
- int maxx = ctx->DrawBuffer->Width; \
- int maxy = ctx->DrawBuffer->Height; \
+ int maxx = rb->Width; \
+ int maxy = rb->Height; \
int pitch = irb->region->pitch * irb->region->cpp; \
void *buf = irb->region->buffer->virtual; \
GLuint p; \
@@ -108,11 +108,11 @@ intel_set_span_functions(struct intel_context *intel,
#define LOCAL_DEPTH_VARS \
struct intel_renderbuffer *irb = intel_renderbuffer(rb); \
- const GLint yScale = ctx->DrawBuffer->Name ? 1 : -1; \
- const GLint yBias = ctx->DrawBuffer->Name ? 0 : irb->Base.Height - 1;\
+ const GLint yScale = rb->Name ? 1 : -1; \
+ const GLint yBias = rb->Name ? 0 : rb->Height - 1; \
int minx = 0, miny = 0; \
- int maxx = ctx->DrawBuffer->Width; \
- int maxy = ctx->DrawBuffer->Height; \
+ int maxx = rb->Width; \
+ int maxy = rb->Height; \
int pitch = irb->region->pitch * irb->region->cpp; \
void *buf = irb->region->buffer->virtual; \
(void)buf; (void)pitch; /* unused for non-gttmap. */ \
@@ -134,7 +134,7 @@ intel_set_span_functions(struct intel_context *intel,
(*(uint32_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y)) = d)
#define READ_DEPTH(d, _x, _y) \
d = *(uint32_t *)(irb->region->buffer->virtual + NO_TILE(_x, _y))
-#define TAG(x) intel_##x##_z24_x8
+#define TAG(x) intel_##x##_z24_s8
#include "depthtmp.h"
void
@@ -361,7 +361,7 @@ intel_set_span_functions(struct intel_context *intel,
break;
case MESA_FORMAT_X8_Z24:
case MESA_FORMAT_S8_Z24:
- intel_InitDepthPointers_z24_x8(rb);
+ intel_InitDepthPointers_z24_s8(rb);
break;
default:
_mesa_problem(NULL,
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 13b8bcfa86c..62e1e78f59b 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -130,18 +130,8 @@ do_copy_texsubimage(struct intel_context *intel,
}
if (ctx->ReadBuffer->Name == 0) {
- /* reading from a window, adjust x, y */
- const __DRIdrawable *dPriv = intel->driReadDrawable;
- y = dPriv->y + (dPriv->h - (y + height));
- x += dPriv->x;
-
- /* Invert the data coming from the source rectangle due to GL
- * and hardware disagreeing on where y=0 is.
- *
- * It appears that our offsets and pitches get mangled
- * appropriately by the hardware, and we don't need to adjust them
- * on our own.
- */
+ /* Flip vertical orientation for system framebuffers */
+ y = ctx->ReadBuffer->Height - (y + height);
src_pitch = -src->pitch;
} else {
/* reading from a FBO, y is already oriented the way we like */
@@ -155,7 +145,7 @@ do_copy_texsubimage(struct intel_context *intel,
src->buffer,
0,
src->tiling,
- intelImage->mt->pitch,
+ intelImage->mt->region->pitch,
dst_bo,
0,
intelImage->mt->region->tiling,
diff --git a/src/mesa/drivers/dri/intel/intel_tex_image.c b/src/mesa/drivers/dri/intel/intel_tex_image.c
index bac36eeb569..9db96acdc08 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_image.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_image.c
@@ -236,7 +236,7 @@ try_pbo_upload(struct intel_context *intel,
intelImage->face, 0,
&dst_x, &dst_y);
- dst_stride = intelImage->mt->pitch;
+ dst_stride = intelImage->mt->region->pitch;
if (drm_intel_bo_references(intel->batch->buf, dst_buffer))
intelFlush(&intel->ctx);
@@ -290,7 +290,7 @@ try_pbo_zcopy(struct intel_context *intel,
intelImage->face, 0,
&dst_x, &dst_y);
- dst_stride = intelImage->mt->pitch;
+ dst_stride = intelImage->mt->region->pitch;
if (src_stride != dst_stride || dst_x != 0 || dst_y != 0 ||
src_offset != 0) {
diff --git a/src/mesa/drivers/dri/intel/intel_tex_layout.c b/src/mesa/drivers/dri/intel/intel_tex_layout.c
index 7d69ea4484a..d132e19e831 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_layout.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_layout.c
@@ -74,14 +74,14 @@ void i945_miptree_layout_2d( struct intel_context *intel,
GLuint width = mt->width0;
GLuint height = mt->height0;
- mt->pitch = mt->width0;
+ mt->total_width = mt->width0;
intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
if (mt->compressed) {
- mt->pitch = ALIGN(mt->width0, align_w);
+ mt->total_width = ALIGN(mt->width0, align_w);
}
- /* May need to adjust pitch to accomodate the placement of
+ /* May need to adjust width to accomodate the placement of
* the 2nd mipmap. This occurs when the alignment
* constraints of mipmap placement push the right edge of the
* 2nd mipmap out past the width of its parent.
@@ -97,15 +97,11 @@ void i945_miptree_layout_2d( struct intel_context *intel,
+ minify(minify(mt->width0));
}
- if (mip1_width > mt->pitch) {
- mt->pitch = mip1_width;
+ if (mip1_width > mt->total_width) {
+ mt->total_width = mip1_width;
}
}
- /* Pitch must be a whole number of dwords, even though we
- * express it in texels.
- */
- mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->pitch);
mt->total_height = 0;
for ( level = mt->first_level ; level <= mt->last_level ; level++ ) {
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c b/src/mesa/drivers/dri/nouveau/nouveau_context.c
index be57d48b8dd..42bec659d73 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c
@@ -54,6 +54,7 @@ static const struct dri_extension nouveau_extensions[] = {
{ "GL_ARB_texture_env_dot3", NULL },
{ "GL_ARB_texture_mirrored_repeat", NULL },
{ "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
+ { "GL_EXT_framebuffer_blit", NULL },
{ "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
{ "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
{ "GL_EXT_stencil_wrap", NULL },
@@ -337,6 +338,8 @@ nouveau_validate_framebuffer(GLcontext *ctx)
update_framebuffer(dri_ctx, dri_read,
&dri_ctx->dri2.read_stamp);
- if (nouveau_next_dirty_state(ctx) >= 0)
+ if (nouveau_next_dirty_state(ctx) >= 0) {
+ nouveau_state_emit(ctx);
FIRE_RING(context_chan(ctx));
+ }
}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_driver.c b/src/mesa/drivers/dri/nouveau/nouveau_driver.c
index 1d12f43741f..4ec864c181c 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_driver.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_driver.c
@@ -135,4 +135,8 @@ nouveau_driver_functions_init(struct dd_function_table *functions)
functions->Flush = nouveau_flush;
functions->Finish = nouveau_finish;
functions->Clear = nouveau_clear;
+ functions->DrawPixels = _mesa_meta_DrawPixels;
+ functions->CopyPixels = _mesa_meta_CopyPixels;
+ functions->Bitmap = _mesa_meta_Bitmap;
+ functions->BlitFramebuffer = _mesa_meta_BlitFramebuffer;
}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c
index 2ec3dc92420..8be7edb150b 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c
@@ -236,7 +236,7 @@ nouveau_render_texture(GLcontext *ctx, struct gl_framebuffer *fb,
/* Allocate a renderbuffer object for the texture if we
* haven't already done so. */
if (!rb) {
- rb = nouveau_renderbuffer_new(ctx, 0);
+ rb = nouveau_renderbuffer_new(ctx, ~0);
assert(rb);
rb->AllocStorage = NULL;
@@ -259,11 +259,7 @@ static void
nouveau_finish_render_texture(GLcontext *ctx,
struct gl_renderbuffer_attachment *att)
{
- struct nouveau_renderbuffer *nrb
- = to_nouveau_renderbuffer(att->Renderbuffer);
-
texture_dirty(att->Texture);
- nouveau_surface_ref(NULL, &nrb->surface);
}
void
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
index 00007a9a351..fbeed3baeab 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_gldefs.h
@@ -260,4 +260,23 @@ nvgl_filter_mode(unsigned filter)
}
}
+static inline unsigned
+nvgl_texgen_mode(unsigned mode)
+{
+ switch (mode) {
+ case GL_EYE_LINEAR:
+ return 0x2400;
+ case GL_OBJECT_LINEAR:
+ return 0x2401;
+ case GL_SPHERE_MAP:
+ return 0x2402;
+ case GL_NORMAL_MAP:
+ return 0x8511;
+ case GL_REFLECTION_MAP:
+ return 0x8512;
+ default:
+ assert(0);
+ }
+}
+
#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_render.h b/src/mesa/drivers/dri/nouveau/nouveau_render.h
index bff0ccfd762..923b79b2cf6 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_render.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_render.h
@@ -32,8 +32,8 @@
struct nouveau_array_state;
typedef void (*dispatch_t)(GLcontext *, unsigned int, int, unsigned int);
-typedef unsigned (*extract_u_t)(struct nouveau_array_state *a, int i, int j);
-typedef float (*extract_f_t)(struct nouveau_array_state *a, int i, int j);
+typedef unsigned (*extract_u_t)(struct nouveau_array_state *, int, int);
+typedef float (*extract_f_t)(struct nouveau_array_state *, int, int);
struct nouveau_attr_info {
int vbo_index;
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_render_t.c b/src/mesa/drivers/dri/nouveau/nouveau_render_t.c
index c0505781cfe..7ccd7e64165 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_render_t.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_render_t.c
@@ -254,7 +254,7 @@ get_scratch_vbo(GLcontext *ctx, unsigned size, struct nouveau_bo **bo,
*/
static inline unsigned
get_max_vertices(GLcontext *ctx, const struct _mesa_index_buffer *ib,
- unsigned n)
+ int n)
{
struct nouveau_render_state *render = to_render_state(ctx);
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_span.c b/src/mesa/drivers/dri/nouveau/nouveau_span.c
index f1a56dd03af..1bfdecc6a21 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_span.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_span.c
@@ -32,7 +32,6 @@
#include "swrast/swrast.h"
#define LOCAL_VARS \
- struct gl_framebuffer *fb = ctx->DrawBuffer; \
struct nouveau_surface *s = &to_nouveau_renderbuffer(rb)->surface; \
GLuint p; \
(void)p;
@@ -45,12 +44,12 @@
#define HW_CLIPLOOP() { \
int minx = 0; \
int miny = 0; \
- int maxx = fb->Width; \
- int maxy = fb->Height;
+ int maxx = rb->Width; \
+ int maxy = rb->Height;
#define HW_ENDCLIPLOOP() }
-#define Y_FLIP(y) (fb->Name ? (y) : rb->Height - 1 - (y))
+#define Y_FLIP(y) (rb->Name ? (y) : rb->Height - 1 - (y))
/* RGB565 span functions */
#define SPANTMP_PIXEL_FMT GL_RGB
@@ -144,17 +143,28 @@ texture_unit_map_unmap(GLcontext *ctx, struct gl_texture_unit *u, GLboolean map)
}
static void
-span_map_unmap(GLcontext *ctx, GLboolean map)
+framebuffer_map_unmap(struct gl_framebuffer *fb, GLboolean map)
{
int i;
- for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++)
- renderbuffer_map_unmap(ctx->DrawBuffer->_ColorDrawBuffers[i], map);
+ for (i = 0; i < fb->_NumColorDrawBuffers; i++)
+ renderbuffer_map_unmap(fb->_ColorDrawBuffers[i], map);
+
+ renderbuffer_map_unmap(fb->_ColorReadBuffer, map);
+
+ if (fb->_DepthBuffer)
+ renderbuffer_map_unmap(fb->_DepthBuffer->Wrapped, map);
+}
+
+static void
+span_map_unmap(GLcontext *ctx, GLboolean map)
+{
+ int i;
- renderbuffer_map_unmap(ctx->DrawBuffer->_ColorReadBuffer, map);
+ framebuffer_map_unmap(ctx->DrawBuffer, map);
- if (ctx->DrawBuffer->_DepthBuffer)
- renderbuffer_map_unmap(ctx->DrawBuffer->_DepthBuffer->Wrapped, map);
+ if (ctx->ReadBuffer != ctx->DrawBuffer)
+ framebuffer_map_unmap(ctx->ReadBuffer, map);
for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
texture_unit_map_unmap(ctx, &ctx->Texture.Unit[i], map);
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.c b/src/mesa/drivers/dri/nouveau/nouveau_state.c
index bc610451b40..a57df2d9dcd 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_state.c
@@ -189,6 +189,7 @@ nouveau_enable(GLcontext *ctx, GLenum cap, GLboolean state)
case GL_LIGHTING:
context_dirty(ctx, FRAG);
context_dirty(ctx, MODELVIEW);
+ context_dirty(ctx, LIGHT_MODEL);
context_dirty(ctx, LIGHT_ENABLE);
for (i = 0; i < MAX_LIGHTS; i++) {
@@ -231,9 +232,17 @@ nouveau_enable(GLcontext *ctx, GLenum cap, GLboolean state)
case GL_TEXTURE_1D:
case GL_TEXTURE_2D:
case GL_TEXTURE_3D:
+ case GL_TEXTURE_RECTANGLE:
context_dirty_i(ctx, TEX_ENV, ctx->Texture.CurrentUnit);
context_dirty_i(ctx, TEX_OBJ, ctx->Texture.CurrentUnit);
break;
+ case GL_TEXTURE_GEN_S:
+ case GL_TEXTURE_GEN_T:
+ case GL_TEXTURE_GEN_R:
+ case GL_TEXTURE_GEN_Q:
+ context_dirty_i(ctx, TEX_GEN, ctx->Texture.CurrentUnit);
+ context_dirty(ctx, MODELVIEW);
+ break;
}
}
@@ -368,7 +377,15 @@ static void
nouveau_tex_gen(GLcontext *ctx, GLenum coord, GLenum pname,
const GLfloat *params)
{
- context_dirty_i(ctx, TEX_GEN, ctx->Texture.CurrentUnit);
+ switch (pname) {
+ case GL_TEXTURE_GEN_MODE:
+ context_dirty_i(ctx, TEX_GEN, ctx->Texture.CurrentUnit);
+ context_dirty(ctx, MODELVIEW);
+ break;
+ default:
+ context_dirty_i(ctx, TEX_GEN, ctx->Texture.CurrentUnit);
+ break;
+ }
}
static void
@@ -454,12 +471,19 @@ nouveau_state_emit(GLcontext *ctx)
static void
nouveau_update_state(GLcontext *ctx, GLbitfield new_state)
{
+ int i;
+
if (new_state & (_NEW_PROJECTION | _NEW_MODELVIEW))
context_dirty(ctx, PROJECTION);
if (new_state & _NEW_MODELVIEW)
context_dirty(ctx, MODELVIEW);
+ if (new_state & _NEW_TEXTURE_MATRIX) {
+ for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++)
+ context_dirty_i(ctx, TEX_MAT, i);
+ }
+
if (new_state & _NEW_CURRENT_ATTRIB &&
new_state & _NEW_LIGHT) {
context_dirty(ctx, MATERIAL_FRONT_AMBIENT);
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_state.h b/src/mesa/drivers/dri/nouveau/nouveau_state.h
index d01d962c9f2..38ac9753c8c 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_state.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_state.h
@@ -89,6 +89,10 @@ enum {
NOUVEAU_STATE_TEX_GEN1,
NOUVEAU_STATE_TEX_GEN2,
NOUVEAU_STATE_TEX_GEN3,
+ NOUVEAU_STATE_TEX_MAT0,
+ NOUVEAU_STATE_TEX_MAT1,
+ NOUVEAU_STATE_TEX_MAT2,
+ NOUVEAU_STATE_TEX_MAT3,
NOUVEAU_STATE_TEX_OBJ0,
NOUVEAU_STATE_TEX_OBJ1,
NOUVEAU_STATE_TEX_OBJ2,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_texture.c b/src/mesa/drivers/dri/nouveau/nouveau_texture.c
index bf365bfca34..dbf9a5cc613 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_texture.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_texture.c
@@ -177,15 +177,15 @@ nouveau_choose_tex_format(GLcontext *ctx, GLint internalFormat,
}
static GLboolean
-teximage_fits(struct gl_texture_object *t, int level,
- struct gl_texture_image *ti)
+teximage_fits(struct gl_texture_object *t, int level)
{
struct nouveau_surface *s = &to_nouveau_texture(t)->surfaces[level];
+ struct gl_texture_image *ti = t->Image[0][level];
- return t->Target == GL_TEXTURE_RECTANGLE ||
- (s->bo && s->width == ti->Width &&
- s->height == ti->Height &&
- s->format == ti->TexFormat);
+ return ti && (t->Target == GL_TEXTURE_RECTANGLE ||
+ (s->bo && s->width == ti->Width &&
+ s->height == ti->Height &&
+ s->format == ti->TexFormat));
}
static GLboolean
@@ -195,7 +195,7 @@ validate_teximage(GLcontext *ctx, struct gl_texture_object *t,
{
struct gl_texture_image *ti = t->Image[0][level];
- if (ti && teximage_fits(t, level, ti)) {
+ if (teximage_fits(t, level)) {
struct nouveau_surface *ss = to_nouveau_texture(t)->surfaces;
struct nouveau_surface *s = &to_nouveau_teximage(ti)->surface;
@@ -283,7 +283,8 @@ nouveau_texture_validate(GLcontext *ctx, struct gl_texture_object *t)
struct nouveau_texture *nt = to_nouveau_texture(t);
int i, last = get_last_level(t);
- if (!nt->surfaces[last].bo)
+ if (!teximage_fits(t, t->BaseLevel) ||
+ !teximage_fits(t, last))
return GL_FALSE;
if (nt->dirty) {
@@ -296,6 +297,8 @@ nouveau_texture_validate(GLcontext *ctx, struct gl_texture_object *t)
validate_teximage(ctx, t, i, 0, 0, 0,
s->width, s->height, 1);
}
+
+ FIRE_RING(context_chan(ctx));
}
return GL_TRUE;
@@ -304,9 +307,12 @@ nouveau_texture_validate(GLcontext *ctx, struct gl_texture_object *t)
void
nouveau_texture_reallocate(GLcontext *ctx, struct gl_texture_object *t)
{
- texture_dirty(t);
- relayout_texture(ctx, t);
- nouveau_texture_validate(ctx, t);
+ if (!teximage_fits(t, t->BaseLevel) ||
+ !teximage_fits(t, get_last_level(t))) {
+ texture_dirty(t);
+ relayout_texture(ctx, t);
+ nouveau_texture_validate(ctx, t);
+ }
}
static unsigned
@@ -364,7 +370,7 @@ nouveau_teximage(GLcontext *ctx, GLint dims, GLenum target, GLint level,
}
if (level == t->BaseLevel) {
- if (!teximage_fits(t, level, ti))
+ if (!teximage_fits(t, level))
relayout_texture(ctx, t);
nouveau_texture_validate(ctx, t);
}
@@ -416,6 +422,40 @@ nouveau_teximage_3d(GLcontext *ctx, GLenum target, GLint level,
}
static void
+nouveau_texsubimage(GLcontext *ctx, GLint dims, GLenum target, GLint level,
+ GLint xoffset, GLint yoffset, GLint zoffset,
+ GLint width, GLint height, GLint depth,
+ GLenum format, GLenum type, const void *pixels,
+ const struct gl_pixelstore_attrib *packing,
+ struct gl_texture_object *t,
+ struct gl_texture_image *ti)
+{
+ struct nouveau_surface *s = &to_nouveau_teximage(ti)->surface;
+ int ret;
+
+ pixels = _mesa_validate_pbo_teximage(ctx, dims, width, height, depth,
+ format, type, pixels, packing,
+ "glTexSubImage");
+ if (pixels) {
+ nouveau_teximage_map(ctx, ti);
+
+ ret = _mesa_texstore(ctx, 3, ti->_BaseFormat, ti->TexFormat,
+ ti->Data, xoffset, yoffset, zoffset,
+ s->pitch, ti->ImageOffsets,
+ width, height, depth, format, type,
+ pixels, packing);
+ assert(ret);
+
+ nouveau_teximage_unmap(ctx, ti);
+ _mesa_unmap_teximage_pbo(ctx, packing);
+ }
+
+ if (!to_nouveau_texture(t)->dirty)
+ validate_teximage(ctx, t, level, xoffset, yoffset, zoffset,
+ width, height, depth);
+}
+
+static void
nouveau_texsubimage_3d(GLcontext *ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset, GLint zoffset,
GLint width, GLint height, GLint depth,
@@ -424,15 +464,9 @@ nouveau_texsubimage_3d(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *t,
struct gl_texture_image *ti)
{
- nouveau_teximage_map(ctx, ti);
- _mesa_store_texsubimage3d(ctx, target, level, xoffset, yoffset, zoffset,
- width, height, depth, format, type, pixels,
- packing, t, ti);
- nouveau_teximage_unmap(ctx, ti);
-
- if (!to_nouveau_texture(t)->dirty)
- validate_teximage(ctx, t, level, xoffset, yoffset, zoffset,
- width, height, depth);
+ nouveau_texsubimage(ctx, 3, target, level, xoffset, yoffset, zoffset,
+ width, height, depth, format, type, pixels,
+ packing, t, ti);
}
static void
@@ -444,15 +478,9 @@ nouveau_texsubimage_2d(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *t,
struct gl_texture_image *ti)
{
- nouveau_teximage_map(ctx, ti);
- _mesa_store_texsubimage2d(ctx, target, level, xoffset, yoffset,
- width, height, format, type, pixels,
- packing, t, ti);
- nouveau_teximage_unmap(ctx, ti);
-
- if (!to_nouveau_texture(t)->dirty)
- validate_teximage(ctx, t, level, xoffset, yoffset, 0,
- width, height, 1);
+ nouveau_texsubimage(ctx, 2, target, level, xoffset, yoffset, 0,
+ width, height, 1, format, type, pixels,
+ packing, t, ti);
}
static void
@@ -463,15 +491,9 @@ nouveau_texsubimage_1d(GLcontext *ctx, GLenum target, GLint level,
struct gl_texture_object *t,
struct gl_texture_image *ti)
{
- nouveau_teximage_map(ctx, ti);
- _mesa_store_texsubimage1d(ctx, target, level, xoffset,
- width, format, type, pixels,
- packing, t, ti);
- nouveau_teximage_unmap(ctx, ti);
-
- if (!to_nouveau_texture(t)->dirty)
- validate_teximage(ctx, t, level, xoffset, 0, 0,
- width, 1, 1);
+ nouveau_texsubimage(ctx, 1, target, level, xoffset, 0, 0,
+ width, 1, 1, format, type, pixels,
+ packing, t, ti);
}
static void
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_texture.h b/src/mesa/drivers/dri/nouveau/nouveau_texture.h
index b91facbdeb6..251f537bba7 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_texture.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_texture.h
@@ -41,7 +41,7 @@ struct nouveau_texture {
#define to_nouveau_texture(x) ((struct nouveau_texture *)(x))
#define texture_dirty(t) \
- to_nouveau_texture(t)->dirty = GL_TRUE;
+ to_nouveau_texture(t)->dirty = GL_TRUE
void
nouveau_set_texbuffer(__DRIcontext *dri_ctx,
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_util.h b/src/mesa/drivers/dri/nouveau/nouveau_util.h
index d6007aba2b9..584cb80ef62 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_util.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_util.h
@@ -191,4 +191,22 @@ is_texture_source(int s)
return s == GL_TEXTURE || (s >= GL_TEXTURE0 && s <= GL_TEXTURE31);
}
+static inline struct gl_texgen *
+get_texgen_coord(struct gl_texture_unit *u, int i)
+{
+ return ((struct gl_texgen *[])
+ { &u->GenS, &u->GenT, &u->GenR, &u->GenQ }) [i];
+}
+
+static inline float *
+get_texgen_coeff(struct gl_texgen *c)
+{
+ if (c->Mode == GL_OBJECT_LINEAR)
+ return c->ObjectPlane;
+ else if (c->Mode == GL_EYE_LINEAR)
+ return c->EyePlane;
+ else
+ return NULL;
+}
+
#endif
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
index a365b977f29..e5858f82684 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_vbo_t.c
@@ -85,6 +85,18 @@ vbo_deinit_array(struct nouveau_array_state *a)
a->fields = 0;
}
+static int
+get_array_stride(GLcontext *ctx, const struct gl_client_array *a)
+{
+ struct nouveau_render_state *render = to_render_state(ctx);
+
+ if (render->mode == VBO && !_mesa_is_bufferobj(a->BufferObj))
+ /* Pack client buffers. */
+ return align(_mesa_sizeof_type(a->Type) * a->Size, 4);
+ else
+ return a->StrideB;
+}
+
static void
vbo_init_arrays(GLcontext *ctx, const struct _mesa_index_buffer *ib,
const struct gl_client_array **arrays)
@@ -101,18 +113,10 @@ vbo_init_arrays(GLcontext *ctx, const struct _mesa_index_buffer *ib,
if (attr >= 0) {
const struct gl_client_array *array = arrays[attr];
- int stride;
-
- if (render->mode == VBO &&
- !_mesa_is_bufferobj(array->BufferObj))
- /* Pack client buffers. */
- stride = align(_mesa_sizeof_type(array->Type)
- * array->Size, 4);
- else
- stride = array->StrideB;
vbo_init_array(&render->attrs[attr], attr,
- stride, array->Size, array->Type,
+ get_array_stride(ctx, array),
+ array->Size, array->Type,
array->BufferObj, array->Ptr,
render->mode == IMM);
}
@@ -224,9 +228,11 @@ vbo_choose_attrs(GLcontext *ctx, const struct gl_client_array **arrays)
if (ctx->Fog.Enabled && ctx->Fog.FogCoordinateSource == GL_FOG_COORD)
vbo_emit_attr(ctx, arrays, VERT_ATTRIB_FOG);
- if (ctx->Light.Enabled) {
+ if (ctx->Light.Enabled ||
+ (ctx->Texture._GenFlags & TEXGEN_NEED_NORMALS))
vbo_emit_attr(ctx, arrays, VERT_ATTRIB_NORMAL);
+ if (ctx->Light.Enabled) {
vbo_emit_attr(ctx, arrays, MAT(FRONT_AMBIENT));
vbo_emit_attr(ctx, arrays, MAT(FRONT_DIFFUSE));
vbo_emit_attr(ctx, arrays, MAT(FRONT_SPECULAR));
@@ -243,18 +249,21 @@ vbo_choose_attrs(GLcontext *ctx, const struct gl_client_array **arrays)
vbo_emit_attr(ctx, arrays, VERT_ATTRIB_POS);
}
-static unsigned
-get_max_client_stride(GLcontext *ctx)
+static int
+get_max_client_stride(GLcontext *ctx, const struct gl_client_array **arrays)
{
struct nouveau_render_state *render = to_render_state(ctx);
int i, s = 0;
for (i = 0; i < render->attr_count; i++) {
int attr = render->map[i];
- struct nouveau_array_state *a = &render->attrs[attr];
- if (attr >= 0 && !a->bo)
- s = MAX2(a->stride, s);
+ if (attr >= 0) {
+ const struct gl_client_array *a = arrays[attr];
+
+ if (!_mesa_is_bufferobj(a->BufferObj))
+ s = MAX2(s, get_array_stride(ctx, a));
+ }
}
return s;
@@ -275,14 +284,15 @@ vbo_maybe_split(GLcontext *ctx, const struct gl_client_array **arrays,
{
struct nouveau_context *nctx = to_nouveau_context(ctx);
struct nouveau_render_state *render = to_render_state(ctx);
- unsigned pushbuf_avail = PUSHBUF_DWORDS - 2 * nctx->bo.count,
+ unsigned pushbuf_avail = PUSHBUF_DWORDS - 2 * (nctx->bo.count +
+ render->attr_count),
vert_avail = get_max_vertices(ctx, NULL, pushbuf_avail),
idx_avail = get_max_vertices(ctx, ib, pushbuf_avail);
int stride;
/* Try to keep client buffers smaller than the scratch BOs. */
if (render->mode == VBO &&
- (stride = get_max_client_stride(ctx)))
+ (stride = get_max_client_stride(ctx, arrays)))
vert_avail = MIN2(vert_avail,
RENDER_SCRATCH_SIZE / stride);
@@ -321,6 +331,7 @@ vbo_bind_vertices(GLcontext *ctx, const struct gl_client_array **arrays,
* array->StrideB;
if (a->bo) {
+ /* Array in a buffer obj. */
a->offset = (intptr_t)array->Ptr + delta;
} else {
int j, n = max_index - min_index + 1;
@@ -328,6 +339,8 @@ vbo_bind_vertices(GLcontext *ctx, const struct gl_client_array **arrays,
char *dp = get_scratch_vbo(ctx, n * a->stride,
&a->bo, &a->offset);
+ /* Array in client memory, move it to
+ * a scratch buffer obj. */
for (j = 0; j < n; j++)
memcpy(dp + j * a->stride,
sp + j * array->StrideB,
@@ -371,8 +384,6 @@ vbo_draw_vbo(GLcontext *ctx, const struct gl_client_array **arrays,
dispatch(ctx, start, delta, count);
BATCH_END();
}
-
- FIRE_RING(chan);
}
/* Immediate rendering path. */
@@ -416,8 +427,6 @@ vbo_draw_imm(GLcontext *ctx, const struct gl_client_array **arrays,
BATCH_END();
}
-
- FIRE_RING(chan);
}
/* draw_prims entry point when we're doing hw-tnl. */
diff --git a/src/mesa/drivers/dri/nouveau/nv04_context.c b/src/mesa/drivers/dri/nouveau/nv04_context.c
index 3624b3af921..6834f7cd3dc 100644
--- a/src/mesa/drivers/dri/nouveau/nv04_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv04_context.c
@@ -276,6 +276,10 @@ const struct nouveau_driver nv04_driver = {
nouveau_emit_nothing,
nouveau_emit_nothing,
nouveau_emit_nothing,
+ nouveau_emit_nothing,
+ nouveau_emit_nothing,
+ nouveau_emit_nothing,
+ nouveau_emit_nothing,
nv04_emit_tex_obj,
nv04_emit_tex_obj,
nouveau_emit_nothing,
diff --git a/src/mesa/drivers/dri/nouveau/nv10_context.c b/src/mesa/drivers/dri/nouveau/nv10_context.c
index 860d0aeb8f5..b6d10361de0 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_context.c
@@ -212,7 +212,7 @@ nv10_hwctx_init(GLcontext *ctx)
OUT_RING(chan, 0);
BEGIN_RING(chan, celsius, NV10TCL_CULL_FACE_ENABLE, 1);
OUT_RING(chan, 0);
- BEGIN_RING(chan, celsius, NV10TCL_TX_GEN_S(0), 8);
+ BEGIN_RING(chan, celsius, NV10TCL_TX_GEN_MODE_S(0), 8);
for (i = 0; i < 8; i++)
OUT_RING(chan, 0);
@@ -412,6 +412,10 @@ const struct nouveau_driver nv10_driver = {
nv10_emit_tex_gen,
nouveau_emit_nothing,
nouveau_emit_nothing,
+ nv10_emit_tex_mat,
+ nv10_emit_tex_mat,
+ nouveau_emit_nothing,
+ nouveau_emit_nothing,
nv10_emit_tex_obj,
nv10_emit_tex_obj,
nouveau_emit_nothing,
diff --git a/src/mesa/drivers/dri/nouveau/nv10_driver.h b/src/mesa/drivers/dri/nouveau/nv10_driver.h
index d662712533b..cefd6c6fba8 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_driver.h
+++ b/src/mesa/drivers/dri/nouveau/nv10_driver.h
@@ -134,6 +134,9 @@ void
nv10_emit_tex_gen(GLcontext *ctx, int emit);
void
+nv10_emit_tex_mat(GLcontext *ctx, int emit);
+
+void
nv10_emit_tex_obj(GLcontext *ctx, int emit);
/* nv10_state_tnl.c */
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
index 6bd383ebcd3..a2fcb6b6959 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c
@@ -71,6 +71,7 @@ setup_lma_buffer(GLcontext *ctx)
nouveau_bo_markl(bctx, celsius, NV17TCL_LMA_DEPTH_BUFFER_OFFSET,
nfb->lma_bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
+ WAIT_RING(chan, 9);
BEGIN_RING(chan, celsius, NV17TCL_LMA_DEPTH_WINDOW_X, 4);
OUT_RINGf(chan, - 1792);
OUT_RINGf(chan, - 2304 + fb->Height);
@@ -171,15 +172,13 @@ nv10_emit_viewport(GLcontext *ctx, int emit)
struct nouveau_grobj *celsius = context_eng3d(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
float a[4] = {};
- int i;
get_viewport_translate(ctx, a);
a[0] -= 2048;
a[1] -= 2048;
BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_TRANSLATE_X, 4);
- for (i = 0; i < 4; i++)
- OUT_RINGf(chan, a[i]);
+ OUT_RINGp(chan, a, 4);
BEGIN_RING(chan, celsius, NV10TCL_VIEWPORT_CLIP_HORIZ(0), 1);
OUT_RING(chan, (fb->Width - 1) << 16 | 0x08000800);
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
index 02a5ca797ae..6dedb18c72b 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c
@@ -32,9 +32,64 @@
#include "nouveau_util.h"
#include "nv10_driver.h"
+#define TX_GEN_MODE(i, j) (NV10TCL_TX_GEN_MODE_S(i) + 4 * (j))
+#define TX_GEN_COEFF(i, j) (NV10TCL_TX_GEN_COEFF_S_A(i) + 16 * (j))
+#define TX_MATRIX(i) (NV10TCL_TX0_MATRIX(0) + 64 * (i))
+
void
nv10_emit_tex_gen(GLcontext *ctx, int emit)
{
+ const int i = emit - NOUVEAU_STATE_TEX_GEN0;
+ struct nouveau_context *nctx = to_nouveau_context(ctx);
+ struct nouveau_channel *chan = context_chan(ctx);
+ struct nouveau_grobj *celsius = context_eng3d(ctx);
+ struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
+ int j;
+
+ for (j = 0; j < 4; j++) {
+ if (nctx->fallback == HWTNL && (unit->TexGenEnabled & 1 << j)) {
+ struct gl_texgen *coord = get_texgen_coord(unit, j);
+ float *k = get_texgen_coeff(coord);
+
+ if (k) {
+ BEGIN_RING(chan, celsius,
+ TX_GEN_COEFF(i, j), 4);
+ OUT_RINGp(chan, k, 4);
+ }
+
+ BEGIN_RING(chan, celsius, TX_GEN_MODE(i, j), 1);
+ OUT_RING(chan, nvgl_texgen_mode(coord->Mode));
+
+ } else {
+ BEGIN_RING(chan, celsius, TX_GEN_MODE(i, j), 1);
+ OUT_RING(chan, 0);
+ }
+ }
+
+ context_dirty_i(ctx, TEX_MAT, i);
+}
+
+void
+nv10_emit_tex_mat(GLcontext *ctx, int emit)
+{
+ const int i = emit - NOUVEAU_STATE_TEX_MAT0;
+ struct nouveau_context *nctx = to_nouveau_context(ctx);
+ struct nouveau_channel *chan = context_chan(ctx);
+ struct nouveau_grobj *celsius = context_eng3d(ctx);
+
+ if (nctx->fallback == HWTNL &&
+ ((ctx->Texture._TexMatEnabled & 1 << i) ||
+ ctx->Texture.Unit[i]._GenFlags)) {
+ BEGIN_RING(chan, celsius, NV10TCL_TX_MATRIX_ENABLE(i), 1);
+ OUT_RING(chan, 1);
+
+ BEGIN_RING(chan, celsius, TX_MATRIX(i), 16);
+ OUT_RINGm(chan, ctx->TextureMatrixStack[i].Top->m);
+
+ } else {
+ BEGIN_RING(chan, celsius, NV10TCL_TX_MATRIX_ENABLE(i), 1);
+ OUT_RING(chan, 0);
+ }
}
static uint32_t
diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c b/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c
index 406e24c455d..0e592a16292 100644
--- a/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c
+++ b/src/mesa/drivers/dri/nouveau/nv10_state_tnl.c
@@ -140,9 +140,7 @@ nv10_emit_fog(GLcontext *ctx, int emit)
OUT_RING(chan, pack_rgba_f(MESA_FORMAT_RGBA8888_REV, f->Color));
BEGIN_RING(chan, celsius, NV10TCL_FOG_EQUATION_CONSTANT, 3);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
+ OUT_RINGp(chan, k, 3);
context_dirty(ctx, FRAG);
}
@@ -284,9 +282,7 @@ nv10_emit_light_source(GLcontext *ctx, int emit)
if (l->_Flags & LIGHT_POSITIONAL) {
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_POSITION_X(i), 3);
- OUT_RINGf(chan, l->_Position[0]);
- OUT_RINGf(chan, l->_Position[1]);
- OUT_RINGf(chan, l->_Position[2]);
+ OUT_RINGp(chan, l->_Position, 3);
BEGIN_RING(chan, celsius,
NV10TCL_LIGHT_ATTENUATION_CONSTANT(i), 3);
@@ -296,14 +292,10 @@ nv10_emit_light_source(GLcontext *ctx, int emit)
} else {
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_DIRECTION_X(i), 3);
- OUT_RINGf(chan, l->_VP_inf_norm[0]);
- OUT_RINGf(chan, l->_VP_inf_norm[1]);
- OUT_RINGf(chan, l->_VP_inf_norm[2]);
+ OUT_RINGp(chan, l->_VP_inf_norm, 3);
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_HALF_VECTOR_X(i), 3);
- OUT_RINGf(chan, l->_h_inf_norm[0]);
- OUT_RINGf(chan, l->_h_inf_norm[1]);
- OUT_RINGf(chan, l->_h_inf_norm[2]);
+ OUT_RINGp(chan, l->_h_inf_norm, 3);
}
if (l->_Flags & LIGHT_SPOT) {
@@ -312,13 +304,7 @@ nv10_emit_light_source(GLcontext *ctx, int emit)
nv10_get_spot_coeff(l, k);
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_SPOT_CUTOFF_A(i), 7);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
- OUT_RINGf(chan, k[3]);
- OUT_RINGf(chan, k[4]);
- OUT_RINGf(chan, k[5]);
- OUT_RINGf(chan, k[6]);
+ OUT_RINGp(chan, k, 7);
}
}
@@ -350,15 +336,11 @@ nv10_emit_material_ambient(GLcontext *ctx, int emit)
}
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_MODEL_AMBIENT_R, 3);
- OUT_RINGf(chan, c_scene[0]);
- OUT_RINGf(chan, c_scene[1]);
- OUT_RINGf(chan, c_scene[2]);
+ OUT_RINGp(chan, c_scene, 3);
if (ctx->Light.ColorMaterialEnabled) {
BEGIN_RING(chan, celsius, NV10TCL_MATERIAL_FACTOR_R, 3);
- OUT_RINGf(chan, c_factor[0]);
- OUT_RINGf(chan, c_factor[1]);
- OUT_RINGf(chan, c_factor[2]);
+ OUT_RINGp(chan, c_factor, 3);
}
foreach(l, &ctx->Light.EnabledList) {
@@ -368,9 +350,7 @@ nv10_emit_material_ambient(GLcontext *ctx, int emit)
l->_MatAmbient[0]);
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_AMBIENT_R(i), 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -392,9 +372,7 @@ nv10_emit_material_diffuse(GLcontext *ctx, int emit)
l->_MatDiffuse[0]);
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_DIFFUSE_R(i), 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -412,9 +390,7 @@ nv10_emit_material_specular(GLcontext *ctx, int emit)
l->_MatSpecular[0]);
BEGIN_RING(chan, celsius, NV10TCL_LIGHT_SPECULAR_R(i), 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -455,12 +431,7 @@ nv10_emit_material_shininess(GLcontext *ctx, int emit)
k);
BEGIN_RING(chan, celsius, NV10TCL_MATERIAL_SHININESS(0), 6);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
- OUT_RINGf(chan, k[3]);
- OUT_RINGf(chan, k[4]);
- OUT_RINGf(chan, k[5]);
+ OUT_RINGp(chan, k, 6);
}
void
@@ -474,12 +445,14 @@ nv10_emit_modelview(GLcontext *ctx, int emit)
if (nctx->fallback != HWTNL)
return;
- if (ctx->Light._NeedEyeCoords || ctx->Fog.Enabled) {
+ if (ctx->Light._NeedEyeCoords || ctx->Fog.Enabled ||
+ (ctx->Texture._GenFlags & TEXGEN_NEED_EYE_COORD)) {
BEGIN_RING(chan, celsius, NV10TCL_MODELVIEW0_MATRIX(0), 16);
OUT_RINGm(chan, m->m);
}
- if (ctx->Light.Enabled) {
+ if (ctx->Light.Enabled ||
+ (ctx->Texture._GenFlags & TEXGEN_NEED_EYE_COORD)) {
int i, j;
BEGIN_RING(chan, celsius,
diff --git a/src/mesa/drivers/dri/nouveau/nv20_context.c b/src/mesa/drivers/dri/nouveau/nv20_context.c
index db39ef70750..789dcaa6b46 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_context.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_context.c
@@ -297,9 +297,9 @@ nv20_hwctx_init(GLcontext *ctx)
BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_STIPPLE_ENABLE, 1);
OUT_RING (chan, 0);
- BEGIN_RING(chan, kelvin, NV20TCL_TX_GEN_S(0),
- 4 * NV20TCL_TX_GEN_S__SIZE);
- for (i=0; i < 4 * NV20TCL_TX_GEN_S__SIZE; i++)
+ BEGIN_RING(chan, kelvin, NV20TCL_TX_GEN_MODE_S(0),
+ 4 * NV20TCL_TX_GEN_MODE_S__SIZE);
+ for (i=0; i < 4 * NV20TCL_TX_GEN_MODE_S__SIZE; i++)
OUT_RING(chan, 0);
BEGIN_RING(chan, kelvin, NV20TCL_FOG_EQUATION_CONSTANT, 3);
@@ -497,10 +497,14 @@ const struct nouveau_driver nv20_driver = {
nv20_emit_tex_env,
nv20_emit_tex_env,
nv20_emit_tex_env,
- nv10_emit_tex_gen,
- nv10_emit_tex_gen,
- nv10_emit_tex_gen,
- nv10_emit_tex_gen,
+ nv20_emit_tex_gen,
+ nv20_emit_tex_gen,
+ nv20_emit_tex_gen,
+ nv20_emit_tex_gen,
+ nv20_emit_tex_mat,
+ nv20_emit_tex_mat,
+ nv20_emit_tex_mat,
+ nv20_emit_tex_mat,
nv20_emit_tex_obj,
nv20_emit_tex_obj,
nv20_emit_tex_obj,
diff --git a/src/mesa/drivers/dri/nouveau/nv20_driver.h b/src/mesa/drivers/dri/nouveau/nv20_driver.h
index 18574e9be64..8adecef2c4e 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_driver.h
+++ b/src/mesa/drivers/dri/nouveau/nv20_driver.h
@@ -68,6 +68,12 @@ nv20_emit_frag(GLcontext *ctx, int emit);
/* nv20_state_tex.c */
void
+nv20_emit_tex_gen(GLcontext *ctx, int emit);
+
+void
+nv20_emit_tex_mat(GLcontext *ctx, int emit);
+
+void
nv20_emit_tex_obj(GLcontext *ctx, int emit);
void
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c
index d638541df9e..21da4f7af16 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c
@@ -106,13 +106,11 @@ nv20_emit_viewport(GLcontext *ctx, int emit)
struct nouveau_grobj *kelvin = context_eng3d(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
float a[4] = {};
- int i;
get_viewport_translate(ctx, a);
BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_TRANSLATE_X, 4);
- for (i = 0; i < 4; i++)
- OUT_RINGf(chan, a[i]);
+ OUT_RINGp(chan, a, 4);
BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 1);
OUT_RING(chan, (fb->Width - 1) << 16);
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
index 92870105f96..e46118e4fce 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c
@@ -32,6 +32,62 @@
#include "nouveau_util.h"
#include "nv20_driver.h"
+#define TX_GEN_MODE(i, j) (NV20TCL_TX_GEN_MODE_S(i) + 4 * (j))
+#define TX_GEN_COEFF(i, j) (NV20TCL_TX_GEN_COEFF_S_A(i) + 16 * (j))
+#define TX_MATRIX(i) (NV20TCL_TX0_MATRIX(0) + 64 * (i))
+
+void
+nv20_emit_tex_gen(GLcontext *ctx, int emit)
+{
+ const int i = emit - NOUVEAU_STATE_TEX_GEN0;
+ struct nouveau_context *nctx = to_nouveau_context(ctx);
+ struct nouveau_channel *chan = context_chan(ctx);
+ struct nouveau_grobj *kelvin = context_eng3d(ctx);
+ struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
+ int j;
+
+ for (j = 0; j < 4; j++) {
+ if (nctx->fallback == HWTNL && (unit->TexGenEnabled & 1 << j)) {
+ struct gl_texgen *coord = get_texgen_coord(unit, j);
+ float *k = get_texgen_coeff(coord);
+
+ if (k) {
+ BEGIN_RING(chan, kelvin, TX_GEN_COEFF(i, j), 4);
+ OUT_RINGp(chan, k, 4);
+ }
+
+ BEGIN_RING(chan, kelvin, TX_GEN_MODE(i, j), 1);
+ OUT_RING(chan, nvgl_texgen_mode(coord->Mode));
+
+ } else {
+ BEGIN_RING(chan, kelvin, TX_GEN_MODE(i, j), 1);
+ OUT_RING(chan, 0);
+ }
+ }
+}
+
+void
+nv20_emit_tex_mat(GLcontext *ctx, int emit)
+{
+ const int i = emit - NOUVEAU_STATE_TEX_MAT0;
+ struct nouveau_context *nctx = to_nouveau_context(ctx);
+ struct nouveau_channel *chan = context_chan(ctx);
+ struct nouveau_grobj *kelvin = context_eng3d(ctx);
+
+ if (nctx->fallback == HWTNL &&
+ (ctx->Texture._TexMatEnabled & 1 << i)) {
+ BEGIN_RING(chan, kelvin, NV20TCL_TX_MATRIX_ENABLE(i), 1);
+ OUT_RING(chan, 1);
+
+ BEGIN_RING(chan, kelvin, TX_MATRIX(i), 16);
+ OUT_RINGm(chan, ctx->TextureMatrixStack[i].Top->m);
+
+ } else {
+ BEGIN_RING(chan, kelvin, NV20TCL_TX_MATRIX_ENABLE(i), 1);
+ OUT_RING(chan, 0);
+ }
+}
+
static uint32_t
get_tex_format_pot(struct gl_texture_image *ti)
{
diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c b/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c
index 43f8c723122..62efe80fe4b 100644
--- a/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c
+++ b/src/mesa/drivers/dri/nouveau/nv20_state_tnl.c
@@ -139,9 +139,7 @@ nv20_emit_fog(GLcontext *ctx, int emit)
OUT_RING(chan, pack_rgba_f(MESA_FORMAT_RGBA8888_REV, f->Color));
BEGIN_RING(chan, kelvin, NV20TCL_FOG_EQUATION_CONSTANT, 3);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
+ OUT_RINGp(chan, k, 3);
}
void
@@ -176,9 +174,7 @@ nv20_emit_light_source(GLcontext *ctx, int emit)
if (l->_Flags & LIGHT_POSITIONAL) {
BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_POSITION_X(i), 3);
- OUT_RINGf(chan, l->_Position[0]);
- OUT_RINGf(chan, l->_Position[1]);
- OUT_RINGf(chan, l->_Position[2]);
+ OUT_RINGp(chan, l->_Position, 3);
BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_ATTENUATION_CONSTANT(i), 3);
OUT_RINGf(chan, l->ConstantAttenuation);
@@ -187,14 +183,10 @@ nv20_emit_light_source(GLcontext *ctx, int emit)
} else {
BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_DIRECTION_X(i), 3);
- OUT_RINGf(chan, l->_VP_inf_norm[0]);
- OUT_RINGf(chan, l->_VP_inf_norm[1]);
- OUT_RINGf(chan, l->_VP_inf_norm[2]);
+ OUT_RINGp(chan, l->_VP_inf_norm, 3);
BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_HALF_VECTOR_X(i), 3);
- OUT_RINGf(chan, l->_h_inf_norm[0]);
- OUT_RINGf(chan, l->_h_inf_norm[1]);
- OUT_RINGf(chan, l->_h_inf_norm[2]);
+ OUT_RINGp(chan, l->_h_inf_norm, 3);
}
if (l->_Flags & LIGHT_SPOT) {
@@ -203,13 +195,7 @@ nv20_emit_light_source(GLcontext *ctx, int emit)
nv10_get_spot_coeff(l, k);
BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_SPOT_CUTOFF_A(i), 7);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
- OUT_RINGf(chan, k[3]);
- OUT_RINGf(chan, k[4]);
- OUT_RINGf(chan, k[5]);
- OUT_RINGf(chan, k[6]);
+ OUT_RINGp(chan, k, 7);
}
}
@@ -246,15 +232,11 @@ nv20_emit_material_ambient(GLcontext *ctx, int emit)
}
BEGIN_RING(chan, kelvin, m_scene[side], 3);
- OUT_RINGf(chan, c_scene[0]);
- OUT_RINGf(chan, c_scene[1]);
- OUT_RINGf(chan, c_scene[2]);
+ OUT_RINGp(chan, c_scene, 3);
if (ctx->Light.ColorMaterialEnabled) {
BEGIN_RING(chan, kelvin, m_factor[side], 3);
- OUT_RINGf(chan, c_factor[0]);
- OUT_RINGf(chan, c_factor[1]);
- OUT_RINGf(chan, c_factor[2]);
+ OUT_RINGp(chan, c_factor, 3);
}
foreach(l, &ctx->Light.EnabledList) {
@@ -266,9 +248,7 @@ nv20_emit_material_ambient(GLcontext *ctx, int emit)
l->_MatAmbient[side]);
BEGIN_RING(chan, kelvin, m_light[side], 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -295,9 +275,7 @@ nv20_emit_material_diffuse(GLcontext *ctx, int emit)
l->_MatDiffuse[side]);
BEGIN_RING(chan, kelvin, m_light[side], 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -318,9 +296,7 @@ nv20_emit_material_specular(GLcontext *ctx, int emit)
l->_MatSpecular[side]);
BEGIN_RING(chan, kelvin, m_light[side], 3);
- OUT_RINGf(chan, c_light[0]);
- OUT_RINGf(chan, c_light[1]);
- OUT_RINGf(chan, c_light[2]);
+ OUT_RINGp(chan, c_light, 3);
}
}
@@ -340,12 +316,7 @@ nv20_emit_material_shininess(GLcontext *ctx, int emit)
k);
BEGIN_RING(chan, kelvin, mthd[side], 6);
- OUT_RINGf(chan, k[0]);
- OUT_RINGf(chan, k[1]);
- OUT_RINGf(chan, k[2]);
- OUT_RINGf(chan, k[3]);
- OUT_RINGf(chan, k[4]);
- OUT_RINGf(chan, k[5]);
+ OUT_RINGp(chan, k, 6);
}
void
@@ -359,12 +330,14 @@ nv20_emit_modelview(GLcontext *ctx, int emit)
if (nctx->fallback != HWTNL)
return;
- if (ctx->Light._NeedEyeCoords || ctx->Fog.Enabled) {
+ if (ctx->Light._NeedEyeCoords || ctx->Fog.Enabled ||
+ (ctx->Texture._GenFlags & TEXGEN_NEED_EYE_COORD)) {
BEGIN_RING(chan, kelvin, NV20TCL_MODELVIEW0_MATRIX(0), 16);
OUT_RINGm(chan, m->m);
}
- if (ctx->Light.Enabled) {
+ if (ctx->Light.Enabled ||
+ (ctx->Texture._GenFlags & TEXGEN_NEED_EYE_COORD)) {
int i, j;
BEGIN_RING(chan, kelvin,
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 2f2b8d94dca..ad43a8ca920 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -189,7 +189,8 @@ void r200FlushElts(GLcontext *ctx)
if (R200_ELT_BUF_SZ > elt_used)
radeonReturnDmaRegion(&rmesa->radeon, R200_ELT_BUF_SZ - elt_used);
- if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)) {
+ if (radeon_is_debug_enabled(RADEON_SYNC, RADEON_CRITICAL)
+ && !rmesa->radeon.radeonScreen->kernel_mm) {
radeon_print(RADEON_SYNC, RADEON_NORMAL, "%s: Syncing\n", __FUNCTION__);
radeonFinish( rmesa->radeon.glCtx );
}
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 9c2ac05ad6c..29d7bed8b6a 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -2496,11 +2496,10 @@ void r200InitStateFuncs( radeonContextPtr radeon, struct dd_function_table *func
functions->DrawBuffer = radeonDrawBuffer;
functions->ReadBuffer = radeonReadBuffer;
- if (radeon->radeonScreen->kernel_mm) {
- functions->CopyPixels = _mesa_meta_CopyPixels;
- functions->DrawPixels = _mesa_meta_DrawPixels;
+ functions->CopyPixels = _mesa_meta_CopyPixels;
+ functions->DrawPixels = _mesa_meta_DrawPixels;
+ if (radeon->radeonScreen->kernel_mm)
functions->ReadPixels = radeonReadPixels;
- }
functions->AlphaFunc = r200AlphaFunc;
functions->BlendColor = r200BlendColor;
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index f3f558b7def..d43e14581e9 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -404,8 +404,9 @@ static GLuint r200EnsureEmitSize( GLcontext * ctx , GLubyte* vimap_rev )
rendering code may decide convert to elts.
In that case we have to make pessimistic prediction.
and use larger of 2 paths. */
- const GLuint elts = ELTS_BUFSZ(nr_aos);
- const GLuint index = INDEX_BUFSZ;
+ const GLuint elt_count =(VB->Primitive[i].count/GET_MAX_HW_ELTS() + 1);
+ const GLuint elts = ELTS_BUFSZ(nr_aos) * elt_count;
+ const GLuint index = INDEX_BUFSZ * elt_count;
const GLuint vbuf = VBUF_BUFSZ;
if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
|| vbuf > index + elts)
@@ -687,25 +688,34 @@ static char *getFallbackString(GLuint bit)
void r200TclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
{
- r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint oldfallback = rmesa->radeon.TclFallback;
-
- if (mode) {
- rmesa->radeon.TclFallback |= bit;
- if (oldfallback == 0) {
- if (R200_DEBUG & RADEON_FALLBACKS)
- fprintf(stderr, "R200 begin tcl fallback %s\n",
- getFallbackString( bit ));
- transition_to_swtnl( ctx );
- }
- }
- else {
- rmesa->radeon.TclFallback &= ~bit;
- if (oldfallback == bit) {
- if (R200_DEBUG & RADEON_FALLBACKS)
- fprintf(stderr, "R200 end tcl fallback %s\n",
- getFallbackString( bit ));
- transition_to_hwtnl( ctx );
- }
- }
+ r200ContextPtr rmesa = R200_CONTEXT(ctx);
+ GLuint oldfallback = rmesa->radeon.TclFallback;
+
+ if (mode) {
+ if (oldfallback == 0) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
+ if (R200_DEBUG & RADEON_FALLBACKS)
+ fprintf(stderr, "R200 begin tcl fallback %s\n",
+ getFallbackString( bit ));
+ rmesa->radeon.TclFallback |= bit;
+ transition_to_swtnl( ctx );
+ } else
+ rmesa->radeon.TclFallback |= bit;
+ } else {
+ if (oldfallback == bit) {
+ /* We have to flush before transition */
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
+
+ if (R200_DEBUG & RADEON_FALLBACKS)
+ fprintf(stderr, "R200 end tcl fallback %s\n",
+ getFallbackString( bit ));
+ rmesa->radeon.TclFallback &= ~bit;
+ transition_to_hwtnl( ctx );
+ } else
+ rmesa->radeon.TclFallback &= ~bit;
+ }
}
diff --git a/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c b/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
index 710cae727a1..b6dfe28def9 100644
--- a/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
+++ b/src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
@@ -190,6 +190,17 @@ static unsigned int use_source(struct r500_fragment_program_code* code, struct r
return 0;
}
+/**
+ * NOP the specified instruction if it is not a texture lookup.
+ */
+static void alu_nop(struct r300_fragment_program_compiler *c, int ip)
+{
+ PROG_CODE;
+
+ if ((code->inst[ip].inst0 & 0x3) != R500_INST_TYPE_TEX) {
+ code->inst[ip].inst0 |= R500_INST_NOP;
+ }
+}
/**
* Emit a paired ALU instruction.
@@ -205,6 +216,14 @@ static void emit_paired(struct r300_fragment_program_compiler *c, struct rc_pair
int ip = ++code->inst_end;
+ /* Quirk: MDH/MDV (DDX/DDY) need a NOP on previous non-TEX instructions. */
+ if (inst->RGB.Opcode == RC_OPCODE_DDX || inst->Alpha.Opcode == RC_OPCODE_DDX ||
+ inst->RGB.Opcode == RC_OPCODE_DDY || inst->Alpha.Opcode == RC_OPCODE_DDY) {
+ if (ip > 0) {
+ alu_nop(c, ip - 1);
+ }
+ }
+
code->inst[ip].inst5 = translate_rgb_op(c, inst->RGB.Opcode);
code->inst[ip].inst4 = translate_alpha_op(c, inst->Alpha.Opcode);
@@ -252,8 +271,8 @@ static void emit_paired(struct r300_fragment_program_compiler *c, struct rc_pair
code->inst[ip].inst4 |= translate_arg_alpha(inst, 1) << R500_ALPHA_SEL_B_SHIFT;
code->inst[ip].inst5 |= translate_arg_alpha(inst, 2) << R500_ALU_RGBA_ALPHA_SEL_C_SHIFT;
- code->inst[ip].inst3 |= R500_ALU_RGB_TARGET(inst->RGB.Target);
- code->inst[ip].inst4 |= R500_ALPHA_TARGET(inst->Alpha.Target);
+ code->inst[ip].inst3 |= R500_ALU_RGB_TARGET(inst->RGB.Target);
+ code->inst[ip].inst4 |= R500_ALPHA_TARGET(inst->Alpha.Target);
if (inst->WriteALUResult) {
code->inst[ip].inst3 |= R500_ALU_RGB_WMASK;
@@ -469,9 +488,8 @@ void r500BuildFragmentProgramHwCode(struct r300_fragment_program_compiler *compi
if (compiler->Base.Error)
return;
- assert(code->inst_end >= 0);
-
- if ((code->inst[code->inst_end].inst0 & R500_INST_TYPE_MASK) != R500_INST_TYPE_OUT) {
+ if (code->inst_end == -1 ||
+ (code->inst[code->inst_end].inst0 & R500_INST_TYPE_MASK) != R500_INST_TYPE_OUT) {
/* This may happen when dead-code elimination is disabled or
* when most of the fragment program logic is leading to a KIL */
if (code->inst_end >= 511) {
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c b/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
index c1c0181fac1..9d289fce342 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_opcodes.c
@@ -75,14 +75,14 @@ struct rc_opcode_info rc_opcodes[MAX_RC_OPCODE] = {
{
.Opcode = RC_OPCODE_DDX,
.Name = "DDX",
- .NumSrcRegs = 1,
+ .NumSrcRegs = 2,
.HasDstReg = 1,
.IsComponentwise = 1
},
{
.Opcode = RC_OPCODE_DDY,
.Name = "DDY",
- .NumSrcRegs = 1,
+ .NumSrcRegs = 2,
.HasDstReg = 1,
.IsComponentwise = 1
},
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c b/src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c
index fff5b0c2173..3a26e7daaf9 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c
@@ -159,11 +159,6 @@ static void set_pair_instruction(struct r300_fragment_program_compiler *c,
int nargs = opcode->NumSrcRegs;
int i;
- /* Special case for DDX/DDY (MDH/MDV). */
- if (inst->Opcode == RC_OPCODE_DDX || inst->Opcode == RC_OPCODE_DDY) {
- nargs++;
- }
-
for(i = 0; i < opcode->NumSrcRegs; ++i) {
int source;
if (needrgb && !istranscendent) {
diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
index b5c08aea49e..f5b7d57eab7 100644
--- a/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
+++ b/src/mesa/drivers/dri/r300/compiler/radeon_program_alu.c
@@ -506,6 +506,46 @@ static void transform_r300_vertex_ABS(struct radeon_compiler* c,
inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
}
+static void transform_r300_vertex_CMP(struct radeon_compiler* c,
+ struct rc_instruction* inst)
+{
+ /* There is no decent CMP available, so let's rig one up.
+ * CMP is defined as dst = src0 < 0.0 ? src1 : src2
+ * The following sequence consumes two temps and three extra slots,
+ * but should be equivalent:
+ *
+ * SLT tmp0, src0, 0.0
+ * SGE tmp1, src0, 0.0
+ * MUL tmp0, tmp0, src1
+ * MAD dst, src2, tmp1, tmp0
+ *
+ * Yes, I know, I'm a mad scientist. ~ C. */
+ int tempreg0 = rc_find_free_temporary(c);
+ int tempreg1 = rc_find_free_temporary(c);
+
+ /* SLT tmp0, src0, 0.0 */
+ emit2(c, inst->Prev, RC_OPCODE_SLT, 0,
+ dstreg(RC_FILE_TEMPORARY, tempreg0),
+ inst->U.I.SrcReg[0], builtin_zero);
+
+ /* SGE tmp1, src0, 0.0 */
+ emit2(c, inst->Prev, RC_OPCODE_SGE, 0,
+ dstreg(RC_FILE_TEMPORARY, tempreg1),
+ inst->U.I.SrcReg[0], builtin_zero);
+
+ /* MUL tmp0, tmp0, src1 */
+ emit2(c, inst->Prev, RC_OPCODE_MUL, 0,
+ dstreg(RC_FILE_TEMPORARY, tempreg0),
+ srcreg(RC_FILE_TEMPORARY, tempreg0), inst->U.I.SrcReg[1]);
+
+ /* MAD dst, src2, tmp1, tmp0 */
+ emit3(c, inst->Prev, RC_OPCODE_MAD, inst->U.I.SaturateMode,
+ inst->U.I.DstReg,
+ inst->U.I.SrcReg[2], srcreg(RC_FILE_TEMPORARY, tempreg1), srcreg(RC_FILE_TEMPORARY, tempreg0));
+
+ rc_remove_instruction(inst);
+}
+
/**
* For use with radeonLocalTransform, this transforms non-native ALU
* instructions of the r300 up to r500 vertex engine.
@@ -517,6 +557,7 @@ int r300_transform_vertex_alu(
{
switch(inst->U.I.Opcode) {
case RC_OPCODE_ABS: transform_r300_vertex_ABS(c, inst); return 1;
+ case RC_OPCODE_CMP: transform_r300_vertex_CMP(c, inst); return 1;
case RC_OPCODE_DP3: transform_DP3(c, inst); return 1;
case RC_OPCODE_DPH: transform_DPH(c, inst); return 1;
case RC_OPCODE_FLR: transform_FLR(c, inst); return 1;
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index e2dbb1dbf40..c40802aec6e 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -77,12 +77,29 @@ static int check_vpu(GLcontext *ctx, struct radeon_state_atom *atom)
cnt = vpu_count(atom->cmd);
if (r300->radeon.radeonScreen->kernel_mm) {
- extra = 5;
+ extra = 3;
}
return cnt ? (cnt * 4) + extra : 0;
}
+static int check_vpp(GLcontext *ctx, struct radeon_state_atom *atom)
+{
+ r300ContextPtr r300 = R300_CONTEXT(ctx);
+ int cnt;
+ int extra = 1;
+
+ if (r300->radeon.radeonScreen->kernel_mm) {
+ cnt = r300->selected_vp->code.constants.Count * 4;
+ extra = 3;
+ } else {
+ cnt = vpu_count(atom->cmd);
+ extra = 1;
+ }
+
+ return cnt ? (cnt * 4) + extra : 0;
+}
+
void r300_emit_vpu(struct r300_context *r300,
uint32_t *data,
unsigned len,
@@ -101,15 +118,26 @@ static void emit_vpu_state(GLcontext *ctx, struct radeon_state_atom * atom)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
drm_r300_cmd_header_t cmd;
- uint32_t addr, ndw;
+ uint32_t addr;
cmd.u = atom->cmd[0];
addr = (cmd.vpu.adrhi << 8) | cmd.vpu.adrlo;
- ndw = atom->check(ctx, atom);
r300_emit_vpu(r300, &atom->cmd[1], vpu_count(atom->cmd) * 4, addr);
}
+static void emit_vpp_state(GLcontext *ctx, struct radeon_state_atom * atom)
+{
+ r300ContextPtr r300 = R300_CONTEXT(ctx);
+ drm_r300_cmd_header_t cmd;
+ uint32_t addr;
+
+ cmd.u = atom->cmd[0];
+ addr = (cmd.vpu.adrhi << 8) | cmd.vpu.adrlo;
+
+ r300_emit_vpu(r300, &atom->cmd[1], r300->selected_vp->code.constants.Count * 4, addr);
+}
+
void r500_emit_fp(struct r300_context *r300,
uint32_t *data,
unsigned len,
@@ -785,11 +813,11 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.vpi.emit = emit_vpu_state;
if (is_r500) {
- ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
+ ALLOC_STATE(vpp, vpp, R300_VPP_CMDSIZE, 0);
r300->hw.vpp.cmd[0] =
cmdvpu(r300->radeon.radeonScreen, R500_PVS_CONST_START, 0);
if (r300->radeon.radeonScreen->kernel_mm)
- r300->hw.vpp.emit = emit_vpu_state;
+ r300->hw.vpp.emit = emit_vpp_state;
ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
r300->hw.vps.cmd[0] =
@@ -806,11 +834,11 @@ void r300InitCmdBuf(r300ContextPtr r300)
r300->hw.vpucp[i].emit = emit_vpu_state;
}
} else {
- ALLOC_STATE(vpp, vpu, R300_VPP_CMDSIZE, 0);
+ ALLOC_STATE(vpp, vpp, R300_VPP_CMDSIZE, 0);
r300->hw.vpp.cmd[0] =
cmdvpu(r300->radeon.radeonScreen, R300_PVS_CONST_START, 0);
if (r300->radeon.radeonScreen->kernel_mm)
- r300->hw.vpp.emit = emit_vpu_state;
+ r300->hw.vpp.emit = emit_vpp_state;
ALLOC_STATE(vps, vpu, R300_VPS_CMDSIZE, 0);
r300->hw.vps.cmd[0] =
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog_common.c b/src/mesa/drivers/dri/r300/r300_fragprog_common.c
index 61ea5e4d9a3..0646da46249 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog_common.c
+++ b/src/mesa/drivers/dri/r300/r300_fragprog_common.c
@@ -256,6 +256,19 @@ static void translate_fragment_program(GLcontext *ctx, struct r300_fragment_prog
fp->InputsRead = compiler.Base.Program.InputsRead;
+ /* Clear the fog/wpos_attr if code accessing these
+ * attributes has been removed during compilation
+ */
+ if (fp->fog_attr != FRAG_ATTRIB_MAX) {
+ if (!(fp->InputsRead & (1 << fp->fog_attr)))
+ fp->fog_attr = FRAG_ATTRIB_MAX;
+ }
+
+ if (fp->wpos_attr != FRAG_ATTRIB_MAX) {
+ if (!(fp->InputsRead & (1 << fp->wpos_attr)))
+ fp->wpos_attr = FRAG_ATTRIB_MAX;
+ }
+
rc_destroy(&compiler.Base);
}
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 749a2464e7c..e660b1fb3bb 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -2396,11 +2396,10 @@ void r300InitStateFuncs(radeonContextPtr radeon, struct dd_function_table *funct
functions->DrawBuffer = radeonDrawBuffer;
functions->ReadBuffer = radeonReadBuffer;
- if (radeon->radeonScreen->kernel_mm) {
- functions->CopyPixels = _mesa_meta_CopyPixels;
- functions->DrawPixels = _mesa_meta_DrawPixels;
+ functions->CopyPixels = _mesa_meta_CopyPixels;
+ functions->DrawPixels = _mesa_meta_DrawPixels;
+ if (radeon->radeonScreen->kernel_mm)
functions->ReadPixels = radeonReadPixels;
- }
}
void r300InitShaderFunctions(r300ContextPtr r300)
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index 129004fee78..a1fe3780294 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -263,15 +263,25 @@ static struct r300_vertex_program *build_program(GLcontext *ctx,
rc_move_output(&compiler.Base, VERT_RESULT_PSIZ, VERT_RESULT_PSIZ, WRITEMASK_X);
if (vp->key.WPosAttr != FRAG_ATTRIB_MAX) {
- rc_copy_output(&compiler.Base,
- VERT_RESULT_HPOS,
- vp->key.WPosAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0);
+ unsigned int vp_wpos_attr = vp->key.WPosAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0;
+
+ /* Set empty writemask for instructions writing to vp_wpos_attr
+ * before moving the wpos attr there.
+ * Such instructions will be removed by DCE.
+ */
+ rc_move_output(&compiler.Base, vp_wpos_attr, vp->key.WPosAttr, 0);
+ rc_copy_output(&compiler.Base, VERT_RESULT_HPOS, vp_wpos_attr);
}
if (vp->key.FogAttr != FRAG_ATTRIB_MAX) {
- rc_move_output(&compiler.Base,
- VERT_RESULT_FOGC,
- vp->key.FogAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0, WRITEMASK_X);
+ unsigned int vp_fog_attr = vp->key.FogAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0;
+
+ /* Set empty writemask for instructions writing to vp_fog_attr
+ * before moving the fog attr there.
+ * Such instructions will be removed by DCE.
+ */
+ rc_move_output(&compiler.Base, vp_fog_attr, vp->key.FogAttr, 0);
+ rc_move_output(&compiler.Base, VERT_RESULT_FOGC, vp_fog_attr, WRITEMASK_X);
}
r3xx_compile_vertex_program(&compiler);
@@ -382,7 +392,11 @@ void r300SetupVertexProgram(r300ContextPtr rmesa)
R300_STATECHANGE(rmesa, vap_cntl);
R300_STATECHANGE(rmesa, vpp);
param_count = r300VertexProgUpdateParams(ctx, prog, (float *)&rmesa->hw.vpp.cmd[R300_VPP_PARAM_0]);
- bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
+ if (!rmesa->radeon.radeonScreen->kernel_mm && param_count > 255 * 4) {
+ WARN_ONCE("Too many VP params, expect rendering errors\n");
+ }
+ /* Prevent the overflow (vpu.count is u8) */
+ bump_vpu_count(rmesa->hw.vpp.cmd, MIN2(255 * 4, param_count));
param_count /= 4;
r300EmitVertexProgram(rmesa, R300_PVS_CODE_START, &(prog->code));
@@ -395,6 +409,6 @@ void r300SetupVertexProgram(r300ContextPtr rmesa)
rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] = (0 << R300_PVS_FIRST_INST_SHIFT) | (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
(inst_count << R300_PVS_LAST_INST_SHIFT);
- rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
+ rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | ((param_count - 1) << R300_PVS_MAX_CONST_ADDR_SHIFT);
rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] = (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
}
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 2953ffd0288..1da31e7b2b4 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -615,7 +615,7 @@ static GLuint translate_logicop(GLenum logicop)
case GL_XOR:
return 0x66;
case GL_EQUIV:
- return 0xaa;
+ return 0x99;
case GL_AND_REVERSE:
return 0x44;
case GL_AND_INVERTED:
@@ -1861,10 +1861,9 @@ void r700InitStateFuncs(radeonContextPtr radeon, struct dd_function_table *funct
functions->DrawBuffer = radeonDrawBuffer;
functions->ReadBuffer = radeonReadBuffer;
- if (radeon->radeonScreen->kernel_mm) {
- functions->CopyPixels = _mesa_meta_CopyPixels;
- functions->DrawPixels = _mesa_meta_DrawPixels;
+ functions->CopyPixels = _mesa_meta_CopyPixels;
+ functions->DrawPixels = _mesa_meta_DrawPixels;
+ if (radeon->radeonScreen->kernel_mm)
functions->ReadPixels = radeonReadPixels;
- }
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index 22499bc38d1..6b7690cf8b3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -184,9 +184,6 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size)
radeon_print(RADEON_DMA, RADEON_NORMAL, "%s size %d minimum_size %d\n",
__FUNCTION__, size, rmesa->dma.minimum_size);
- if (!is_empty_list(&rmesa->dma.reserved))
- radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
-
if (is_empty_list(&rmesa->dma.free)
|| last_elem(&rmesa->dma.free)->bo->size < size) {
dma_bo = CALLOC_STRUCT(radeon_dma_bo);
@@ -336,9 +333,6 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
legacy_track_pending(rmesa->radeonScreen->bom, 0);
}
- if (!is_empty_list(&rmesa->dma.reserved))
- radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo);
-
/* move waiting bos to free list.
wait list provides gpu time to handle data before reuse */
foreach_s(dma_bo, temp, &rmesa->dma.wait) {
@@ -368,6 +362,7 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
/* move reserved to wait list */
foreach_s(dma_bo, temp, &rmesa->dma.reserved) {
+ radeon_bo_unmap(dma_bo->bo);
/* free objects that are too small to be used because of large request */
if (dma_bo->bo->size < rmesa->dma.minimum_size) {
radeon_bo_unref(dma_bo->bo);
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 0afbc19c127..539b067742f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -2249,11 +2249,10 @@ void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
ctx->Driver.DrawBuffer = radeonDrawBuffer;
ctx->Driver.ReadBuffer = radeonReadBuffer;
- if (dri2) {
- ctx->Driver.CopyPixels = _mesa_meta_CopyPixels;
- ctx->Driver.DrawPixels = _mesa_meta_DrawPixels;
+ ctx->Driver.CopyPixels = _mesa_meta_CopyPixels;
+ ctx->Driver.DrawPixels = _mesa_meta_DrawPixels;
+ if (dri2)
ctx->Driver.ReadPixels = radeonReadPixels;
- }
ctx->Driver.AlphaFunc = radeonAlphaFunc;
ctx->Driver.BlendEquationSeparate = radeonBlendEquationSeparate;
diff --git a/src/mesa/drivers/dri/swrast/Makefile b/src/mesa/drivers/dri/swrast/Makefile
index cc59eefdb2d..d2cf6dbc55b 100644
--- a/src/mesa/drivers/dri/swrast/Makefile
+++ b/src/mesa/drivers/dri/swrast/Makefile
@@ -5,6 +5,8 @@ include $(TOP)/configs/current
LIBNAME = swrast_dri.so
+DRIVER_DEFINES = -D__NOT_HAVE_DRM_H
+
DRIVER_SOURCES = \
swrast.c \
swrast_span.c
@@ -18,7 +20,7 @@ ASM_SOURCES =
SWRAST_COMMON_SOURCES = \
../../common/driverfuncs.c \
../common/utils.c \
- ../common/dri_sw.c
+ ../common/drisw_util.c
include ../Makefile.template
diff --git a/src/mesa/drivers/dri/swrast/swrast.c b/src/mesa/drivers/dri/swrast/swrast.c
index e9ca99a86f0..8b68281fab0 100644
--- a/src/mesa/drivers/dri/swrast/swrast.c
+++ b/src/mesa/drivers/dri/swrast/swrast.c
@@ -206,12 +206,20 @@ swrast_delete_renderbuffer(struct gl_renderbuffer *rb)
free(rb);
}
+/* see bytes_per_line in libGL */
+static INLINE int
+bytes_per_line(unsigned pitch_bits, unsigned mul)
+{
+ unsigned mask = mul - 1;
+
+ return ((pitch_bits + mask) & ~mask) / 8;
+}
+
static GLboolean
swrast_alloc_front_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
GLenum internalFormat, GLuint width, GLuint height)
{
struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
- unsigned mask = PITCH_ALIGN_BITS - 1;
TRACE;
@@ -219,8 +227,7 @@ swrast_alloc_front_storage(GLcontext *ctx, struct gl_renderbuffer *rb,
rb->Width = width;
rb->Height = height;
- /* always pad to PITCH_ALIGN_BITS */
- xrb->pitch = ((width * xrb->bpp + mask) & ~mask) / 8;
+ xrb->pitch = bytes_per_line(width * xrb->bpp, 32);
return GL_TRUE;
}
@@ -394,8 +401,10 @@ dri_swap_buffers(__DRIdrawable * dPriv)
fb = &drawable->Base;
- frontrb = swrast_renderbuffer(fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer);
- backrb = swrast_renderbuffer(fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer);
+ frontrb =
+ swrast_renderbuffer(fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer);
+ backrb =
+ swrast_renderbuffer(fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer);
/* check for signle-buffered */
if (backrb == NULL)
diff --git a/src/mesa/drivers/dri/swrast/swrast_priv.h b/src/mesa/drivers/dri/swrast/swrast_priv.h
index 77670d89a5e..6679061a983 100644
--- a/src/mesa/drivers/dri/swrast/swrast_priv.h
+++ b/src/mesa/drivers/dri/swrast/swrast_priv.h
@@ -30,7 +30,7 @@
#include <GL/gl.h>
#include <GL/internal/dri_interface.h>
#include "main/mtypes.h"
-#include "dri_sw.h"
+#include "drisw_util.h"
/**
@@ -124,14 +124,6 @@ swrast_renderbuffer(struct gl_renderbuffer *rb)
#define PF_R3G3B2 3 /**< 8bpp TrueColor: 3-R, 3-G, 2-B bits */
#define PF_X8R8G8B8 4 /**< 32bpp TrueColor: 8-R, 8-G, 8-B bits */
-/**
- * Renderbuffer pitch alignment (in bits).
- *
- * The xorg loader requires padding images to 32 bits. However, this should
- * become a screen/drawable parameter XXX
- */
-#define PITCH_ALIGN_BITS 32
-
/* swrast_span.c */
diff --git a/src/mesa/drivers/dri/swrast/swrast_span.c b/src/mesa/drivers/dri/swrast/swrast_span.c
index c5681e34a91..c7d0bfdac72 100644
--- a/src/mesa/drivers/dri/swrast/swrast_span.c
+++ b/src/mesa/drivers/dri/swrast/swrast_span.c
@@ -236,7 +236,7 @@ static const GLubyte kernel[16] = {
struct swrast_renderbuffer *xrb = swrast_renderbuffer(rb);
#define INIT_PIXEL_PTR(P, X, Y) \
GLushort *P = (GLushort *)row;
-#define INC_PIXEL_PTR(P) P += 2
+#define INC_PIXEL_PTR(P) P++
#define STORE_PIXEL(DST, X, Y, VALUE) \
STORE_PIXEL_R5G6B5(DST, X, Y, VALUE)
#define FETCH_PIXEL(DST, SRC) \
diff --git a/src/mesa/drivers/dri/swrast/swrast_spantemp.h b/src/mesa/drivers/dri/swrast/swrast_spantemp.h
index 079726ae4ab..1e9405eebfb 100644
--- a/src/mesa/drivers/dri/swrast/swrast_spantemp.h
+++ b/src/mesa/drivers/dri/swrast/swrast_spantemp.h
@@ -37,7 +37,7 @@
#define _SWRAST_SPANTEMP_ONCE
static INLINE void
-PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLubyte *p )
+PUT_PIXEL( GLcontext *glCtx, GLint x, GLint y, GLvoid *p )
{
__DRIcontext *ctx = swrast_context(glCtx)->cPriv;
__DRIdrawable *draw = swrast_drawable(glCtx->DrawBuffer)->dPriv;
@@ -168,7 +168,8 @@ NAME(put_row)( GLcontext *ctx, struct gl_renderbuffer *rb,
if (mask) {
for (i = 0; i < count; i++) {
if (mask[i]) {
- RB_TYPE pixel[4];
+ RB_TYPE row[4];
+ INIT_PIXEL_PTR(pixel, x, y);
STORE_PIXEL(pixel, x + i, y, src[i]);
PUT_PIXEL(ctx, x + i, YFLIP(xrb, y), pixel);
}
@@ -200,7 +201,8 @@ NAME(put_row_rgb)( GLcontext *ctx, struct gl_renderbuffer *rb,
if (mask) {
for (i = 0; i < count; i++) {
if (mask[i]) {
- RB_TYPE pixel[4];
+ RB_TYPE row[4];
+ INIT_PIXEL_PTR(pixel, x, y);
#ifdef STORE_PIXEL_RGB
STORE_PIXEL_RGB(pixel, x + i, y, src[i]);
#else
@@ -240,7 +242,8 @@ NAME(put_mono_row)( GLcontext *ctx, struct gl_renderbuffer *rb,
if (mask) {
for (i = 0; i < count; i++) {
if (mask[i]) {
- RB_TYPE pixel[4];
+ RB_TYPE row[4];
+ INIT_PIXEL_PTR(pixel, x, y);
STORE_PIXEL(pixel, x + i, y, src);
PUT_PIXEL(ctx, x + i, YFLIP(xrb, y), pixel);
}
@@ -272,7 +275,8 @@ NAME(put_values)( GLcontext *ctx, struct gl_renderbuffer *rb,
ASSERT(mask);
for (i = 0; i < count; i++) {
if (mask[i]) {
- RB_TYPE pixel[4];
+ RB_TYPE row[4];
+ INIT_PIXEL_PTR(pixel, x, y);
STORE_PIXEL(pixel, x[i], y[i], src[i]);
PUT_PIXEL(ctx, x[i], YFLIP(xrb, y[i]), pixel);
}
@@ -294,7 +298,8 @@ NAME(put_mono_values)( GLcontext *ctx, struct gl_renderbuffer *rb,
ASSERT(mask);
for (i = 0; i < count; i++) {
if (mask[i]) {
- RB_TYPE pixel[4];
+ RB_TYPE row[4];
+ INIT_PIXEL_PTR(pixel, x, y);
STORE_PIXEL(pixel, x[i], y[i], src);
PUT_PIXEL(ctx, x[i], YFLIP(xrb, y[i]), pixel);
}
diff --git a/src/mesa/drivers/glslcompiler/Makefile b/src/mesa/drivers/glslcompiler/Makefile
index 080fe475c16..7dcf9a6541a 100644
--- a/src/mesa/drivers/glslcompiler/Makefile
+++ b/src/mesa/drivers/glslcompiler/Makefile
@@ -9,12 +9,9 @@ PROGRAM = glslcompiler
OBJECTS = \
glslcompiler.o \
- ../../glapi/glapi.o \
- ../../glapi/glapi_nop.o \
- ../../glapi/glthread.o \
- ../../main/dispatch.o \
../common/driverfuncs.o \
- ../../libmesa.a
+ ../../libmesa.a \
+ ../../libglapi.a
INCLUDES = \
-I$(TOP)/include \
diff --git a/src/mesa/drivers/glslcompiler/glslcompiler.c b/src/mesa/drivers/glslcompiler/glslcompiler.c
index 66035a4a43c..d58f32b2930 100644
--- a/src/mesa/drivers/glslcompiler/glslcompiler.c
+++ b/src/mesa/drivers/glslcompiler/glslcompiler.c
@@ -68,6 +68,7 @@ static const char *Prog = "glslcompiler";
struct options {
GLboolean LineNumbers;
+ GLboolean Link;
gl_prog_print_mode Mode;
const char *VertFile;
const char *FragFile;
@@ -207,23 +208,29 @@ ReadShader(GLuint shader, const char *filename)
}
-#if 0
static void
-CheckLink(GLuint prog)
+CheckLink(GLuint v_shader, GLuint f_shader)
{
+ GLuint prog;
GLint stat;
+
+ prog = _mesa_CreateProgram();
+
+ _mesa_AttachShader(prog, v_shader);
+ _mesa_AttachShader(prog, f_shader);
+
+ _mesa_LinkProgramARB(prog);
_mesa_GetProgramiv(prog, GL_LINK_STATUS, &stat);
if (!stat) {
GLchar log[1000];
GLsizei len;
_mesa_GetProgramInfoLog(prog, 1000, &len, log);
- fprintf(stderr, "%s: Linker error:\n%s\n", Prog, log);
+ fprintf(stderr, "Linker error:\n%s\n", log);
}
else {
- fprintf(stderr, "%s: Link success!\n", Prog);
+ fprintf(stderr, "Link success!\n");
}
}
-#endif
static void
@@ -262,6 +269,7 @@ Usage(void)
printf(" --fs FILE fragment shader input filename\n");
printf(" --arb emit ARB-style instructions\n");
printf(" --nv emit NV-style instructions\n");
+ printf(" --link run linker\n");
printf(" --debug force #pragma debug(on)\n");
printf(" --nodebug force #pragma debug(off)\n");
printf(" --opt force #pragma optimize(on)\n");
@@ -309,6 +317,9 @@ ParseOptions(int argc, char *argv[])
else if (strcmp(argv[i], "--nv") == 0) {
Options.Mode = PROG_PRINT_NV;
}
+ else if (strcmp(argv[i], "--link") == 0) {
+ Options.Link = GL_TRUE;
+ }
else if (strcmp(argv[i], "--debug") == 0) {
Options.Pragmas.IgnoreDebug = GL_TRUE;
Options.Pragmas.Debug = GL_TRUE;
@@ -358,7 +369,7 @@ ParseOptions(int argc, char *argv[])
int
main(int argc, char *argv[])
{
- GLuint shader = 0;
+ GLuint v_shader = 0, f_shader = 0;
ParseOptions(argc, argv);
@@ -368,24 +379,38 @@ main(int argc, char *argv[])
}
if (Options.VertFile) {
- shader = CompileShader(Options.VertFile, GL_VERTEX_SHADER);
+ v_shader = CompileShader(Options.VertFile, GL_VERTEX_SHADER);
}
- else if (Options.FragFile) {
- shader = CompileShader(Options.FragFile, GL_FRAGMENT_SHADER);
+
+ if (Options.FragFile) {
+ f_shader = CompileShader(Options.FragFile, GL_FRAGMENT_SHADER);
}
- if (shader) {
+ if (v_shader || f_shader) {
if (Options.OutputFile) {
fclose(stdout);
/*stdout =*/ freopen(Options.OutputFile, "w", stdout);
}
- if (stdout) {
- PrintShaderInstructions(shader, stdout);
+ if (stdout && v_shader) {
+ PrintShaderInstructions(v_shader, stdout);
+ }
+ if (stdout && f_shader) {
+ PrintShaderInstructions(f_shader, stdout);
}
if (Options.OutputFile) {
fclose(stdout);
}
}
+ if (Options.Link) {
+ if (!v_shader || !f_shader) {
+ fprintf(stderr,
+ "--link option requires both a vertex and fragment shader.\n");
+ exit(1);
+ }
+
+ CheckLink(v_shader, f_shader);
+ }
+
return 0;
}
diff --git a/src/mesa/drivers/x11/glxapi.c b/src/mesa/drivers/x11/glxapi.c
index e11aff1a849..955eba4e944 100644
--- a/src/mesa/drivers/x11/glxapi.c
+++ b/src/mesa/drivers/x11/glxapi.c
@@ -1113,7 +1113,7 @@ glXGetAGPOffsetMESA( const GLvoid *pointer )
/*** GLX_MESA_allocate_memory */
-void *
+void PUBLIC *
glXAllocateMemoryMESA(Display *dpy, int scrn, size_t size,
float readfreq, float writefreq, float priority)
{
@@ -1121,14 +1121,14 @@ glXAllocateMemoryMESA(Display *dpy, int scrn, size_t size,
return NULL;
}
-void
+void PUBLIC
glXFreeMemoryMESA(Display *dpy, int scrn, void *pointer)
{
/* dummy */
}
-GLuint
+GLuint PUBLIC
glXGetMemoryOffsetMESA(Display *dpy, int scrn, const void *pointer)
{
/* dummy */
@@ -1138,7 +1138,7 @@ glXGetMemoryOffsetMESA(Display *dpy, int scrn, const void *pointer)
/*** GLX_EXT_texture_from_pixmap */
-void
+void PUBLIC
glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer,
const int *attrib_list)
{
@@ -1148,7 +1148,7 @@ glXBindTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer,
t->BindTexImageEXT(dpy, drawable, buffer, attrib_list);
}
-void
+void PUBLIC
glXReleaseTexImageEXT(Display *dpy, GLXDrawable drawable, int buffer)
{
struct _glxapi_table *t;
@@ -1426,7 +1426,7 @@ _glxapi_get_proc_address(const char *funcName)
* This function does not get dispatched through the dispatch table
* since it's really a "meta" function.
*/
-__GLXextFuncPtr
+__GLXextFuncPtr PUBLIC
glXGetProcAddressARB(const GLubyte *procName)
{
__GLXextFuncPtr f;
@@ -1442,7 +1442,8 @@ glXGetProcAddressARB(const GLubyte *procName)
/* GLX 1.4 */
-void (*glXGetProcAddress(const GLubyte *procName))()
+void PUBLIC
+(*glXGetProcAddress(const GLubyte *procName))()
{
return glXGetProcAddressARB(procName);
}