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-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index bff423e19dc..4c2d11da44b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -140,17 +140,26 @@ brw_emit_surface_state(struct brw_context *brw,
union isl_color_value clear_color = { .u32 = { 0, 0, 0, 0 } };
+ drm_intel_bo *aux_bo;
struct isl_surf *aux_surf = NULL, aux_surf_s;
uint64_t aux_offset = 0;
enum isl_aux_usage aux_usage = ISL_AUX_USAGE_NONE;
- if (mt->mcs_buf && !(flags & INTEL_AUX_BUFFER_DISABLED)) {
+ if ((mt->mcs_buf || intel_miptree_sample_with_hiz(brw, mt)) &&
+ !(flags & INTEL_AUX_BUFFER_DISABLED)) {
intel_miptree_get_aux_isl_surf(brw, mt, &aux_surf_s, &aux_usage);
aux_surf = &aux_surf_s;
- assert(mt->mcs_buf->offset == 0);
- aux_offset = mt->mcs_buf->bo->offset64;
+
+ if (mt->mcs_buf) {
+ assert(mt->mcs_buf->offset == 0);
+ aux_bo = mt->mcs_buf->bo;
+ aux_offset = mt->mcs_buf->bo->offset64;
+ } else {
+ aux_bo = mt->hiz_buf->aux_base.bo;
+ aux_offset = mt->hiz_buf->aux_base.bo->offset64;
+ }
/* We only really need a clear color if we also have an auxiliary
- * surfacae. Without one, it does nothing.
+ * surface. Without one, it does nothing.
*/
clear_color = intel_miptree_get_isl_clear_color(brw, mt);
}
@@ -181,8 +190,7 @@ brw_emit_surface_state(struct brw_context *brw,
assert((aux_offset & 0xfff) == 0);
drm_intel_bo_emit_reloc(brw->batch.bo,
*surf_offset + 4 * ss_info.aux_reloc_dw,
- mt->mcs_buf->bo,
- dw[ss_info.aux_reloc_dw] & 0xfff,
+ aux_bo, dw[ss_info.aux_reloc_dw] & 0xfff,
read_domains, write_domains);
}
}