diff options
Diffstat (limited to 'src/mesa/drivers/dri')
29 files changed, 335 insertions, 100 deletions
diff --git a/src/mesa/drivers/dri/common/depthtmp.h b/src/mesa/drivers/dri/common/depthtmp.h index 55199abf6a3..fd2dab3b422 100644 --- a/src/mesa/drivers/dri/common/depthtmp.h +++ b/src/mesa/drivers/dri/common/depthtmp.h @@ -29,7 +29,7 @@ static void TAG(WriteDepthSpan)( GLcontext *ctx, { HW_WRITE_LOCK() { - const GLuint *depth = (const GLuint *) values; + const VALUE_TYPE *depth = (const VALUE_TYPE *) values; GLint x1; GLint n1; LOCAL_DEPTH_VARS; @@ -134,7 +134,7 @@ static void TAG(WriteDepthPixels)( GLcontext *ctx, { HW_WRITE_LOCK() { - const GLuint *depth = (const GLuint *) values; + const VALUE_TYPE *depth = (const VALUE_TYPE *) values; GLuint i; LOCAL_DEPTH_VARS; @@ -180,7 +180,7 @@ static void TAG(ReadDepthSpan)( GLcontext *ctx, { HW_READ_LOCK() { - GLuint *depth = (GLuint *) values; + VALUE_TYPE *depth = (VALUE_TYPE *) values; GLint x1, n1; LOCAL_DEPTH_VARS; @@ -215,7 +215,7 @@ static void TAG(ReadDepthPixels)( GLcontext *ctx, { HW_READ_LOCK() { - GLuint *depth = (GLuint *) values; + VALUE_TYPE *depth = (VALUE_TYPE *) values; GLuint i; LOCAL_DEPTH_VARS; @@ -267,3 +267,4 @@ static void TAG(InitDepthPointers)(struct gl_renderbuffer *rb) #undef READ_DEPTH #endif #undef TAG +#undef VALUE_TYPE diff --git a/src/mesa/drivers/dri/gamma/gamma_span.c b/src/mesa/drivers/dri/gamma/gamma_span.c index f62bea9b66d..933f62c96c7 100644 --- a/src/mesa/drivers/dri/gamma/gamma_span.c +++ b/src/mesa/drivers/dri/gamma/gamma_span.c @@ -112,6 +112,8 @@ do { \ /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d; @@ -125,6 +127,8 @@ do { \ #if 0 /* Unused */ /* 32 bit depthbuffer functions. */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) \ *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = d; @@ -138,6 +142,8 @@ do { \ /* 24/8 bit interleaved depth/stencil functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) { \ GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch); \ tmp &= 0xff; \ diff --git a/src/mesa/drivers/dri/i810/i810span.c b/src/mesa/drivers/dri/i810/i810span.c index 2112800eebc..59511de973b 100644 --- a/src/mesa/drivers/dri/i810/i810span.c +++ b/src/mesa/drivers/dri/i810/i810span.c @@ -67,6 +67,8 @@ do { \ /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d; diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index ef90260e2a0..bc933fe7e4d 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -562,6 +562,7 @@ static void precalc_tex( struct brw_wm_compile *c, { struct prog_src_register coord; struct prog_dst_register tmpcoord; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; if (inst->TexSrcTarget == TEXTURE_CUBE_INDEX) { struct prog_instruction *out; @@ -618,7 +619,7 @@ static void precalc_tex( struct brw_wm_compile *c, search_or_add_param5( c, STATE_INTERNAL, STATE_TEXRECT_SCALE, - inst->TexSrcUnit, + unit, 0,0 ); tmpcoord = get_temp(c); @@ -644,19 +645,19 @@ static void precalc_tex( struct brw_wm_compile *c, * conversion requires allocating a temporary variable which we * don't have the facility to do that late in the compilation. */ - if (!(c->key.yuvtex_mask & (1<<inst->TexSrcUnit))) { + if (!(c->key.yuvtex_mask & (1<<unit))) { emit_op(c, OPCODE_TEX, inst->DstReg, inst->SaturateMode, - inst->TexSrcUnit, + unit, inst->TexSrcTarget, coord, src_undef(), src_undef()); } else { - GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<inst->TexSrcUnit); + GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<unit); /* CONST C0 = { -.5, -.0625, -.5, 1.164 } @@ -682,7 +683,7 @@ static void precalc_tex( struct brw_wm_compile *c, OPCODE_TEX, tmp, inst->SaturateMode, - inst->TexSrcUnit, + unit, inst->TexSrcTarget, coord, src_undef(), @@ -1029,6 +1030,11 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) precalc_txp(c, inst); break; + case OPCODE_TXB: + out = emit_insn(c, inst); + out->TexSrcUnit = fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + break; + case OPCODE_XPD: out = emit_insn(c, inst); /* This should probably be done in the parser. diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index faa2837fa01..305100f8833 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -998,6 +998,8 @@ static void emit_txb(struct brw_wm_compile *c, { struct brw_compile *p = &c->func; struct brw_reg dst[4], src[4], payload_reg; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + GLuint i; payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0); for (i = 0; i < 4; i++) @@ -1029,8 +1031,8 @@ static void emit_txb(struct brw_wm_compile *c, retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW), 1, retype(payload_reg, BRW_REGISTER_TYPE_UW), - inst->TexSrcUnit + MAX_DRAW_BUFFERS, /* surface */ - inst->TexSrcUnit, /* sampler */ + unit + MAX_DRAW_BUFFERS, /* surface */ + unit, /* sampler */ inst->DstReg.WriteMask, BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS, 4, @@ -1043,10 +1045,12 @@ static void emit_tex(struct brw_wm_compile *c, { struct brw_compile *p = &c->func; struct brw_reg dst[4], src[4], payload_reg; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + GLuint msg_len; GLuint i, nr; GLuint emit; - GLboolean shadow = (c->key.shadowtex_mask & (1<<inst->TexSrcUnit)) ? 1 : 0; + GLboolean shadow = (c->key.shadowtex_mask & (1<<unit)) ? 1 : 0; payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0); @@ -1091,8 +1095,8 @@ static void emit_tex(struct brw_wm_compile *c, retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW), 1, retype(payload_reg, BRW_REGISTER_TYPE_UW), - inst->TexSrcUnit + MAX_DRAW_BUFFERS, /* surface */ - inst->TexSrcUnit, /* sampler */ + unit + MAX_DRAW_BUFFERS, /* surface */ + unit, /* sampler */ inst->DstReg.WriteMask, BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE, 4, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 36dce171c62..9ed89906d5c 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -55,7 +55,7 @@ PUBLIC const char __driConfigOptions[] = DRI_CONF_BEGIN DRI_CONF_SECTION_PERFORMANCE DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) - DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0) + DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC) /* Options correspond to DRI_CONF_BO_REUSE_DISABLED, * DRI_CONF_BO_REUSE_ALL */ diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 079b9e6a9d9..edede3a74b4 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -404,6 +404,7 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, /** ** 16-bit depthbuffer functions. **/ +#define VALUE_TYPE GLushort #define WRITE_DEPTH(_x, _y, d) \ pwrite_16(irb, no_tile_swizzle(irb, intel, _x, _y), d) #define READ_DEPTH(d, _x, _y) \ @@ -415,6 +416,7 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, /** ** 16-bit x tile depthbuffer functions. **/ +#define VALUE_TYPE GLushort #define WRITE_DEPTH(_x, _y, d) \ pwrite_16(irb, x_tile_swizzle(irb, intel, _x, _y), d) #define READ_DEPTH(d, _x, _y) \ @@ -425,6 +427,7 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, /** ** 16-bit y tile depthbuffer functions. **/ +#define VALUE_TYPE GLushort #define WRITE_DEPTH(_x, _y, d) \ pwrite_16(irb, y_tile_swizzle(irb, intel, _x, _y), d) #define READ_DEPTH(d, _x, _y) \ @@ -439,6 +442,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, ** The wrappers in main/depthstencil.c are used to extract the depth ** and stencil values. **/ +#define VALUE_TYPE GLuint + /* Change ZZZS -> SZZZ */ #define WRITE_DEPTH(_x, _y, d) \ pwrite_32(irb, no_tile_swizzle(irb, intel, _x, _y), \ @@ -460,6 +465,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, ** The wrappers in main/depthstencil.c are used to extract the depth ** and stencil values. **/ +#define VALUE_TYPE GLuint + /* Change ZZZS -> SZZZ */ #define WRITE_DEPTH(_x, _y, d) \ pwrite_32(irb, x_tile_swizzle(irb, intel, _x, _y), \ @@ -480,6 +487,8 @@ static uint32_t y_tile_swizzle(struct intel_renderbuffer *irb, ** The wrappers in main/depthstencil.c are used to extract the depth ** and stencil values. **/ +#define VALUE_TYPE GLuint + /* Change ZZZS -> SZZZ */ #define WRITE_DEPTH(_x, _y, d) \ pwrite_32(irb, y_tile_swizzle(irb, intel, _x, _y), \ diff --git a/src/mesa/drivers/dri/mach64/mach64_span.c b/src/mesa/drivers/dri/mach64/mach64_span.c index 3830a28165b..aa8c72513ba 100644 --- a/src/mesa/drivers/dri/mach64/mach64_span.c +++ b/src/mesa/drivers/dri/mach64/mach64_span.c @@ -117,6 +117,8 @@ /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + ((_x) + (_y) * drb->pitch) * 2) = d; diff --git a/src/mesa/drivers/dri/mga/mgaspan.c b/src/mesa/drivers/dri/mga/mgaspan.c index 05dcbb85263..7ac59661acd 100644 --- a/src/mesa/drivers/dri/mga/mgaspan.c +++ b/src/mesa/drivers/dri/mga/mgaspan.c @@ -107,6 +107,8 @@ /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + (_x)*2 + (_y)*pitch) = d; @@ -121,6 +123,8 @@ /* 32 bit depthbuffer functions. */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) \ *(GLuint *)(buf + (_x)*4 + (_y)*pitch) = d; @@ -134,6 +138,8 @@ /* 24/8 bit interleaved depth/stencil functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) { \ GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*pitch); \ tmp &= 0xff; \ diff --git a/src/mesa/drivers/dri/r128/r128_span.c b/src/mesa/drivers/dri/r128/r128_span.c index 85798c16013..9b73886816f 100644 --- a/src/mesa/drivers/dri/r128/r128_span.c +++ b/src/mesa/drivers/dri/r128/r128_span.c @@ -131,6 +131,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 16-bit depth buffer functions */ +#define VALUE_TYPE GLushort #define WRITE_DEPTH_SPAN() \ do { \ @@ -207,6 +208,8 @@ do { \ /* 24-bit depth, 8-bit stencil buffer functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH_SPAN() \ do { \ GLuint buf[n]; \ diff --git a/src/mesa/drivers/dri/r200/r200_span.c b/src/mesa/drivers/dri/r200/r200_span.c index ff2eb011225..3d7a0002180 100644 --- a/src/mesa/drivers/dri/r200/r200_span.c +++ b/src/mesa/drivers/dri/r200/r200_span.c @@ -172,6 +172,7 @@ r200_mba_z16( driRenderbuffer *drb, GLint x, GLint y ) /* 16-bit depth buffer functions */ +#define VALUE_TYPE GLushort #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + r200_mba_z16( drb, _x + xo, _y + yo )) = d; @@ -185,6 +186,7 @@ r200_mba_z16( driRenderbuffer *drb, GLint x, GLint y ) /* 24 bit depth, 8 bit stencil depthbuffer functions */ +#define VALUE_TYPE GLuint #define WRITE_DEPTH( _x, _y, d ) \ do { \ diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index e7a37dd4c99..24b9b3b696f 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -102,37 +102,39 @@ static void r200SetTexWrap( r200TexObjPtr t, GLenum swrap, GLenum twrap, GLenum _mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__); } - switch ( twrap ) { - case GL_REPEAT: - t->pp_txfilter |= R200_CLAMP_T_WRAP; - break; - case GL_CLAMP: - t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL; - is_clamp = GL_TRUE; - break; - case GL_CLAMP_TO_EDGE: - t->pp_txfilter |= R200_CLAMP_T_CLAMP_LAST; - break; - case GL_CLAMP_TO_BORDER: - t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL; - is_clamp_to_border = GL_TRUE; - break; - case GL_MIRRORED_REPEAT: - t->pp_txfilter |= R200_CLAMP_T_MIRROR; - break; - case GL_MIRROR_CLAMP_EXT: - t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL; - is_clamp = GL_TRUE; - break; - case GL_MIRROR_CLAMP_TO_EDGE_EXT: - t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_LAST; - break; - case GL_MIRROR_CLAMP_TO_BORDER_EXT: - t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL; - is_clamp_to_border = GL_TRUE; - break; - default: - _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__); + if (t->base.tObj->Target != GL_TEXTURE_1D) { + switch ( twrap ) { + case GL_REPEAT: + t->pp_txfilter |= R200_CLAMP_T_WRAP; + break; + case GL_CLAMP: + t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL; + is_clamp = GL_TRUE; + break; + case GL_CLAMP_TO_EDGE: + t->pp_txfilter |= R200_CLAMP_T_CLAMP_LAST; + break; + case GL_CLAMP_TO_BORDER: + t->pp_txfilter |= R200_CLAMP_T_CLAMP_GL; + is_clamp_to_border = GL_TRUE; + break; + case GL_MIRRORED_REPEAT: + t->pp_txfilter |= R200_CLAMP_T_MIRROR; + break; + case GL_MIRROR_CLAMP_EXT: + t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL; + is_clamp = GL_TRUE; + break; + case GL_MIRROR_CLAMP_TO_EDGE_EXT: + t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_LAST; + break; + case GL_MIRROR_CLAMP_TO_BORDER_EXT: + t->pp_txfilter |= R200_CLAMP_T_MIRROR_CLAMP_GL; + is_clamp_to_border = GL_TRUE; + break; + default: + _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__); + } } t->pp_txformat_x &= ~R200_CLAMP_Q_MASK; diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c index 4dc31614492..c069660eeaf 100644 --- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c +++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c @@ -477,6 +477,8 @@ void r300InitCmdBuf(r300ContextPtr r300) ALLOC_STATE(blend_color, always, 2, 0); r300->hw.blend_color.cmd[0] = cmdpacket0(R300_RB3D_BLEND_COLOR, 1); } + ALLOC_STATE(rop, always, 2, 0); + r300->hw.rop.cmd[0] = cmdpacket0(R300_RB3D_ROPCNTL, 1); ALLOC_STATE(cb, always, R300_CB_CMDSIZE, 0); r300->hw.cb.cmd[R300_CB_CMD_0] = cmdpacket0(R300_RB3D_COLOROFFSET0, 1); r300->hw.cb.cmd[R300_CB_CMD_1] = cmdpacket0(R300_RB3D_COLORPITCH0, 1); diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c index a9c581b236e..fcf571d2060 100644 --- a/src/mesa/drivers/dri/r300/r300_context.c +++ b/src/mesa/drivers/dri/r300/r300_context.c @@ -101,6 +101,7 @@ const struct dri_extension card_extensions[] = { {"GL_ARB_multitexture", NULL}, {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions}, {"GL_ARB_shadow", NULL}, + {"GL_ARB_shadow_ambient", NULL}, {"GL_ARB_texture_border_clamp", NULL}, {"GL_ARB_texture_compression", GL_ARB_texture_compression_functions}, {"GL_ARB_texture_cube_map", NULL}, diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 98af6d8f10a..d2017f8afeb 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -516,6 +516,7 @@ struct r300_hw_state { struct r300_state_atom bld; /* blending (4E04) */ struct r300_state_atom cmk; /* colormask (4E0C) */ struct r300_state_atom blend_color; /* constant blend color */ + struct r300_state_atom rop; /* ropcntl */ struct r300_state_atom cb; /* colorbuffer (4E28) */ struct r300_state_atom rb3d_dither_ctl; /* (4E50) */ struct r300_state_atom rb3d_aaresolve_ctl; /* (4E88) */ diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c index d390de54b8a..453dda74312 100644 --- a/src/mesa/drivers/dri/r300/r300_fragprog.c +++ b/src/mesa/drivers/dri/r300/r300_fragprog.c @@ -58,6 +58,20 @@ static void reset_srcreg(struct prog_src_register* reg) reg->Swizzle = SWIZZLE_NOOP; } +static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu) +{ + gl_state_index fail_value_tokens[STATE_LENGTH] = { + STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0 + }; + struct prog_src_register reg = { 0, }; + + fail_value_tokens[2] = tmu; + reg.File = PROGRAM_STATE_VAR; + reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens); + reg.Swizzle = SWIZZLE_WWWW; + return reg; +} + /** * Transform TEX, TXP, TXB, and KIL instructions in the following way: * - premultiply texture coordinates for RECT @@ -92,8 +106,12 @@ static GLboolean transform_TEX( tgt->Opcode = OPCODE_MOV; tgt->DstReg = inst.DstReg; - tgt->SrcReg[0].File = PROGRAM_BUILTIN; - tgt->SrcReg[0].Swizzle = comparefunc == GL_ALWAYS ? SWIZZLE_1111 : SWIZZLE_0000; + if (comparefunc == GL_ALWAYS) { + tgt->SrcReg[0].File = PROGRAM_BUILTIN; + tgt->SrcReg[0].Swizzle = SWIZZLE_1111; + } else { + tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit); + } return GL_TRUE; } @@ -153,6 +171,7 @@ static GLboolean transform_TEX( GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func; GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode; int rcptemp = radeonFindFreeTemporary(t); + int pass, fail; tgt = radeonAppendInstructions(t->Program, 3); @@ -190,16 +209,18 @@ static GLboolean transform_TEX( tgt[2].DstReg = orig_inst->DstReg; tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY; tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index; - tgt[2].SrcReg[1].File = PROGRAM_BUILTIN; - tgt[2].SrcReg[2].File = PROGRAM_BUILTIN; if (comparefunc == GL_LESS || comparefunc == GL_GREATER) { - tgt[2].SrcReg[1].Swizzle = SWIZZLE_1111; - tgt[2].SrcReg[2].Swizzle = SWIZZLE_0000; + pass = 1; + fail = 2; } else { - tgt[2].SrcReg[1].Swizzle = SWIZZLE_0000; - tgt[2].SrcReg[2].Swizzle = SWIZZLE_1111; + pass = 2; + fail = 1; } + + tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN; + tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111; + tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit); } else if (destredirect) { tgt = radeonAppendInstructions(t->Program, 1); diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index ec2b58377c5..562cd6afdb2 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -2249,7 +2249,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 3D ROP Control. Stalls the 2d/3d datapath until it is idle. */ #define R300_RB3D_ROPCNTL 0x4e18 -/* TODO: fill in content here */ +# define R300_RB3D_ROPCNTL_ROP_ENABLE 0x00000004 +# define R300_RB3D_ROPCNTL_ROP_MASK (15 << 8) +# define R300_RB3D_ROPCNTL_ROP_SHIFT 8 /* Color Compare Flip. Stalls the 2d/3d datapath until it is idle. */ #define R300_RB3D_CLRCMP_FLIPE 0x4e1c diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c index 69ff6d573e2..0a199e6faad 100644 --- a/src/mesa/drivers/dri/r300/r300_render.c +++ b/src/mesa/drivers/dri/r300/r300_render.c @@ -269,13 +269,24 @@ static void r300RunRenderPrimitive(r300ContextPtr rmesa, GLcontext * ctx, return; if (vb->Elts) { - r300EmitAOS(rmesa, rmesa->state.aos_count, start); if (num_verts > 65535) { /* not implemented yet */ WARN_ONCE("Too many elts\n"); return; } + /* Note: The following is incorrect, but it's the best I can do + * without a major refactoring of how DMA memory is handled. + * The problem: Ensuring that both vertex arrays *and* index + * arrays are at the right position, and then ensuring that + * the LOAD_VBPNTR, DRAW_INDX and INDX_BUFFER packets are emitted + * at once. + * + * So why is the following incorrect? Well, it seems like + * allocating the index array might actually evict the vertex + * arrays. *sigh* + */ r300EmitElts(ctx, vb->Elts, num_verts); + r300EmitAOS(rmesa, rmesa->state.aos_count, start); r300FireEB(rmesa, rmesa->state.elt_dma.aos_offset, num_verts, type); } else { r300EmitAOS(rmesa, rmesa->state.aos_count, start); @@ -366,8 +377,6 @@ static int r300Fallback(GLcontext * ctx) || ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[1])); - FALLBACK_IF(ctx->Color.ColorLogicOpEnabled); - if (ctx->Extensions.NV_point_sprite || ctx->Extensions.ARB_point_sprite) FALLBACK_IF(ctx->Point.PointSprite); diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 6931de4421d..cce07d338bb 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -321,6 +321,44 @@ static void r300BlendFuncSeparate(GLcontext * ctx, r300SetBlendState(ctx); } +/** + * Translate LogicOp enums into hardware representation. + * Both use a very logical bit-wise layout, but unfortunately the order + * of bits is reversed. + */ +static GLuint translate_logicop(GLenum logicop) +{ + GLuint bits = logicop - GL_CLEAR; + bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3); + return bits << R300_RB3D_ROPCNTL_ROP_SHIFT; +} + +/** + * Used internally to update the r300->hw hardware state to match the + * current OpenGL state. + */ +static void r300SetLogicOpState(GLcontext *ctx) +{ + r300ContextPtr r300 = R300_CONTEXT(ctx); + R300_STATECHANGE(r300, rop); + if (RGBA_LOGICOP_ENABLED(ctx)) { + r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE | + translate_logicop(ctx->Color.LogicOp); + } else { + r300->hw.rop.cmd[1] = 0; + } +} + +/** + * Called by Mesa when an application program changes the LogicOp state + * via glLogicOp. + */ +static void r300LogicOpcode(GLcontext *ctx, GLenum logicop) +{ + if (RGBA_LOGICOP_ENABLED(ctx)) + r300SetLogicOpState(ctx); +} + static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq ) { r300ContextPtr rmesa = R300_CONTEXT(ctx); @@ -843,12 +881,12 @@ static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * pa case GL_POINT_SIZE_MIN: R300_STATECHANGE(r300, ga_point_minmax); r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK; - r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 16.0); + r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0); break; case GL_POINT_SIZE_MAX: R300_STATECHANGE(r300, ga_point_minmax); r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK; - r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 16.0) + r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0) << R300_GA_POINT_MINMAX_MAX_SHIFT; break; case GL_POINT_DISTANCE_ATTENUATION: @@ -2117,8 +2155,10 @@ static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state) case GL_ALPHA_TEST: r300SetAlphaState(ctx); break; - case GL_BLEND: case GL_COLOR_LOGIC_OP: + r300SetLogicOpState(ctx); + /* fall-through, because logic op overrides blending */ + case GL_BLEND: r300SetBlendState(ctx); break; case GL_CLIP_PLANE0: @@ -2188,6 +2228,7 @@ static void r300ResetHwState(r300ContextPtr r300) r300UpdateTextureState(ctx); r300SetBlendState(ctx); + r300SetLogicOpState(ctx); r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef); r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled); @@ -2755,6 +2796,7 @@ void r300InitStateFuncs(struct dd_function_table *functions) functions->Fogfv = r300Fogfv; functions->FrontFace = r300FrontFace; functions->ShadeModel = r300ShadeModel; + functions->LogicOpcode = r300LogicOpcode; /* ARB_point_parameters */ functions->PointParameterfv = r300PointParameter; diff --git a/src/mesa/drivers/dri/r300/r300_tex.c b/src/mesa/drivers/dri/r300/r300_tex.c index c8f02c4ef5b..f7f49729bc8 100644 --- a/src/mesa/drivers/dri/r300/r300_tex.c +++ b/src/mesa/drivers/dri/r300/r300_tex.c @@ -944,6 +944,8 @@ static void r300TexParameter(GLcontext * ctx, GLenum target, break; case GL_DEPTH_TEXTURE_MODE: + if (!texObj->Image[0][texObj->BaseLevel]) + return; if (texObj->Image[0][texObj->BaseLevel]->TexFormat->BaseFormat == GL_DEPTH_COMPONENT) { r300SetDepthTexMode(texObj); diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c index 7b18efa69d6..a84ba13c121 100644 --- a/src/mesa/drivers/dri/r300/r500_fragprog.c +++ b/src/mesa/drivers/dri/r300/r500_fragprog.c @@ -31,6 +31,20 @@ #include "radeon_program_alu.h" +static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu) +{ + gl_state_index fail_value_tokens[STATE_LENGTH] = { + STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0 + }; + struct prog_src_register reg = { 0, }; + + fail_value_tokens[2] = tmu; + reg.File = PROGRAM_STATE_VAR; + reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens); + reg.Swizzle = SWIZZLE_WWWW; + return reg; +} + /** * Transform TEX, TXP, TXB, and KIL instructions in the following way: * - premultiply texture coordinates for RECT @@ -63,17 +77,26 @@ static GLboolean transform_TEX( tgt = radeonAppendInstructions(t->Program, 1); tgt->Opcode = OPCODE_MOV; - tgt->DstReg.File = inst.DstReg.File; - tgt->DstReg.Index = inst.DstReg.Index; - tgt->DstReg.WriteMask = inst.DstReg.WriteMask; - tgt->SrcReg[0].File = PROGRAM_BUILTIN; - tgt->SrcReg[0].Swizzle = comparefunc == GL_ALWAYS ? SWIZZLE_1111 : SWIZZLE_0000; + tgt->DstReg = inst.DstReg; + if (comparefunc == GL_ALWAYS) { + tgt->SrcReg[0].File = PROGRAM_BUILTIN; + tgt->SrcReg[0].Swizzle = SWIZZLE_1111; + } else { + tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit); + } return GL_TRUE; } inst.DstReg.File = PROGRAM_TEMPORARY; inst.DstReg.Index = radeonFindFreeTemporary(t); inst.DstReg.WriteMask = WRITEMASK_XYZW; + } else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) { + int tempreg = radeonFindFreeTemporary(t); + + inst.DstReg.File = PROGRAM_TEMPORARY; + inst.DstReg.Index = tempreg; + inst.DstReg.WriteMask = WRITEMASK_XYZW; + destredirect = GL_TRUE; } tgt = radeonAppendInstructions(t->Program, 1); @@ -84,6 +107,7 @@ static GLboolean transform_TEX( GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func; GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode; int rcptemp = radeonFindFreeTemporary(t); + int pass, fail; tgt = radeonAppendInstructions(t->Program, 3); @@ -121,16 +145,18 @@ static GLboolean transform_TEX( tgt[2].DstReg = orig_inst->DstReg; tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY; tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index; - tgt[2].SrcReg[1].File = PROGRAM_BUILTIN; - tgt[2].SrcReg[2].File = PROGRAM_BUILTIN; if (comparefunc == GL_LESS || comparefunc == GL_GREATER) { - tgt[2].SrcReg[1].Swizzle = SWIZZLE_1111; - tgt[2].SrcReg[2].Swizzle = SWIZZLE_0000; + pass = 1; + fail = 2; } else { - tgt[2].SrcReg[1].Swizzle = SWIZZLE_0000; - tgt[2].SrcReg[2].Swizzle = SWIZZLE_1111; + pass = 2; + fail = 1; } + + tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN; + tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111; + tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit); } else if (destredirect) { tgt = radeonAppendInstructions(t->Program, 1); @@ -262,44 +288,87 @@ static GLboolean is_native_swizzle(GLuint opcode, struct prog_src_register reg) GLuint relevant; int i; - if (reg.Abs) + if (opcode == OPCODE_TEX || + opcode == OPCODE_TXB || + opcode == OPCODE_TXP || + opcode == OPCODE_KIL) { + if (reg.Abs) + return GL_FALSE; + + if (reg.NegateAbs) + reg.NegateBase ^= 15; + + if (opcode == OPCODE_KIL) { + if (reg.Swizzle != SWIZZLE_NOOP) + return GL_FALSE; + } else { + for(i = 0; i < 4; ++i) { + GLuint swz = GET_SWZ(reg.Swizzle, i); + if (swz == SWIZZLE_NIL) { + reg.NegateBase &= ~(1 << i); + continue; + } + if (swz >= 4) + return GL_FALSE; + } + } + + if (reg.NegateBase) + return GL_FALSE; + return GL_TRUE; + } else { + /* ALU instructions support almost everything */ + if (reg.Abs) + return GL_TRUE; - relevant = 0; - for(i = 0; i < 3; ++i) { - GLuint swz = GET_SWZ(reg.Swizzle, i); - if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO) - relevant |= 1 << i; - } - if ((reg.NegateBase & relevant) && ((reg.NegateBase & relevant) != relevant)) - return GL_FALSE; + relevant = 0; + for(i = 0; i < 3; ++i) { + GLuint swz = GET_SWZ(reg.Swizzle, i); + if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO) + relevant |= 1 << i; + } + if ((reg.NegateBase & relevant) && ((reg.NegateBase & relevant) != relevant)) + return GL_FALSE; - return GL_TRUE; + return GL_TRUE; + } } /** - * Implement a non-native swizzle. This function assumes that - * is_native_swizzle returned true. + * Implement a MOV with a potentially non-native swizzle. + * + * The only thing we *cannot* do in an ALU instruction is per-component + * negation. Therefore, we split the MOV into two instructions when necessary. */ static void nqssadce_build_swizzle(struct nqssadce_state *s, struct prog_dst_register dst, struct prog_src_register src) { struct prog_instruction *inst; + GLuint negatebase[2] = { 0, 0 }; + int i; - _mesa_insert_instructions(s->Program, s->IP, 2); - inst = s->Program->Instructions + s->IP; + for(i = 0; i < 4; ++i) { + GLuint swz = GET_SWZ(src.Swizzle, i); + if (swz == SWIZZLE_NIL) + continue; + negatebase[GET_BIT(src.NegateBase, i)] |= 1 << i; + } - inst[0].Opcode = OPCODE_MOV; - inst[0].DstReg = dst; - inst[0].DstReg.WriteMask &= src.NegateBase; - inst[0].SrcReg[0] = src; + _mesa_insert_instructions(s->Program, s->IP, (negatebase[0] ? 1 : 0) + (negatebase[1] ? 1 : 0)); + inst = s->Program->Instructions + s->IP; - inst[1].Opcode = OPCODE_MOV; - inst[1].DstReg = dst; - inst[1].DstReg.WriteMask &= ~src.NegateBase; - inst[1].SrcReg[0] = src; + for(i = 0; i <= 1; ++i) { + if (!negatebase[i]) + continue; - s->IP += 2; + inst->Opcode = OPCODE_MOV; + inst->DstReg = dst; + inst->DstReg.WriteMask = negatebase[i]; + inst->SrcReg[0] = src; + inst++; + s->IP++; + } } static GLuint build_dtm(GLuint depthmode) diff --git a/src/mesa/drivers/dri/r300/radeon_program_pair.c b/src/mesa/drivers/dri/r300/radeon_program_pair.c index 8762422801e..4307994d74c 100644 --- a/src/mesa/drivers/dri/r300/radeon_program_pair.c +++ b/src/mesa/drivers/dri/r300/radeon_program_pair.c @@ -265,11 +265,21 @@ static void final_rewrite(struct pair_state *s, struct prog_instruction *inst) inst->SrcReg[0] = tmp; break; case OPCODE_MOV: - inst->SrcReg[1] = inst->SrcReg[0]; + /* AMD say we should use CMP. + * However, when we transform + * KIL -r0; + * into + * CMP tmp, -r0, -r0, 0; + * KIL tmp; + * we get incorrect behaviour on R500 when r0 == 0.0. + * It appears that the R500 KIL hardware treats -0.0 as less + * than zero. + */ + inst->SrcReg[1].File = PROGRAM_BUILTIN; + inst->SrcReg[1].Swizzle = SWIZZLE_1111; inst->SrcReg[2].File = PROGRAM_BUILTIN; inst->SrcReg[2].Swizzle = SWIZZLE_0000; - inst->Opcode = OPCODE_CMP; - // TODO: disable output modifiers on R500 + inst->Opcode = OPCODE_MAD; break; case OPCODE_MUL: inst->SrcReg[2].File = PROGRAM_BUILTIN; diff --git a/src/mesa/drivers/dri/r300/radeon_span.c b/src/mesa/drivers/dri/r300/radeon_span.c index f1bc56ea6a4..3616d8b14de 100644 --- a/src/mesa/drivers/dri/r300/radeon_span.c +++ b/src/mesa/drivers/dri/r300/radeon_span.c @@ -172,6 +172,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) /* 16-bit depth buffer functions */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + radeon_mba_z16( drb, _x + xo, _y + yo )) = d; @@ -186,6 +188,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) * Careful: It looks like the R300 uses ZZZS byte order while the R200 * uses SZZZ for 24 bit depth, 8 bit stencil mode. */ +#define VALUE_TYPE GLuint + #ifdef COMPILE_R300 #define WRITE_DEPTH( _x, _y, d ) \ do { \ diff --git a/src/mesa/drivers/dri/r300/radeon_state.c b/src/mesa/drivers/dri/r300/radeon_state.c index af2c3bcacd3..d81318ce20c 100644 --- a/src/mesa/drivers/dri/r300/radeon_state.c +++ b/src/mesa/drivers/dri/r300/radeon_state.c @@ -125,8 +125,8 @@ void radeonUpdateScissor(GLcontext* ctx) radeon->state.scissor.rect.x1 = x1; radeon->state.scissor.rect.y1 = y1; - radeon->state.scissor.rect.x2 = x1 + ctx->Scissor.Width - 1; - radeon->state.scissor.rect.y2 = y1 + ctx->Scissor.Height - 1; + radeon->state.scissor.rect.x2 = x1 + ctx->Scissor.Width; + radeon->state.scissor.rect.y2 = y1 + ctx->Scissor.Height; radeonRecalcScissorRects(radeon); } diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c index 732a85ecf0b..e7ab3677b36 100644 --- a/src/mesa/drivers/dri/radeon/radeon_span.c +++ b/src/mesa/drivers/dri/radeon/radeon_span.c @@ -173,6 +173,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) /* 16-bit depth buffer functions */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + radeon_mba_z16( drb, _x + xo, _y + yo )) = d; @@ -187,6 +189,8 @@ radeon_mba_z16(const driRenderbuffer * drb, GLint x, GLint y) * Careful: It looks like the R300 uses ZZZS byte order while the R200 * uses SZZZ for 24 bit depth, 8 bit stencil mode. */ +#define VALUE_TYPE GLuint + #ifdef COMPILE_R300 #define WRITE_DEPTH( _x, _y, d ) \ do { \ diff --git a/src/mesa/drivers/dri/s3v/s3v_span.c b/src/mesa/drivers/dri/s3v/s3v_span.c index de78f9f6b1b..f9f7c0d1eee 100644 --- a/src/mesa/drivers/dri/s3v/s3v_span.c +++ b/src/mesa/drivers/dri/s3v/s3v_span.c @@ -128,6 +128,8 @@ do { \ /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + _x*2 + _y*dPriv->w*2) = d @@ -143,6 +145,8 @@ do { \ /* 32 bit depthbuffer functions. */ #if 0 +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) \ *(GLuint *)(buf + _x*4 + _y*pitch) = d; @@ -157,6 +161,8 @@ do { \ /* 24/8 bit interleaved depth/stencil functions */ #if 0 +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) { \ GLuint tmp = *(GLuint *)(buf + _x*4 + _y*pitch); \ tmp &= 0xff; \ diff --git a/src/mesa/drivers/dri/savage/savagespan.c b/src/mesa/drivers/dri/savage/savagespan.c index 61ab9e6d64a..00fd1259fd6 100644 --- a/src/mesa/drivers/dri/savage/savagespan.c +++ b/src/mesa/drivers/dri/savage/savagespan.c @@ -93,6 +93,8 @@ /* 16 bit integer depthbuffer functions * Depth range is reversed. See also savageCalcViewport. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + ((_x)<<1) + (_y)*pitch) = 0xFFFF - d @@ -107,6 +109,8 @@ /* 16 bit float depthbuffer functions */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + ((_x)<<1) + (_y)*pitch) = \ savageEncodeFloat16( 1.0 - (GLfloat)d/65535.0 ) @@ -125,6 +129,8 @@ /* 8-bit stencil /24-bit integer depth depthbuffer functions. * Depth range is reversed. See also savageCalcViewport. */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) do { \ GLuint tmp = *(GLuint *)(buf + ((_x)<<2) + (_y)*pitch); \ tmp &= 0xFF000000; \ @@ -143,6 +149,8 @@ /* 24 bit float depthbuffer functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) do { \ GLuint tmp = *(GLuint *)(buf + ((_x)<<2) + (_y)*pitch); \ tmp &= 0xFF000000; \ diff --git a/src/mesa/drivers/dri/sis/sis_span.c b/src/mesa/drivers/dri/sis/sis_span.c index ea6db6781d4..7f205f3ca50 100644 --- a/src/mesa/drivers/dri/sis/sis_span.c +++ b/src/mesa/drivers/dri/sis/sis_span.c @@ -85,6 +85,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 16 bit depthbuffer functions. */ +#define VALUE_TYPE GLushort + #define WRITE_DEPTH( _x, _y, d ) \ *(GLushort *)(buf + (_x)*2 + (_y)*srb->pitch) = d; @@ -97,6 +99,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 32 bit depthbuffer functions. */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) \ *(GLuint *)(buf + (_x)*4 + (_y)*srb->pitch) = d; @@ -109,6 +113,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* 8/24 bit interleaved depth/stencil functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) { \ GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*srb->pitch); \ tmp &= 0xff000000; \ diff --git a/src/mesa/drivers/dri/unichrome/via_span.c b/src/mesa/drivers/dri/unichrome/via_span.c index 3a16dadd238..15e29c52cd9 100644 --- a/src/mesa/drivers/dri/unichrome/via_span.c +++ b/src/mesa/drivers/dri/unichrome/via_span.c @@ -86,6 +86,7 @@ #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS +#define VALUE_TYPE GLushort #define WRITE_DEPTH(_x, _y, d) \ *(GLushort *)(buf + (_x) * 2 + (_y) * depth_pitch) = d; @@ -98,6 +99,8 @@ /* 32 bit depthbuffer functions. */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH(_x, _y, d) \ *(GLuint *)(buf + (_x) * 4 + (_y) * depth_pitch) = d; @@ -111,6 +114,8 @@ /* 24/8 bit interleaved depth/stencil functions */ +#define VALUE_TYPE GLuint + #define WRITE_DEPTH( _x, _y, d ) { \ GLuint tmp = *(GLuint *)(buf + (_x)*4 + (_y)*depth_pitch); \ tmp &= 0x000000ff; \ |