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-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_emit.c11
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c6
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c2
3 files changed, 15 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 8759826e83b..9de05408ba9 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -1024,6 +1024,9 @@ void brw_vs_emit(struct brw_vs_compile *c )
case OPCODE_ADD:
brw_ADD(p, dst, args[0], args[1]);
break;
+ case OPCODE_COS:
+ emit_math1(c, BRW_MATH_FUNCTION_COS, dst, args[0], BRW_MATH_PRECISION_FULL);
+ break;
case OPCODE_DP3:
brw_DP3(p, dst, args[0], args[1]);
break;
@@ -1089,6 +1092,9 @@ void brw_vs_emit(struct brw_vs_compile *c )
case OPCODE_SEQ:
emit_seq(p, dst, args[0], args[1]);
break;
+ case OPCODE_SIN:
+ emit_math1(c, BRW_MATH_FUNCTION_SIN, dst, args[0], BRW_MATH_PRECISION_FULL);
+ break;
case OPCODE_SNE:
emit_sne(p, dst, args[0], args[1]);
break;
@@ -1155,7 +1161,10 @@ void brw_vs_emit(struct brw_vs_compile *c )
case OPCODE_ENDSUB:
break;
default:
- _mesa_printf("Unsupport opcode %d in vertex shader\n", inst->Opcode);
+ _mesa_printf("Unsupported opcode %i (%s) in vertex shader\n",
+ inst->Opcode, inst->Opcode < MAX_OPCODE ?
+ _mesa_opcode_string(inst->Opcode) :
+ "unknown");
break;
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index f1c14c98f95..58c78c4b2c5 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1302,8 +1302,10 @@ void brw_wm_emit( struct brw_wm_compile *c )
break;
default:
- _mesa_printf("unsupport opcode %d in fragment program\n",
- inst->opcode);
+ _mesa_printf("Unsupported opcode %i (%s) in fragment shader\n",
+ inst->opcode, inst->opcode < MAX_OPCODE ?
+ _mesa_opcode_string(inst->opcode) :
+ "unknown");
}
for (i = 0; i < 4; i++)
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 3677dd41d90..fce5e36b9d1 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -540,7 +540,7 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
irb->Base._ActualFormat = GL_DEPTH_COMPONENT16;
irb->Base._BaseFormat = GL_DEPTH_COMPONENT;
DBG("Render to DEPTH16 texture OK\n");
- } else if (texImage->TexFormat == &_mesa_texformat_z24_s8) {
+ } else if (texImage->TexFormat == &_mesa_texformat_s8_z24) {
irb->Base._ActualFormat = GL_DEPTH24_STENCIL8_EXT;
irb->Base._BaseFormat = GL_DEPTH_STENCIL_EXT;
DBG("Render to DEPTH_STENCIL texture OK\n");