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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c15
1 files changed, 6 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index f0de711cedc..dfd00319309 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -560,12 +560,6 @@ brw_initialize_context_constants(struct brw_context *brw)
.lower_ffma = true,
};
- bool use_nir_default[MESA_SHADER_STAGES];
- use_nir_default[MESA_SHADER_VERTEX] = false;
- use_nir_default[MESA_SHADER_GEOMETRY] = false;
- use_nir_default[MESA_SHADER_FRAGMENT] = false;
- use_nir_default[MESA_SHADER_COMPUTE] = false;
-
/* We want the GLSL compiler to emit code that uses condition codes */
for (int i = 0; i < MESA_SHADER_STAGES; i++) {
ctx->Const.ShaderCompilerOptions[i].MaxIfDepth = brw->gen < 6 ? 16 : UINT_MAX;
@@ -579,9 +573,6 @@ brw_initialize_context_constants(struct brw_context *brw)
(i == MESA_SHADER_FRAGMENT);
ctx->Const.ShaderCompilerOptions[i].EmitNoIndirectUniform = false;
ctx->Const.ShaderCompilerOptions[i].LowerClipDistance = true;
-
- if (brw_env_var_as_boolean("INTEL_USE_NIR", use_nir_default[i]))
- ctx->Const.ShaderCompilerOptions[i].NirOptions = &nir_options;
}
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = true;
@@ -594,8 +585,14 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectOutput = true;
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectTemp = true;
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = false;
+
+ if (brw_env_var_as_boolean("INTEL_USE_NIR", false))
+ ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].NirOptions = &nir_options;
}
+ if (brw_env_var_as_boolean("INTEL_USE_NIR", false))
+ ctx->Const.ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions = &nir_options;
+
/* ARB_viewport_array */
if (brw->gen >= 7 && ctx->API == API_OPENGL_CORE) {
ctx->Const.MaxViewports = GEN7_NUM_VIEWPORTS;