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-rw-r--r--src/mesa/drivers/dri/i965/Makefile1
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h5
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c8
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h9
-rw-r--r--src/mesa/drivers/dri/i965/gen6_viewport_state.c175
6 files changed, 200 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile b/src/mesa/drivers/dri/i965/Makefile
index 9426ffc0da5..32eb3f8fcdf 100644
--- a/src/mesa/drivers/dri/i965/Makefile
+++ b/src/mesa/drivers/dri/i965/Makefile
@@ -91,6 +91,7 @@ DRIVER_SOURCES = \
gen6_gs_state.c \
gen6_scissor_state.c \
gen6_urb.c \
+ gen6_viewport_state.c \
gen6_vs_state.c
C_SOURCES = \
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index b11ec7b1655..3201de601a5 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -823,6 +823,11 @@
# define GEN6_URB_GS_SIZE_SHIFT 8
# define GEN6_URB_GS_ENTRIES_SHIFT 0
+#define CMD_VIEWPORT_STATE_POINTERS 0x780d /* GEN6+ */
+# define GEN6_CC_VIEWPORT_MODIFY (1 << 12)
+# define GEN6_SF_VIEWPORT_MODIFY (1 << 11)
+# define GEN6_CLIP_VIEWPORT_MODIFY (1 << 10)
+
#define CMD_3D_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */
#define CMD_3D_VS_STATE 0x7810 /* GEN6+ */
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 25e261dd152..7c5819fc1b5 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -93,12 +93,16 @@ const struct brw_tracked_state brw_index_buffer;
const struct brw_tracked_state gen6_binding_table_pointers;
const struct brw_tracked_state gen6_blend_state;
const struct brw_tracked_state gen6_cc_state_pointers;
+const struct brw_tracked_state gen6_cc_vp;
const struct brw_tracked_state gen6_clip_state;
+const struct brw_tracked_state gen6_clip_vp;
const struct brw_tracked_state gen6_color_calc_state;
const struct brw_tracked_state gen6_depth_stencil_state;
const struct brw_tracked_state gen6_gs_state;
const struct brw_tracked_state gen6_scissor_state;
+const struct brw_tracked_state gen6_sf_vp;
const struct brw_tracked_state gen6_urb;
+const struct brw_tracked_state gen6_viewport_state;
const struct brw_tracked_state gen6_vs_state;
/**
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 086f82c9925..3e6c967f534 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -119,9 +119,13 @@ const struct brw_tracked_state *gen6_atoms[] =
*/
&brw_curbe_offsets,
- &brw_cc_vp,
#endif
+ &gen6_clip_vp,
+ &gen6_sf_vp,
+ &gen6_cc_vp,
+ &gen6_viewport_state, /* must do after *_vp stages */
+
&gen6_urb,
&gen6_blend_state, /* must do before cc unit */
&gen6_color_calc_state, /* must do before cc unit */
@@ -141,8 +145,8 @@ const struct brw_tracked_state *gen6_atoms[] =
&brw_wm_unit,
#endif
&gen6_scissor_state,
+
#if 0
- &brw_sf_vp,
&brw_sf_unit,
/* Command packets:
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 87d5c06cdc3..3c2adfc87d4 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1144,6 +1144,15 @@ struct brw_sf_viewport
} scissor;
};
+struct gen6_sf_viewport {
+ GLfloat m00;
+ GLfloat m11;
+ GLfloat m22;
+ GLfloat m30;
+ GLfloat m31;
+ GLfloat m32;
+};
+
/* Documented in the subsystem/shared-functions/sampler chapter...
*/
struct brw_surface_state
diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
new file mode 100644
index 00000000000..13d2fc1b42b
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright © 2009 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ * Eric Anholt <[email protected]>
+ *
+ */
+
+#include "brw_context.h"
+#include "brw_state.h"
+#include "brw_defines.h"
+#include "brw_util.h"
+#include "intel_batchbuffer.h"
+#include "main/macros.h"
+#include "main/enums.h"
+
+/* The clip VP defines the guardband region where expensive clipping is skipped
+ * and fragments are allowed to be generated and clipped out cheaply by the SF.
+ *
+ * By setting it to NDC bounds of [-1,1], we don't do GB clipping. It's
+ * supposed to cause seams to become visible in apps due to shared edges taking
+ * different clip/no clip paths depending on whether the rest of the prim ends
+ * up in the guardband or not.
+ */
+static void
+prepare_clip_vp(struct brw_context *brw)
+{
+ struct brw_clipper_viewport vp;
+
+ vp.xmin = -1.0;
+ vp.xmax = 1.0;
+ vp.ymin = -1.0;
+ vp.ymax = 1.0;
+
+ drm_intel_bo_unreference(brw->clip.vp_bo);
+ brw->clip.vp_bo = brw_cache_data(&brw->cache, BRW_CLIP_VP,
+ &vp, sizeof(vp),
+ NULL, 0);
+}
+
+const struct brw_tracked_state gen6_clip_vp = {
+ .dirty = {
+ .mesa = _NEW_VIEWPORT, /* XXX: not really, but we need nonzero */
+ .brw = 0,
+ .cache = 0,
+ },
+ .prepare = prepare_clip_vp,
+};
+
+static void
+prepare_sf_vp(struct brw_context *brw)
+{
+ GLcontext *ctx = &brw->intel.ctx;
+ const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
+ struct brw_sf_viewport sfv;
+ GLfloat y_scale, y_bias;
+ const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
+ const GLfloat *v = ctx->Viewport._WindowMap.m;
+
+ memset(&sfv, 0, sizeof(sfv));
+
+ /* _NEW_BUFFERS */
+ if (render_to_fbo) {
+ y_scale = 1.0;
+ y_bias = 0;
+ } else {
+ y_scale = -1.0;
+ y_bias = ctx->DrawBuffer->Height;
+ }
+
+ /* _NEW_VIEWPORT */
+ sfv.viewport.m00 = v[MAT_SX];
+ sfv.viewport.m11 = v[MAT_SY] * y_scale;
+ sfv.viewport.m22 = v[MAT_SZ] * depth_scale;
+ sfv.viewport.m30 = v[MAT_TX];
+ sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias;
+ sfv.viewport.m32 = v[MAT_TZ] * depth_scale;
+
+ drm_intel_bo_unreference(brw->sf.vp_bo);
+ brw->sf.vp_bo = brw_cache_data(&brw->cache, BRW_SF_VP,
+ &sfv, sizeof(sfv),
+ NULL, 0);
+}
+
+const struct brw_tracked_state gen6_sf_vp = {
+ .dirty = {
+ .mesa = _NEW_VIEWPORT | _NEW_BUFFERS,
+ .brw = 0,
+ .cache = 0,
+ },
+ .prepare = prepare_sf_vp,
+};
+
+static void
+prepare_cc_vp(struct brw_context *brw)
+{
+ GLcontext *ctx = &brw->intel.ctx;
+ struct brw_cc_viewport ccv;
+
+ /* _NEW_TRANSOFORM */
+ if (ctx->Transform.DepthClamp) {
+ /* _NEW_VIEWPORT */
+ ccv.min_depth = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
+ ccv.max_depth = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
+ } else {
+ ccv.min_depth = 0.0;
+ ccv.max_depth = 1.0;
+ }
+
+ drm_intel_bo_unreference(brw->cc.vp_bo);
+ brw->cc.vp_bo = brw_cache_data(&brw->cache, BRW_CC_VP, &ccv, sizeof(ccv),
+ NULL, 0);
+}
+
+const struct brw_tracked_state gen6_cc_vp = {
+ .dirty = {
+ .mesa = _NEW_VIEWPORT | _NEW_TRANSFORM,
+ .brw = 0,
+ .cache = 0,
+ },
+ .prepare = prepare_cc_vp,
+};
+
+static void prepare_viewport_state_pointers(struct brw_context *brw)
+{
+ brw_add_validated_bo(brw, brw->sf.state_bo);
+}
+
+static void upload_viewport_state_pointers(struct brw_context *brw)
+{
+ struct intel_context *intel = &brw->intel;
+
+ BEGIN_BATCH(4);
+ OUT_BATCH(CMD_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) |
+ GEN6_CC_VIEWPORT_MODIFY |
+ GEN6_SF_VIEWPORT_MODIFY |
+ GEN6_CLIP_VIEWPORT_MODIFY);
+ OUT_RELOC(brw->clip.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+ OUT_RELOC(brw->sf.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+ OUT_RELOC(brw->cc.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+ ADVANCE_BATCH();
+
+ intel_batchbuffer_emit_mi_flush(intel->batch);
+}
+
+const struct brw_tracked_state gen6_viewport_state = {
+ .dirty = {
+ .mesa = 0,
+ .brw = BRW_NEW_BATCH,
+ .cache = (CACHE_NEW_CLIP_VP |
+ CACHE_NEW_SF_VP |
+ CACHE_NEW_CC_VP)
+ },
+ .prepare = prepare_viewport_state_pointers,
+ .emit = upload_viewport_state_pointers,
+};