diff options
Diffstat (limited to 'src/mesa/drivers/dri')
40 files changed, 195 insertions, 195 deletions
diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 5320ec06d1e..ca5600bc855 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -823,7 +823,7 @@ driGLFormatToImageFormat(mesa_format format) return __DRI_IMAGE_FORMAT_ABGR8888; case MESA_FORMAT_R8G8B8X8_UNORM: return __DRI_IMAGE_FORMAT_XBGR8888; - case MESA_FORMAT_R8: + case MESA_FORMAT_R_UNORM8: return __DRI_IMAGE_FORMAT_R8; case MESA_FORMAT_GR88: return __DRI_IMAGE_FORMAT_GR88; @@ -855,7 +855,7 @@ driImageFormatToGLFormat(uint32_t image_format) case __DRI_IMAGE_FORMAT_XBGR8888: return MESA_FORMAT_R8G8B8X8_UNORM; case __DRI_IMAGE_FORMAT_R8: - return MESA_FORMAT_R8; + return MESA_FORMAT_R_UNORM8; case __DRI_IMAGE_FORMAT_GR88: return MESA_FORMAT_GR88; case __DRI_IMAGE_FORMAT_SARGB8: diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index d6aaf453327..4e90761497f 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -43,11 +43,11 @@ static GLuint translate_texture_format(GLuint mesa_format) { switch (mesa_format) { - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: return MAPSURF_8BIT | MT_8BIT_L8; - case MESA_FORMAT_I8: + case MESA_FORMAT_I_UNORM8: return MAPSURF_8BIT | MT_8BIT_I8; - case MESA_FORMAT_A8: + case MESA_FORMAT_A_UNORM8: return MAPSURF_8BIT | MT_8BIT_I8; /* Kludge! */ case MESA_FORMAT_AL88: return MAPSURF_16BIT | MT_16BIT_AY88; diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 3da4dbe8de2..49c29939c0d 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -597,7 +597,7 @@ i830_render_target_supported(struct intel_context *intel, if (format == MESA_FORMAT_S8_Z24 || format == MESA_FORMAT_X8_Z24 || - format == MESA_FORMAT_Z16) { + format == MESA_FORMAT_Z_UNORM16) { return true; } diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index a11a01002f7..bdb07294039 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -108,9 +108,9 @@ intel_init_texture_formats(struct gl_context *ctx) ctx->TextureFormatSupported[MESA_FORMAT_ARGB4444] = true; ctx->TextureFormatSupported[MESA_FORMAT_ARGB1555] = true; ctx->TextureFormatSupported[MESA_FORMAT_RGB565] = true; - ctx->TextureFormatSupported[MESA_FORMAT_L8] = true; - ctx->TextureFormatSupported[MESA_FORMAT_A8] = true; - ctx->TextureFormatSupported[MESA_FORMAT_I8] = true; + ctx->TextureFormatSupported[MESA_FORMAT_L_UNORM8] = true; + ctx->TextureFormatSupported[MESA_FORMAT_A_UNORM8] = true; + ctx->TextureFormatSupported[MESA_FORMAT_I_UNORM8] = true; ctx->TextureFormatSupported[MESA_FORMAT_AL88] = true; /* Depth and stencil */ @@ -124,7 +124,7 @@ intel_init_texture_formats(struct gl_context *ctx) * combo that actually works, so this can probably be re-enabled. */ /* - ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z_UNORM16] = true; ctx->TextureFormatSupported[MESA_FORMAT_Z24] = true; */ diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index 3e10de36cbd..ffca3901ca3 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -42,11 +42,11 @@ static GLuint translate_texture_format(mesa_format mesa_format, GLenum DepthMode) { switch (mesa_format) { - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: return MAPSURF_8BIT | MT_8BIT_L8; - case MESA_FORMAT_I8: + case MESA_FORMAT_I_UNORM8: return MAPSURF_8BIT | MT_8BIT_I8; - case MESA_FORMAT_A8: + case MESA_FORMAT_A_UNORM8: return MAPSURF_8BIT | MT_8BIT_A8; case MESA_FORMAT_AL88: return MAPSURF_16BIT | MT_16BIT_AY88; @@ -70,7 +70,7 @@ translate_texture_format(mesa_format mesa_format, GLenum DepthMode) case MESA_FORMAT_RGB_FXT1: case MESA_FORMAT_RGBA_FXT1: return (MAPSURF_COMPRESSED | MT_COMPRESS_FXT1); - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: if (DepthMode == GL_ALPHA) return (MAPSURF_16BIT | MT_16BIT_A16); else if (DepthMode == GL_INTENSITY) diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index bc1ee55b895..e263da0d79a 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -564,7 +564,7 @@ i915_render_target_supported(struct intel_context *intel, if (format == MESA_FORMAT_S8_Z24 || format == MESA_FORMAT_X8_Z24 || - format == MESA_FORMAT_Z16) { + format == MESA_FORMAT_Z_UNORM16) { return true; } diff --git a/src/mesa/drivers/dri/i915/intel_blit.c b/src/mesa/drivers/dri/i915/intel_blit.c index d4d6b430fbe..5e9fc5ba625 100644 --- a/src/mesa/drivers/dri/i915/intel_blit.c +++ b/src/mesa/drivers/dri/i915/intel_blit.c @@ -466,7 +466,7 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) clear_val = PACK_COLOR_1555(clear[3], clear[0], clear[1], clear[2]); break; - case MESA_FORMAT_A8: + case MESA_FORMAT_A_UNORM8: clear_val = PACK_COLOR_8888(clear[3], clear[3], clear[3], clear[3]); break; diff --git a/src/mesa/drivers/dri/i915/intel_screen.c b/src/mesa/drivers/dri/i915/intel_screen.c index 053e73a5e95..9b0262a4a79 100644 --- a/src/mesa/drivers/dri/i915/intel_screen.c +++ b/src/mesa/drivers/dri/i915/intel_screen.c @@ -892,7 +892,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, } else if (mesaVis->depthBits == 16) { assert(mesaVis->stencilBits == 0); - rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16); + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); } else { diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index e7f6328d431..e1b782dbba2 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -87,7 +87,7 @@ brw_blorp_surface_info::set(struct brw_context *brw, this->msaa_layout = mt->msaa_layout; switch (mt->format) { - case MESA_FORMAT_S8: + case MESA_FORMAT_S_UINT8: /* The miptree is a W-tiled stencil buffer. Surface states can't be set * up for W tiling, so we'll need to use Y tiling and have the WM * program swizzle the coordinates. @@ -108,10 +108,10 @@ brw_blorp_surface_info::set(struct brw_context *brw, */ this->brw_surfaceformat = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; - case MESA_FORMAT_Z32_FLOAT: + case MESA_FORMAT_Z_FLOAT32: this->brw_surfaceformat = BRW_SURFACEFORMAT_R32_FLOAT; break; - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: this->brw_surfaceformat = BRW_SURFACEFORMAT_R16_UNORM; break; default: { @@ -326,8 +326,8 @@ brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt, assert(intel_miptree_slice_has_hiz(mt, level, layer)); switch (mt->format) { - case MESA_FORMAT_Z16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break; - case MESA_FORMAT_Z32_FLOAT: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break; + case MESA_FORMAT_Z_UNORM16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break; + case MESA_FORMAT_Z_FLOAT32: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break; case MESA_FORMAT_X8_Z24: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break; default: assert(0); break; } diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index 1030e4e0afd..db41497732e 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.h +++ b/src/mesa/drivers/dri/i965/brw_blorp.h @@ -134,11 +134,11 @@ public: /* Setting this flag indicates that the buffer's contents are W-tiled * stencil data, but the surface state should be set up for Y tiled - * MESA_FORMAT_R8 data (this is necessary because surface states don't + * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't * support W tiling). * * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of - * MESA_FORMAT_R8 data are 128 pixels wide by 32 pixels high, the width and + * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and * pitch stored in the surface state will be multiplied by 2, and the * height will be halved. Also, since W and Y tiles store their data in a * different order, the width and height will be rounded up to a multiple diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index d8df4afd08f..55ff1e6bfb2 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -2030,7 +2030,7 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw, wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_F; break; case GL_UNSIGNED_INT: - if (src_mt->format == MESA_FORMAT_S8) { + if (src_mt->format == MESA_FORMAT_S_UINT8) { /* We process stencil as though it's an unsigned normalized color */ wm_prog_key.texture_data_type = BRW_REGISTER_TYPE_F; } else { diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 659d339e1a5..b463be86ac6 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -141,11 +141,11 @@ brw_fast_clear_depth(struct gl_context *ctx) */ return false; - case MESA_FORMAT_Z32_FLOAT: + case MESA_FORMAT_Z_FLOAT32: depth_clear_value = float_as_int(ctx->Depth.Clear); break; - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: /* From the Sandy Bridge PRM, volume 2 part 1, page 314: * * "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 2375993beaf..438637447de 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -151,9 +151,9 @@ brw_depthbuffer_format(struct brw_context *brw) return BRW_DEPTHFORMAT_D32_FLOAT; switch (drb->mt->format) { - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return BRW_DEPTHFORMAT_D16_UNORM; - case MESA_FORMAT_Z32_FLOAT: + case MESA_FORMAT_Z_FLOAT32: return BRW_DEPTHFORMAT_D32_FLOAT; case MESA_FORMAT_X8_Z24: if (brw->gen >= 6) { @@ -230,7 +230,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt, if (stencil_mt->stencil_mt) stencil_mt = stencil_mt->stencil_mt; - if (stencil_mt->format == MESA_FORMAT_S8) { + if (stencil_mt->format == MESA_FORMAT_S_UINT8) { /* Separate stencil buffer uses 64x64 tiles. */ tile_mask_x |= 63; tile_mask_y |= 63; @@ -494,7 +494,7 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, stencil_mt = get_stencil_miptree(stencil_irb); brw->depthstencil.stencil_mt = stencil_mt; - if (stencil_mt->format == MESA_FORMAT_S8) { + if (stencil_mt->format == MESA_FORMAT_S_UINT8) { /* Note: we can't compute the stencil offset using * intel_region_get_aligned_offset(), because stencil_region claims * that the region is untiled even though it's W tiled. @@ -526,7 +526,7 @@ brw_emit_depthbuffer(struct brw_context *brw) uint32_t width = 1, height = 1; if (stencil_mt) { - separate_stencil = stencil_mt->format == MESA_FORMAT_S8; + separate_stencil = stencil_mt->format == MESA_FORMAT_S_UINT8; /* Gen7 supports only separate stencil */ assert(separate_stencil || brw->gen < 7); diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 566d68834f7..651c0f96217 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -327,8 +327,8 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_R8G8B8X8_UNORM] = BRW_SURFACEFORMAT_R8G8B8X8_UNORM, [MESA_FORMAT_B8G8R8X8_UNORM] = BRW_SURFACEFORMAT_B8G8R8X8_UNORM, [MESA_FORMAT_X8R8G8B8_UNORM] = 0, - [MESA_FORMAT_RGB888] = 0, - [MESA_FORMAT_BGR888] = BRW_SURFACEFORMAT_R8G8B8_UNORM, + [MESA_FORMAT_BGR_UNORM8] = 0, + [MESA_FORMAT_RGB_UNORM8] = BRW_SURFACEFORMAT_R8G8B8_UNORM, [MESA_FORMAT_RGB565] = BRW_SURFACEFORMAT_B5G6R5_UNORM, [MESA_FORMAT_RGB565_REV] = 0, [MESA_FORMAT_ARGB4444] = BRW_SURFACEFORMAT_B4G4R4A4_UNORM, @@ -342,33 +342,33 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_AL1616] = BRW_SURFACEFORMAT_L16A16_UNORM, [MESA_FORMAT_AL1616_REV] = 0, [MESA_FORMAT_RGB332] = 0, - [MESA_FORMAT_A8] = BRW_SURFACEFORMAT_A8_UNORM, - [MESA_FORMAT_A16] = BRW_SURFACEFORMAT_A16_UNORM, - [MESA_FORMAT_L8] = BRW_SURFACEFORMAT_L8_UNORM, - [MESA_FORMAT_L16] = BRW_SURFACEFORMAT_L16_UNORM, - [MESA_FORMAT_I8] = BRW_SURFACEFORMAT_I8_UNORM, - [MESA_FORMAT_I16] = BRW_SURFACEFORMAT_I16_UNORM, + [MESA_FORMAT_A_UNORM8] = BRW_SURFACEFORMAT_A8_UNORM, + [MESA_FORMAT_A_UNORM16] = BRW_SURFACEFORMAT_A16_UNORM, + [MESA_FORMAT_L_UNORM8] = BRW_SURFACEFORMAT_L8_UNORM, + [MESA_FORMAT_L_UNORM16] = BRW_SURFACEFORMAT_L16_UNORM, + [MESA_FORMAT_I_UNORM8] = BRW_SURFACEFORMAT_I8_UNORM, + [MESA_FORMAT_I_UNORM16] = BRW_SURFACEFORMAT_I16_UNORM, [MESA_FORMAT_YCBCR_REV] = BRW_SURFACEFORMAT_YCRCB_NORMAL, [MESA_FORMAT_YCBCR] = BRW_SURFACEFORMAT_YCRCB_SWAPUVY, - [MESA_FORMAT_R8] = BRW_SURFACEFORMAT_R8_UNORM, + [MESA_FORMAT_R_UNORM8] = BRW_SURFACEFORMAT_R8_UNORM, [MESA_FORMAT_GR88] = BRW_SURFACEFORMAT_R8G8_UNORM, [MESA_FORMAT_RG88] = 0, - [MESA_FORMAT_R16] = BRW_SURFACEFORMAT_R16_UNORM, + [MESA_FORMAT_R_UNORM16] = BRW_SURFACEFORMAT_R16_UNORM, [MESA_FORMAT_GR1616] = BRW_SURFACEFORMAT_R16G16_UNORM, [MESA_FORMAT_RG1616] = 0, [MESA_FORMAT_ARGB2101010] = BRW_SURFACEFORMAT_B10G10R10A2_UNORM, [MESA_FORMAT_Z24_S8] = 0, [MESA_FORMAT_S8_Z24] = 0, - [MESA_FORMAT_Z16] = 0, + [MESA_FORMAT_Z_UNORM16] = 0, [MESA_FORMAT_X8_Z24] = 0, [MESA_FORMAT_Z24_X8] = 0, - [MESA_FORMAT_Z32] = 0, - [MESA_FORMAT_S8] = 0, + [MESA_FORMAT_Z_UNORM32] = 0, + [MESA_FORMAT_S_UINT8] = 0, - [MESA_FORMAT_SRGB8] = 0, + [MESA_FORMAT_BGR_SRGB8] = 0, [MESA_FORMAT_SRGBA8] = 0, [MESA_FORMAT_SARGB8] = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB, - [MESA_FORMAT_SL8] = BRW_SURFACEFORMAT_L8_UNORM_SRGB, + [MESA_FORMAT_L_SRGB8] = BRW_SURFACEFORMAT_L8_UNORM_SRGB, [MESA_FORMAT_SLA8] = BRW_SURFACEFORMAT_L8A8_UNORM_SRGB, [MESA_FORMAT_SRGB_DXT1] = BRW_SURFACEFORMAT_DXT1_RGB_SRGB, [MESA_FORMAT_SRGBA_DXT1] = BRW_SURFACEFORMAT_BC1_UNORM_SRGB, @@ -463,7 +463,7 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_SIGNED_GR1616] = BRW_SURFACEFORMAT_R16G16_SNORM, [MESA_FORMAT_SIGNED_RGB_16] = BRW_SURFACEFORMAT_R16G16B16_SNORM, [MESA_FORMAT_SIGNED_RGBA_16] = BRW_SURFACEFORMAT_R16G16B16A16_SNORM, - [MESA_FORMAT_RGBA_16] = BRW_SURFACEFORMAT_R16G16B16A16_UNORM, + [MESA_FORMAT_RGBA_UNORM16] = BRW_SURFACEFORMAT_R16G16B16A16_UNORM, [MESA_FORMAT_RED_RGTC1] = BRW_SURFACEFORMAT_BC4_UNORM, [MESA_FORMAT_SIGNED_RED_RGTC1] = BRW_SURFACEFORMAT_BC4_SNORM, @@ -499,7 +499,7 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_RGB9_E5_FLOAT] = BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP, [MESA_FORMAT_R11_G11_B10_FLOAT] = BRW_SURFACEFORMAT_R11G11B10_FLOAT, - [MESA_FORMAT_Z32_FLOAT] = 0, + [MESA_FORMAT_Z_FLOAT32] = 0, [MESA_FORMAT_Z32_FLOAT_X24S8] = 0, [MESA_FORMAT_ARGB2101010_UINT] = BRW_SURFACEFORMAT_B10G10R10A2_UINT, @@ -509,17 +509,17 @@ brw_format_for_mesa_format(mesa_format mesa_format) [MESA_FORMAT_XRGB1555_UNORM] = BRW_SURFACEFORMAT_B5G5R5X1_UNORM, [MESA_FORMAT_XBGR8888_SNORM] = 0, [MESA_FORMAT_XBGR8888_SRGB] = 0, - [MESA_FORMAT_XBGR8888_UINT] = 0, - [MESA_FORMAT_XBGR8888_SINT] = 0, + [MESA_FORMAT_RGBX_UINT8] = 0, + [MESA_FORMAT_RGBX_SINT8] = 0, [MESA_FORMAT_XRGB2101010_UNORM] = BRW_SURFACEFORMAT_B10G10R10X2_UNORM, - [MESA_FORMAT_XBGR16161616_UNORM] = BRW_SURFACEFORMAT_R16G16B16X16_UNORM, - [MESA_FORMAT_XBGR16161616_SNORM] = 0, - [MESA_FORMAT_XBGR16161616_FLOAT] = BRW_SURFACEFORMAT_R16G16B16X16_FLOAT, - [MESA_FORMAT_XBGR16161616_UINT] = 0, - [MESA_FORMAT_XBGR16161616_SINT] = 0, - [MESA_FORMAT_XBGR32323232_FLOAT] = BRW_SURFACEFORMAT_R32G32B32X32_FLOAT, - [MESA_FORMAT_XBGR32323232_UINT] = 0, - [MESA_FORMAT_XBGR32323232_SINT] = 0, + [MESA_FORMAT_RGBX_UNORM16] = BRW_SURFACEFORMAT_R16G16B16X16_UNORM, + [MESA_FORMAT_RGBX_SNORM16] = 0, + [MESA_FORMAT_RGBX_FLOAT16] = BRW_SURFACEFORMAT_R16G16B16X16_FLOAT, + [MESA_FORMAT_RGBX_UINT16] = 0, + [MESA_FORMAT_RGBX_SINT16] = 0, + [MESA_FORMAT_RGBX_FLOAT32] = BRW_SURFACEFORMAT_R32G32B32X32_FLOAT, + [MESA_FORMAT_RGBX_UINT32] = 0, + [MESA_FORMAT_RGBX_SINT32] = 0, }; assert(mesa_format < MESA_FORMAT_COUNT); return table[mesa_format]; @@ -602,9 +602,9 @@ brw_init_surface_formats(struct brw_context *brw) */ brw->format_supported_as_render_target[MESA_FORMAT_S8_Z24] = true; brw->format_supported_as_render_target[MESA_FORMAT_X8_Z24] = true; - brw->format_supported_as_render_target[MESA_FORMAT_S8] = true; - brw->format_supported_as_render_target[MESA_FORMAT_Z16] = true; - brw->format_supported_as_render_target[MESA_FORMAT_Z32_FLOAT] = true; + brw->format_supported_as_render_target[MESA_FORMAT_S_UINT8] = true; + brw->format_supported_as_render_target[MESA_FORMAT_Z_UNORM16] = true; + brw->format_supported_as_render_target[MESA_FORMAT_Z_FLOAT32] = true; brw->format_supported_as_render_target[MESA_FORMAT_Z32_FLOAT_X24S8] = true; /* We remap depth formats to a supported texturing format in @@ -612,7 +612,7 @@ brw_init_surface_formats(struct brw_context *brw) */ ctx->TextureFormatSupported[MESA_FORMAT_S8_Z24] = true; ctx->TextureFormatSupported[MESA_FORMAT_X8_Z24] = true; - ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z_FLOAT32] = true; ctx->TextureFormatSupported[MESA_FORMAT_Z32_FLOAT_X24S8] = true; /* It appears that Z16 is slower than Z24 (on Intel Ivybridge and newer @@ -627,7 +627,7 @@ brw_init_surface_formats(struct brw_context *brw) * asking for DEPTH_COMPONENT16, so we have to respect that. */ if (_mesa_is_desktop_gl(ctx)) - ctx->TextureFormatSupported[MESA_FORMAT_Z16] = true; + ctx->TextureFormatSupported[MESA_FORMAT_Z_UNORM16] = true; /* On hardware that lacks support for ETC1, we map ETC1 to RGBX * during glCompressedTexImage2D(). See intel_mipmap_tree::wraps_etc1. @@ -694,14 +694,14 @@ translate_tex_format(struct brw_context *brw, switch( mesa_format ) { - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return BRW_SURFACEFORMAT_R16_UNORM; case MESA_FORMAT_S8_Z24: case MESA_FORMAT_X8_Z24: return BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS; - case MESA_FORMAT_Z32_FLOAT: + case MESA_FORMAT_Z_FLOAT32: return BRW_SURFACEFORMAT_R32_FLOAT; case MESA_FORMAT_Z32_FLOAT_X24S8: @@ -738,11 +738,11 @@ brw_is_hiz_depth_format(struct brw_context *brw, mesa_format format) return false; switch (format) { - case MESA_FORMAT_Z32_FLOAT: + case MESA_FORMAT_Z_FLOAT32: case MESA_FORMAT_Z32_FLOAT_X24S8: case MESA_FORMAT_X8_Z24: case MESA_FORMAT_S8_Z24: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return true; default: return false; diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index a7e4ddd3a28..61a2eba2f54 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -75,10 +75,10 @@ intel_horizontal_texture_alignment_unit(struct brw_context *brw, return i; } - if (format == MESA_FORMAT_S8) + if (format == MESA_FORMAT_S_UINT8) return 8; - if (brw->gen >= 7 && format == MESA_FORMAT_Z16) + if (brw->gen >= 7 && format == MESA_FORMAT_Z_UNORM16) return 8; return 4; @@ -114,7 +114,7 @@ intel_vertical_texture_alignment_unit(struct brw_context *brw, if (_mesa_is_format_compressed(format)) return 4; - if (format == MESA_FORMAT_S8) + if (format == MESA_FORMAT_S_UINT8) return brw->gen >= 7 ? 8 : 4; /* Broadwell only supports VALIGN of 4, 8, and 16. The BSpec says 4 diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 961bbc28386..5f6e1b3c391 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -206,7 +206,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer case GL_STENCIL_INDEX16_EXT: /* These aren't actual texture formats, so force them here. */ if (brw->has_separate_stencil) { - rb->Format = MESA_FORMAT_S8; + rb->Format = MESA_FORMAT_S_UINT8; } else { assert(!brw->must_use_separate_stencil); rb->Format = MESA_FORMAT_S8_Z24; @@ -609,7 +609,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) fbo_incomplete(fb, "FBO incomplete: separate stencil " "unsupported\n"); } - if (stencil_mt->format != MESA_FORMAT_S8) { + if (stencil_mt->format != MESA_FORMAT_S_UINT8) { fbo_incomplete(fb, "FBO incomplete: separate stencil is %s " "instead of S8\n", _mesa_get_format_name(stencil_mt->format)); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 9f3c9a76f07..2a84391f732 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -353,7 +353,7 @@ intel_miptree_create_layout(struct brw_context *brw, (brw->has_separate_stencil && brw_is_hiz_depth_format(brw, format)))) { mt->stencil_mt = intel_miptree_create(brw, mt->target, - MESA_FORMAT_S8, + MESA_FORMAT_S_UINT8, mt->first_level, mt->last_level, mt->logical_width0, @@ -373,7 +373,7 @@ intel_miptree_create_layout(struct brw_context *brw, if (mt->format == MESA_FORMAT_S8_Z24) { mt->format = MESA_FORMAT_X8_Z24; } else if (mt->format == MESA_FORMAT_Z32_FLOAT_X24S8) { - mt->format = MESA_FORMAT_Z32_FLOAT; + mt->format = MESA_FORMAT_Z_FLOAT32; mt->cpp = 4; } else { _mesa_problem(NULL, "Unknown format %s in separate stencil mt\n", @@ -397,7 +397,7 @@ intel_miptree_choose_tiling(struct brw_context *brw, enum intel_miptree_tiling_mode requested, struct intel_mipmap_tree *mt) { - if (format == MESA_FORMAT_S8) { + if (format == MESA_FORMAT_S_UINT8) { /* The stencil buffer is W tiled. However, we request from the kernel a * non-tiled buffer because the GTT is incapable of W fencing. */ @@ -519,7 +519,7 @@ intel_miptree_create(struct brw_context *brw, format = MESA_FORMAT_R8G8B8A8_UNORM; break; case MESA_FORMAT_ETC2_R11_EAC: - format = MESA_FORMAT_R16; + format = MESA_FORMAT_R_UNORM16; break; case MESA_FORMAT_ETC2_SIGNED_R11_EAC: format = MESA_FORMAT_SIGNED_R16; @@ -553,7 +553,7 @@ intel_miptree_create(struct brw_context *brw, total_width = mt->total_width; total_height = mt->total_height; - if (format == MESA_FORMAT_S8) { + if (format == MESA_FORMAT_S_UINT8) { /* Align to size of W tile, 64x64. */ total_width = ALIGN(total_width, 64); total_height = ALIGN(total_height, 64); @@ -920,7 +920,7 @@ intel_miptree_match_image(struct intel_mipmap_tree *mt, mesa_format mt_format = mt->format; if (mt->format == MESA_FORMAT_X8_Z24 && mt->stencil_mt) mt_format = MESA_FORMAT_S8_Z24; - if (mt->format == MESA_FORMAT_Z32_FLOAT && mt->stencil_mt) + if (mt->format == MESA_FORMAT_Z_FLOAT32 && mt->stencil_mt) mt_format = MESA_FORMAT_Z32_FLOAT_X24S8; if (mt->etc_format != MESA_FORMAT_NONE) mt_format = mt->etc_format; @@ -1221,7 +1221,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw, /* 8 bits/pixel are required for MCS data when using 4x MSAA (2 bits for * each sample). */ - format = MESA_FORMAT_R8; + format = MESA_FORMAT_R_UNORM8; break; case 8: /* 32 bits/pixel are required for MCS data when using 8x MSAA (3 bits @@ -2066,7 +2066,7 @@ intel_miptree_map_depthstencil(struct brw_context *brw, { struct intel_mipmap_tree *z_mt = mt; struct intel_mipmap_tree *s_mt = mt->stencil_mt; - bool map_z32f_x24s8 = mt->format == MESA_FORMAT_Z32_FLOAT; + bool map_z32f_x24s8 = mt->format == MESA_FORMAT_Z_FLOAT32; int packed_bpp = map_z32f_x24s8 ? 8 : 4; map->stride = map->w * packed_bpp; @@ -2138,7 +2138,7 @@ intel_miptree_unmap_depthstencil(struct brw_context *brw, { struct intel_mipmap_tree *z_mt = mt; struct intel_mipmap_tree *s_mt = mt->stencil_mt; - bool map_z32f_x24s8 = mt->format == MESA_FORMAT_Z32_FLOAT; + bool map_z32f_x24s8 = mt->format == MESA_FORMAT_Z_FLOAT32; if (map->mode & GL_MAP_WRITE_BIT) { uint32_t *packed_map = map->ptr; @@ -2279,7 +2279,7 @@ intel_miptree_map_singlesample(struct brw_context *brw, intel_miptree_slice_set_needs_hiz_resolve(mt, level, slice); } - if (mt->format == MESA_FORMAT_S8) { + if (mt->format == MESA_FORMAT_S_UINT8) { intel_miptree_map_s8(brw, mt, map, level, slice); } else if (mt->etc_format != MESA_FORMAT_NONE && !(mode & BRW_MAP_DIRECT_BIT)) { @@ -2330,7 +2330,7 @@ intel_miptree_unmap_singlesample(struct brw_context *brw, DBG("%s: mt %p (%s) level %d slice %d\n", __FUNCTION__, mt, _mesa_get_format_name(mt->format), level, slice); - if (mt->format == MESA_FORMAT_S8) { + if (mt->format == MESA_FORMAT_S_UINT8) { intel_miptree_unmap_s8(brw, mt, map, level, slice); } else if (mt->etc_format != MESA_FORMAT_NONE && !(map->mode & BRW_MAP_DIRECT_BIT)) { diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 722e346c661..cb2eda60a54 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -279,7 +279,7 @@ struct intel_mipmap_tree * on hardware where we want or need to use separate stencil, there will be * two miptrees for storing the data. If the depthstencil texture or rb is * MESA_FORMAT_Z32_FLOAT_X24S8, then mt->format will be - * MESA_FORMAT_Z32_FLOAT, otherwise for MESA_FORMAT_S8_Z24 objects it will be + * MESA_FORMAT_Z_FLOAT32, otherwise for MESA_FORMAT_S8_Z24 objects it will be * MESA_FORMAT_X8_Z24. * * For ETC1/ETC2 textures, this is one of the uncompressed mesa texture diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 2f2d478d156..1b884cbcad4 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1007,7 +1007,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); - rb = intel_create_private_renderbuffer(MESA_FORMAT_S8, + rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8, num_samples); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base); } else { @@ -1023,7 +1023,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, } else if (mesaVis->depthBits == 16) { assert(mesaVis->stencilBits == 0); - rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16, + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); } diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 1def8ca9f58..ce8bbe17e02 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -572,8 +572,8 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, packing->Invert) return false; - if ((texImage->TexFormat == MESA_FORMAT_L8 && format == GL_LUMINANCE) || - (texImage->TexFormat == MESA_FORMAT_A8 && format == GL_ALPHA)) { + if ((texImage->TexFormat == MESA_FORMAT_L_UNORM8 && format == GL_LUMINANCE) || + (texImage->TexFormat == MESA_FORMAT_A_UNORM8 && format == GL_ALPHA)) { cpp = 1; mem_copy = memcpy; } else if ((texImage->TexFormat == MESA_FORMAT_B8G8R8A8_UNORM) || diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c index 72af5365c86..5d1853374e1 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_fbo.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_fbo.c @@ -60,7 +60,7 @@ set_renderbuffer_format(struct gl_renderbuffer *rb, GLenum internalFormat) break; case GL_DEPTH_COMPONENT16: rb->_BaseFormat = GL_DEPTH_COMPONENT; - rb->Format = MESA_FORMAT_Z16; + rb->Format = MESA_FORMAT_Z_UNORM16; s->cpp = 2; break; case GL_DEPTH_COMPONENT: @@ -277,7 +277,7 @@ validate_format_bpp(mesa_format format) case MESA_FORMAT_Z24_S8: return 32; case MESA_FORMAT_RGB565: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return 16; default: return 0; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_texture.c b/src/mesa/drivers/dri/nouveau/nouveau_texture.c index 1a637cc0495..6882e506190 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_texture.c +++ b/src/mesa/drivers/dri/nouveau/nouveau_texture.c @@ -210,7 +210,7 @@ nouveau_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_LUMINANCE16: case GL_LUMINANCE8: case GL_COMPRESSED_LUMINANCE: - return MESA_FORMAT_L8; + return MESA_FORMAT_L_UNORM8; case GL_ALPHA: case GL_ALPHA4: @@ -218,14 +218,14 @@ nouveau_choose_tex_format(struct gl_context *ctx, GLenum target, case GL_ALPHA16: case GL_ALPHA8: case GL_COMPRESSED_ALPHA: - return MESA_FORMAT_A8; + return MESA_FORMAT_A_UNORM8; case GL_INTENSITY: case GL_INTENSITY4: case GL_INTENSITY12: case GL_INTENSITY16: case GL_INTENSITY8: - return MESA_FORMAT_I8; + return MESA_FORMAT_I_UNORM8; case GL_RGB_S3TC: case GL_RGB4_S3TC: @@ -398,9 +398,9 @@ nouveau_texture_reallocate(struct gl_context *ctx, struct gl_texture_object *t) static unsigned get_teximage_placement(struct gl_texture_image *ti) { - if (ti->TexFormat == MESA_FORMAT_A8 || - ti->TexFormat == MESA_FORMAT_L8 || - ti->TexFormat == MESA_FORMAT_I8) + if (ti->TexFormat == MESA_FORMAT_A_UNORM8 || + ti->TexFormat == MESA_FORMAT_L_UNORM8 || + ti->TexFormat == MESA_FORMAT_I_UNORM8) /* 1 cpp formats will have to be swizzled by the CPU, * so leave them in system RAM for now. */ return NOUVEAU_BO_MAP; diff --git a/src/mesa/drivers/dri/nouveau/nouveau_util.h b/src/mesa/drivers/dri/nouveau/nouveau_util.h index 13dc0f936fb..547d1be35a7 100644 --- a/src/mesa/drivers/dri/nouveau/nouveau_util.h +++ b/src/mesa/drivers/dri/nouveau/nouveau_util.h @@ -61,7 +61,7 @@ pack_zs_i(mesa_format f, uint32_t z, uint8_t s) return (z & 0xffffff00) | (s & 0xff); case MESA_FORMAT_Z24_X8: return (z & 0xffffff00); - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return (z & 0xffff0000) >> 16; default: assert(0); diff --git a/src/mesa/drivers/dri/nouveau/nv04_context.c b/src/mesa/drivers/dri/nouveau/nv04_context.c index 21399532232..93dcd879d34 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_context.c +++ b/src/mesa/drivers/dri/nouveau/nv04_context.c @@ -37,8 +37,8 @@ texunit_needs_combiners(struct gl_texture_unit *u) struct gl_texture_object *t = u->_Current; struct gl_texture_image *ti = t->Image[0][t->BaseLevel]; - return ti->TexFormat == MESA_FORMAT_A8 || - ti->TexFormat == MESA_FORMAT_L8 || + return ti->TexFormat == MESA_FORMAT_A_UNORM8 || + ti->TexFormat == MESA_FORMAT_L_UNORM8 || u->EnvMode == GL_COMBINE || u->EnvMode == GL_COMBINE4_NV || u->EnvMode == GL_BLEND || diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_frag.c b/src/mesa/drivers/dri/nouveau/nv04_state_frag.c index 61e259f388a..17d27814063 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_frag.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_frag.c @@ -141,13 +141,13 @@ get_input_arg(struct combiner_state *rc, int arg, int flags) struct gl_texture_object *t = rc->ctx->Texture.Unit[i]._Current; mesa_format format = t->Image[0][t->BaseLevel]->TexFormat; - if (format == MESA_FORMAT_A8) { + if (format == MESA_FORMAT_A_UNORM8) { /* Emulated using I8. */ if (is_color_operand(operand)) return COMBINER_SOURCE(ZERO) | get_input_mapping(rc, operand, flags); - } else if (format == MESA_FORMAT_L8) { + } else if (format == MESA_FORMAT_L_UNORM8) { /* Emulated using I8. */ if (!is_color_operand(operand)) return COMBINER_SOURCE(ZERO) | diff --git a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c index ae9548969fb..c4a20fa575c 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv04_state_tex.c @@ -38,9 +38,9 @@ static uint32_t get_tex_format(struct gl_texture_image *ti) { switch (ti->TexFormat) { - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8; case MESA_FORMAT_ARGB1555: return NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5; diff --git a/src/mesa/drivers/dri/nouveau/nv04_surface.c b/src/mesa/drivers/dri/nouveau/nv04_surface.c index c8390717051..0d8cf3b59e3 100644 --- a/src/mesa/drivers/dri/nouveau/nv04_surface.c +++ b/src/mesa/drivers/dri/nouveau/nv04_surface.c @@ -37,9 +37,9 @@ static inline int swzsurf_format(mesa_format format) { switch (format) { - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: case MESA_FORMAT_RGB332: return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8; @@ -54,7 +54,7 @@ swzsurf_format(mesa_format format) case MESA_FORMAT_AL88_REV: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5; case MESA_FORMAT_A8B8G8R8_UNORM: @@ -64,7 +64,7 @@ swzsurf_format(mesa_format format) case MESA_FORMAT_A8R8G8B8_UNORM: case MESA_FORMAT_S8_Z24: case MESA_FORMAT_Z24_S8: - case MESA_FORMAT_Z32: + case MESA_FORMAT_Z_UNORM32: return NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8; default: @@ -76,9 +76,9 @@ static inline int surf2d_format(mesa_format format) { switch (format) { - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: case MESA_FORMAT_RGB332: return NV04_CONTEXT_SURFACES_2D_FORMAT_Y8; @@ -93,7 +93,7 @@ surf2d_format(mesa_format format) case MESA_FORMAT_AL88_REV: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5; case MESA_FORMAT_A8B8G8R8_UNORM: @@ -103,7 +103,7 @@ surf2d_format(mesa_format format) case MESA_FORMAT_A8R8G8B8_UNORM: case MESA_FORMAT_S8_Z24: case MESA_FORMAT_Z24_S8: - case MESA_FORMAT_Z32: + case MESA_FORMAT_Z_UNORM32: return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; default: @@ -115,9 +115,9 @@ static inline int rect_format(mesa_format format) { switch (format) { - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: case MESA_FORMAT_RGB332: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; @@ -132,7 +132,7 @@ rect_format(mesa_format format) case MESA_FORMAT_AL88_REV: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; case MESA_FORMAT_A8B8G8R8_UNORM: @@ -142,7 +142,7 @@ rect_format(mesa_format format) case MESA_FORMAT_A8R8G8B8_UNORM: case MESA_FORMAT_S8_Z24: case MESA_FORMAT_Z24_S8: - case MESA_FORMAT_Z32: + case MESA_FORMAT_Z_UNORM32: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; default: @@ -154,9 +154,9 @@ static inline int sifm_format(mesa_format format) { switch (format) { - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: case MESA_FORMAT_RGB332: return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8; @@ -171,7 +171,7 @@ sifm_format(mesa_format format) case MESA_FORMAT_AL88_REV: case MESA_FORMAT_YCBCR: case MESA_FORMAT_YCBCR_REV: - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5; case MESA_FORMAT_A8B8G8R8_UNORM: @@ -181,7 +181,7 @@ sifm_format(mesa_format format) case MESA_FORMAT_A8R8G8B8_UNORM: case MESA_FORMAT_S8_Z24: case MESA_FORMAT_Z24_S8: - case MESA_FORMAT_Z32: + case MESA_FORMAT_Z_UNORM32: return NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8; default: diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c index 9badefa3db6..4cd47abbd70 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_fb.c @@ -42,7 +42,7 @@ get_rt_format(mesa_format format) return NV10_3D_RT_FORMAT_COLOR_A8R8G8B8; case MESA_FORMAT_RGB565: return NV10_3D_RT_FORMAT_COLOR_R5G6B5; - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV10_3D_RT_FORMAT_DEPTH_Z16; case MESA_FORMAT_Z24_S8: return NV10_3D_RT_FORMAT_DEPTH_Z24S8; diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_frag.c b/src/mesa/drivers/dri/nouveau/nv10_state_frag.c index f71cb0d28a4..10f067fdec1 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_frag.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_frag.c @@ -172,13 +172,13 @@ get_input_arg(struct combiner_state *rc, int arg, int flags) struct gl_texture_object *t = rc->ctx->Texture.Unit[i]._Current; mesa_format format = t->Image[0][t->BaseLevel]->TexFormat; - if (format == MESA_FORMAT_A8) { + if (format == MESA_FORMAT_A_UNORM8) { /* Emulated using I8. */ if (is_color_operand(operand)) return RC_IN_SOURCE(ZERO) | get_input_mapping(rc, operand, flags); - } else if (format == MESA_FORMAT_L8) { + } else if (format == MESA_FORMAT_L_UNORM8) { /* Sometimes emulated using I8. */ if (!is_color_operand(operand)) return RC_IN_SOURCE(ZERO) | diff --git a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c index 49e908f949a..316ee2abe6a 100644 --- a/src/mesa/drivers/dri/nouveau/nv10_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv10_state_tex.c @@ -105,11 +105,11 @@ get_tex_format_pot(struct gl_texture_image *ti) case MESA_FORMAT_RGB565: return NV10_3D_TEX_FORMAT_FORMAT_R5G6B5; - case MESA_FORMAT_A8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_I_UNORM8: return NV10_3D_TEX_FORMAT_FORMAT_I8; - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: return NV10_3D_TEX_FORMAT_FORMAT_L8; case MESA_FORMAT_RGB_DXT1: @@ -141,9 +141,9 @@ get_tex_format_rect(struct gl_texture_image *ti) case MESA_FORMAT_B8G8R8X8_UNORM: return NV10_3D_TEX_FORMAT_FORMAT_A8R8G8B8_RECT; - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: return NV10_3D_TEX_FORMAT_FORMAT_I8_RECT; default: diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c index cf216a69950..6b6cf3e3d65 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_fb.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_fb.c @@ -42,7 +42,7 @@ get_rt_format(mesa_format format) return NV20_3D_RT_FORMAT_COLOR_A8R8G8B8; case MESA_FORMAT_RGB565: return NV20_3D_RT_FORMAT_COLOR_R5G6B5; - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: return NV20_3D_RT_FORMAT_DEPTH_Z16; case MESA_FORMAT_Z24_S8: return NV20_3D_RT_FORMAT_DEPTH_Z24S8; diff --git a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c index 7af721850e2..198e4f2a489 100644 --- a/src/mesa/drivers/dri/nouveau/nv20_state_tex.c +++ b/src/mesa/drivers/dri/nouveau/nv20_state_tex.c @@ -102,11 +102,11 @@ get_tex_format_pot(struct gl_texture_image *ti) case MESA_FORMAT_RGB565: return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5; - case MESA_FORMAT_A8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_I_UNORM8: return NV20_3D_TEX_FORMAT_FORMAT_I8; - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: return NV20_3D_TEX_FORMAT_FORMAT_L8; case MESA_FORMAT_RGB_DXT1: @@ -143,11 +143,11 @@ get_tex_format_rect(struct gl_texture_image *ti) case MESA_FORMAT_RGB565: return NV20_3D_TEX_FORMAT_FORMAT_R5G6B5_RECT; - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: return NV20_3D_TEX_FORMAT_FORMAT_L8_RECT; - case MESA_FORMAT_A8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_I_UNORM8: return NV20_3D_TEX_FORMAT_FORMAT_I8_RECT; default: diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index 142a5175bfd..62e38aabb49 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -47,9 +47,9 @@ unsigned r200_check_blit(mesa_format mesa_format, uint32_t dst_pitch) case MESA_FORMAT_RGB565: case MESA_FORMAT_ARGB4444: case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: /* swizzled */ case MESA_FORMAT_A8B8G8R8_UNORM: case MESA_FORMAT_R8G8B8A8_UNORM: @@ -135,11 +135,11 @@ static void inline emit_tx_setup(struct r200_context *r200, case MESA_FORMAT_ARGB1555: txformat |= R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_A8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_I_UNORM8: txformat |= R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: txformat |= R200_TXFORMAT_I8; break; case MESA_FORMAT_AL88: @@ -160,9 +160,9 @@ static void inline emit_tx_setup(struct r200_context *r200, case MESA_FORMAT_RGB565: case MESA_FORMAT_ARGB4444: case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: default: /* no swizzle required */ BEGIN_BATCH(10); @@ -323,9 +323,9 @@ static inline void emit_cb_setup(struct r200_context *r200, case MESA_FORMAT_ARGB1555: dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: dst_format = RADEON_COLOR_FORMAT_RGB8; break; default: diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 80dea79d23f..505c99959c7 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -73,7 +73,7 @@ static const struct tx_table tx_table_be[] = [ MESA_FORMAT_R8G8B8A8_UNORM ] = { R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_RGB888 ] = { 0xffffffff, 0 }, + [ MESA_FORMAT_BGR_UNORM8 ] = { 0xffffffff, 0 }, [ MESA_FORMAT_RGB565 ] = { R200_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_RGB565_REV ] = { R200_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_ARGB4444 ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -82,9 +82,9 @@ static const struct tx_table tx_table_be[] = [ MESA_FORMAT_ARGB1555_REV ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88 ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88_REV ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_A8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_L8 ] = { R200_TXFORMAT_L8, 0 }, - [ MESA_FORMAT_I8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A_UNORM8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L_UNORM8 ] = { R200_TXFORMAT_L8, 0 }, + [ MESA_FORMAT_I_UNORM8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_YCBCR ] = { R200_TXFORMAT_YCBCR, R200_YUV_TO_RGB }, [ MESA_FORMAT_YCBCR_REV ] = { R200_TXFORMAT_YCBCR_REV, R200_YUV_TO_RGB }, [ MESA_FORMAT_RGB_FXT1 ] = { 0xffffffff, 0 }, @@ -101,7 +101,7 @@ static const struct tx_table tx_table_le[] = [ MESA_FORMAT_R8G8B8A8_UNORM ] = { R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_B8G8R8A8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_RGB888 ] = { R200_TXFORMAT_ARGB8888, 0 }, + [ MESA_FORMAT_BGR_UNORM8 ] = { R200_TXFORMAT_ARGB8888, 0 }, [ MESA_FORMAT_RGB565 ] = { R200_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_RGB565_REV ] = { R200_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_ARGB4444 ] = { R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -110,9 +110,9 @@ static const struct tx_table tx_table_le[] = [ MESA_FORMAT_ARGB1555_REV ] = { R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88 ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88_REV ] = { R200_TXFORMAT_AL88 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_A8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_L8 ] = { R200_TXFORMAT_L8, 0 }, - [ MESA_FORMAT_I8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A_UNORM8 ] = { R200_TXFORMAT_A8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L_UNORM8 ] = { R200_TXFORMAT_L8, 0 }, + [ MESA_FORMAT_I_UNORM8 ] = { R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_YCBCR ] = { R200_TXFORMAT_YCBCR, R200_YUV_TO_RGB }, [ MESA_FORMAT_YCBCR_REV ] = { R200_TXFORMAT_YCBCR_REV, R200_YUV_TO_RGB }, [ MESA_FORMAT_RGB_FXT1 ] = { 0xffffffff, 0 }, @@ -768,8 +768,8 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format switch (rb->cpp) { case 4: if (texture_format == __DRI_TEXTURE_FORMAT_RGB) { - texFormat = MESA_FORMAT_RGB888; - t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format; + texFormat = MESA_FORMAT_BGR_UNORM8; + t->pp_txformat = tx_table_le[MESA_FORMAT_BGR_UNORM8].format; } else { texFormat = MESA_FORMAT_B8G8R8A8_UNORM; @@ -779,9 +779,9 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_format break; case 3: default: - texFormat = MESA_FORMAT_RGB888; - t->pp_txformat = tx_table_le[MESA_FORMAT_RGB888].format; - t->pp_txfilter |= tx_table_le[MESA_FORMAT_RGB888].filter; + texFormat = MESA_FORMAT_BGR_UNORM8; + t->pp_txformat = tx_table_le[MESA_FORMAT_BGR_UNORM8].format; + t->pp_txfilter |= tx_table_le[MESA_FORMAT_BGR_UNORM8].filter; break; case 2: texFormat = MESA_FORMAT_RGB565; diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c index 5e291672f68..a5b78550e6b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_blit.c +++ b/src/mesa/drivers/dri/radeon/radeon_blit.c @@ -47,9 +47,9 @@ unsigned r100_check_blit(mesa_format mesa_format, uint32_t dst_pitch) case MESA_FORMAT_RGB565: case MESA_FORMAT_ARGB4444: case MESA_FORMAT_ARGB1555: - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: break; default: return 0; @@ -126,11 +126,11 @@ static void inline emit_tx_setup(struct r100_context *r100, case MESA_FORMAT_ARGB1555: txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_A8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_I_UNORM8: txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP; break; - case MESA_FORMAT_L8: + case MESA_FORMAT_L_UNORM8: txformat |= RADEON_TXFORMAT_I8; break; case MESA_FORMAT_AL88: @@ -199,9 +199,9 @@ static inline void emit_cb_setup(struct r100_context *r100, case MESA_FORMAT_ARGB1555: dst_format = RADEON_COLOR_FORMAT_ARGB1555; break; - case MESA_FORMAT_A8: - case MESA_FORMAT_L8: - case MESA_FORMAT_I8: + case MESA_FORMAT_A_UNORM8: + case MESA_FORMAT_L_UNORM8: + case MESA_FORMAT_I_UNORM8: dst_format = RADEON_COLOR_FORMAT_RGB8; break; default: diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index 7a0ce47e141..f2496e68098 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -315,7 +315,7 @@ radeon_map_renderbuffer(struct gl_context *ctx, mode, out_map, out_stride); return; } - if (rb->Format == MESA_FORMAT_Z16) { + if (rb->Format == MESA_FORMAT_Z_UNORM16) { radeon_map_renderbuffer_z16(ctx, rb, x, y, w, h, mode, out_map, out_stride); return; @@ -423,7 +423,7 @@ radeon_unmap_renderbuffer(struct gl_context *ctx, radeon_unmap_renderbuffer_s8z24(ctx, rb); return; } - if (rb->Format == MESA_FORMAT_Z16) { + if (rb->Format == MESA_FORMAT_Z_UNORM16) { radeon_unmap_renderbuffer_z16(ctx, rb); return; } @@ -511,7 +511,7 @@ radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffe cpp = 4; break; case GL_DEPTH_COMPONENT16: - rb->Format = MESA_FORMAT_Z16; + rb->Format = MESA_FORMAT_Z_UNORM16; cpp = 2; break; case GL_DEPTH_COMPONENT: diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 3dcdcba00d3..2c3186ec433 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -646,7 +646,7 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv, } else if (mesaVis->depthBits == 16) { /* just 16-bit depth buffer, no hw stencil */ struct radeon_renderbuffer *depth = - radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv); + radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv); _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base); depth->has_surface = screen->depthHasSurface; } diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c index 9e7ecca0f68..f8430cb95c0 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c @@ -116,8 +116,8 @@ do_copy_texsubimage(struct gl_context *ctx, dst_mesaformat = MESA_FORMAT_B8G8R8A8_UNORM; break; case 1: - src_mesaformat = MESA_FORMAT_A8; - dst_mesaformat = MESA_FORMAT_A8; + src_mesaformat = MESA_FORMAT_A_UNORM8; + dst_mesaformat = MESA_FORMAT_A_UNORM8; break; default: return GL_FALSE; diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index 51c36e9ee84..e79d8dfae17 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -78,7 +78,7 @@ static const struct tx_table tx_table[] = [ MESA_FORMAT_R8G8B8A8_UNORM ] = { RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_B8G8R8A8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_A8R8G8B8_UNORM ] = { RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_RGB888 ] = { RADEON_TXFORMAT_ARGB8888, 0 }, + [ MESA_FORMAT_BGR_UNORM8 ] = { RADEON_TXFORMAT_ARGB8888, 0 }, [ MESA_FORMAT_RGB565 ] = { RADEON_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_RGB565_REV ] = { RADEON_TXFORMAT_RGB565, 0 }, [ MESA_FORMAT_ARGB4444 ] = { RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, @@ -87,9 +87,9 @@ static const struct tx_table tx_table[] = [ MESA_FORMAT_ARGB1555_REV ] = { RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88 ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_AL88_REV ] = { RADEON_TXFORMAT_AL88 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_A8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, - [ MESA_FORMAT_L8 ] = { RADEON_TXFORMAT_L8, 0 }, - [ MESA_FORMAT_I8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_A_UNORM8 ] = { RADEON_TXFORMAT_A8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, + [ MESA_FORMAT_L_UNORM8 ] = { RADEON_TXFORMAT_L8, 0 }, + [ MESA_FORMAT_I_UNORM8 ] = { RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP, 0 }, [ MESA_FORMAT_YCBCR ] = { RADEON_TXFORMAT_YCBCR, RADEON_YUV_TO_RGB }, [ MESA_FORMAT_YCBCR_REV ] = { RADEON_TXFORMAT_YCBCR_REV, RADEON_YUV_TO_RGB }, [ MESA_FORMAT_RGB_FXT1 ] = { 0xffffffff, 0 }, @@ -643,8 +643,8 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form switch (rb->cpp) { case 4: if (texture_format == __DRI_TEXTURE_FORMAT_RGB) { - t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format; - texFormat = MESA_FORMAT_RGB888; + t->pp_txformat = tx_table[MESA_FORMAT_BGR_UNORM8].format; + texFormat = MESA_FORMAT_BGR_UNORM8; } else { t->pp_txformat = tx_table[MESA_FORMAT_B8G8R8A8_UNORM].format; @@ -654,9 +654,9 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint texture_form break; case 3: default: - texFormat = MESA_FORMAT_RGB888; - t->pp_txformat = tx_table[MESA_FORMAT_RGB888].format; - t->pp_txfilter |= tx_table[MESA_FORMAT_RGB888].filter; + texFormat = MESA_FORMAT_BGR_UNORM8; + t->pp_txformat = tx_table[MESA_FORMAT_BGR_UNORM8].format; + t->pp_txfilter |= tx_table[MESA_FORMAT_BGR_UNORM8].filter; break; case 2: texFormat = MESA_FORMAT_RGB565; diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 15ab677ce39..40b17bb8269 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -349,7 +349,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, in wrong rgb values (same as alpha value instead of 0). */ return _radeon_texformat_al88; #else - return MESA_FORMAT_A8; + return MESA_FORMAT_A_UNORM8; #endif case 1: case GL_LUMINANCE: @@ -358,7 +358,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_LUMINANCE12: case GL_LUMINANCE16: case GL_COMPRESSED_LUMINANCE: - return MESA_FORMAT_L8; + return MESA_FORMAT_L_UNORM8; case 2: case GL_LUMINANCE_ALPHA: @@ -377,7 +377,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_INTENSITY12: case GL_INTENSITY16: case GL_COMPRESSED_INTENSITY: - return MESA_FORMAT_I8; + return MESA_FORMAT_I_UNORM8; case GL_YCBCR_MESA: if (type == GL_UNSIGNED_SHORT_8_8_APPLE || @@ -447,7 +447,7 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, case GL_SLUMINANCE: case GL_SLUMINANCE8: case GL_COMPRESSED_SLUMINANCE: - return MESA_FORMAT_SL8; + return MESA_FORMAT_L_SRGB8; case GL_SLUMINANCE_ALPHA: case GL_SLUMINANCE8_ALPHA8: @@ -512,7 +512,7 @@ unsigned radeonIsFormatRenderable(mesa_format mesa_format) switch (mesa_format) { - case MESA_FORMAT_Z16: + case MESA_FORMAT_Z_UNORM16: case MESA_FORMAT_S8_Z24: return 1; default: |