3 files changed, 6 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 2022159617e..f73ea20442e 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1329,7 +1329,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
    gl_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
 
    if (rb->TexImage && !brw->has_surface_tile_offset) {
-      intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
+      intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y);
 
       if (tile_x != 0 || tile_y != 0) {
 	 /* Original gen4 hardware couldn't draw to a non-tile-aligned
@@ -1358,7 +1358,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
 	      format << BRW_SURFACE_FORMAT_SHIFT);
 
    /* reloc */
-   surf[1] = (intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y) +
+   surf[1] = (intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
 	      region->bo->offset);
 
    surf[2] = ((rb->Width - 1) << BRW_SURFACE_WIDTH_SHIFT |
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index c23a8bef88a..03767050385 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -560,7 +560,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
       surf[0] |= GEN7_SURFACE_HALIGN_8;
 
    /* reloc */
-   surf[1] = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y) +
+   surf[1] = intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
              region->bo->offset; /* reloc */
 
    assert(brw->has_surface_tile_offset);
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
index 5d6dc7ef7df..e1b4df567db 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -150,9 +150,9 @@ void
 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb);
 
 static inline uint32_t
-intel_renderbuffer_tile_offsets(struct intel_renderbuffer *irb,
-				uint32_t *tile_x,
-				uint32_t *tile_y)
+intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb,
+                                    uint32_t *tile_x,
+                                    uint32_t *tile_y)
 {
    return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer,
                                          tile_x, tile_y);