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-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index ff028c7f4d5..c71715ee512 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -83,7 +83,11 @@ brw_lower_packing_builtins(struct brw_context *brw,
int ops = LOWER_PACK_SNORM_2x16
| LOWER_UNPACK_SNORM_2x16
| LOWER_PACK_UNORM_2x16
- | LOWER_UNPACK_UNORM_2x16;
+ | LOWER_UNPACK_UNORM_2x16
+ | LOWER_PACK_SNORM_4x8
+ | LOWER_UNPACK_SNORM_4x8
+ | LOWER_PACK_UNORM_4x8
+ | LOWER_UNPACK_UNORM_4x8;
if (brw->intel.gen >= 7) {
/* Gen7 introduced the f32to16 and f16to32 instructions, which can be