diff options
Diffstat (limited to 'src/mesa/drivers/dri')
24 files changed, 51 insertions, 51 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_state.c b/src/mesa/drivers/dri/i915/i830_state.c index ea54e2b25b1..906e942b020 100644 --- a/src/mesa/drivers/dri/i915/i830_state.c +++ b/src/mesa/drivers/dri/i915/i830_state.c @@ -57,7 +57,7 @@ i830StencilFuncSeparate(struct gl_context * ctx, GLenum face, GLenum func, GLint mask = mask & 0xff; DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __func__, - _mesa_lookup_enum_by_nr(func), ref, mask); + _mesa_enum_to_string(func), ref, mask); I830_STATECHANGE(i830, I830_UPLOAD_CTX); @@ -95,9 +95,9 @@ i830StencilOpSeparate(struct gl_context * ctx, GLenum face, GLenum fail, GLenum int fop, dfop, dpop; DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __func__, - _mesa_lookup_enum_by_nr(fail), - _mesa_lookup_enum_by_nr(zfail), - _mesa_lookup_enum_by_nr(zpass)); + _mesa_enum_to_string(fail), + _mesa_enum_to_string(zfail), + _mesa_enum_to_string(zpass)); fop = 0; dfop = 0; @@ -389,8 +389,8 @@ static void i830BlendEquationSeparate(struct gl_context * ctx, GLenum modeRGB, GLenum modeA) { DBG("%s -> %s, %s\n", __func__, - _mesa_lookup_enum_by_nr(modeRGB), - _mesa_lookup_enum_by_nr(modeA)); + _mesa_enum_to_string(modeRGB), + _mesa_enum_to_string(modeA)); (void) modeRGB; (void) modeA; @@ -403,10 +403,10 @@ i830BlendFuncSeparate(struct gl_context * ctx, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA) { DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __func__, - _mesa_lookup_enum_by_nr(sfactorRGB), - _mesa_lookup_enum_by_nr(dfactorRGB), - _mesa_lookup_enum_by_nr(sfactorA), - _mesa_lookup_enum_by_nr(dfactorA)); + _mesa_enum_to_string(sfactorRGB), + _mesa_enum_to_string(dfactorRGB), + _mesa_enum_to_string(sfactorA), + _mesa_enum_to_string(dfactorA)); (void) sfactorRGB; (void) dfactorRGB; diff --git a/src/mesa/drivers/dri/i915/intel_fbo.c b/src/mesa/drivers/dri/i915/intel_fbo.c index a5d5c5832fb..67013666377 100644 --- a/src/mesa/drivers/dri/i915/intel_fbo.c +++ b/src/mesa/drivers/dri/i915/intel_fbo.c @@ -216,7 +216,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend intel_miptree_release(&irb->mt); DBG("%s: %s: %s (%dx%d)\n", __func__, - _mesa_lookup_enum_by_nr(internalFormat), + _mesa_enum_to_string(internalFormat), _mesa_get_format_name(rb->Format), width, height); if (width == 0 || height == 0) diff --git a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c index e56b9859377..1aa06c18f15 100644 --- a/src/mesa/drivers/dri/i915/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i915/intel_mipmap_tree.c @@ -81,7 +81,7 @@ intel_miptree_create_layout(struct intel_context *intel, return NULL; DBG("%s target %s format %s level %d..%d <-- %p\n", __func__, - _mesa_lookup_enum_by_nr(target), + _mesa_enum_to_string(target), _mesa_get_format_name(format), first_level, last_level, mt); diff --git a/src/mesa/drivers/dri/i915/intel_render.c b/src/mesa/drivers/dri/i915/intel_render.c index 0b0d48e1663..5962dad7d11 100644 --- a/src/mesa/drivers/dri/i915/intel_render.c +++ b/src/mesa/drivers/dri/i915/intel_render.c @@ -113,7 +113,7 @@ static void intelDmaPrimitive(struct intel_context *intel, GLenum prim) { if (0) - fprintf(stderr, "%s %s\n", __func__, _mesa_lookup_enum_by_nr(prim)); + fprintf(stderr, "%s %s\n", __func__, _mesa_enum_to_string(prim)); INTEL_FIREVERTICES(intel); intel->vtbl.reduced_primitive_state(intel, reduced_prim[prim]); intel_set_prim(intel, hw_prim[prim]); diff --git a/src/mesa/drivers/dri/i915/intel_tex_image.c b/src/mesa/drivers/dri/i915/intel_tex_image.c index 01de966a134..0a213e9f614 100644 --- a/src/mesa/drivers/dri/i915/intel_tex_image.c +++ b/src/mesa/drivers/dri/i915/intel_tex_image.c @@ -189,7 +189,7 @@ intelTexImage(struct gl_context * ctx, const struct gl_pixelstore_attrib *unpack) { DBG("%s target %s level %d %dx%dx%d\n", __func__, - _mesa_lookup_enum_by_nr(texImage->TexObject->Target), + _mesa_enum_to_string(texImage->TexObject->Target), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); /* Attempt to use the blitter for PBO image uploads. diff --git a/src/mesa/drivers/dri/i915/intel_tex_subimage.c b/src/mesa/drivers/dri/i915/intel_tex_subimage.c index 2e02d50f13f..f11ef2ea329 100644 --- a/src/mesa/drivers/dri/i915/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i915/intel_tex_subimage.c @@ -72,7 +72,7 @@ intel_blit_texsubimage(struct gl_context * ctx, DBG("BLT subimage %s target %s level %d offset %d,%d %dx%d\n", __func__, - _mesa_lookup_enum_by_nr(texImage->TexObject->Target), + _mesa_enum_to_string(texImage->TexObject->Target), texImage->Level, xoffset, yoffset, width, height); pixels = _mesa_validate_pbo_teximage(ctx, 2, width, height, 1, diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index 144f0fc911a..ae62a800fb7 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -1134,7 +1134,7 @@ intelRasterPrimitive(struct gl_context * ctx, GLenum rprim, GLuint hwprim) if (0) fprintf(stderr, "%s %s %x\n", __func__, - _mesa_lookup_enum_by_nr(rprim), hwprim); + _mesa_enum_to_string(rprim), hwprim); intel->vtbl.reduced_primitive_state(intel, rprim); @@ -1158,7 +1158,7 @@ intelRenderPrimitive(struct gl_context * ctx, GLenum prim) ctx->Polygon.BackMode != GL_FILL); if (0) - fprintf(stderr, "%s %s\n", __func__, _mesa_lookup_enum_by_nr(prim)); + fprintf(stderr, "%s %s\n", __func__, _mesa_enum_to_string(prim)); /* Let some clipping routines know which primitive they're dealing * with. diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index ec13473798c..b5ef276edfc 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -110,7 +110,7 @@ static void brw_set_prim(struct brw_context *brw, struct gl_context *ctx = &brw->ctx; uint32_t hw_prim = get_hw_prim_for_gl_prim(prim->mode); - DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); + DBG("PRIM: %s\n", _mesa_enum_to_string(prim->mode)); /* Slight optimization to avoid the GS program when not needed: */ @@ -143,7 +143,7 @@ static void gen6_set_prim(struct brw_context *brw, { uint32_t hw_prim; - DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); + DBG("PRIM: %s\n", _mesa_enum_to_string(prim->mode)); hw_prim = get_hw_prim_for_gl_prim(prim->mode); @@ -182,7 +182,7 @@ static void brw_emit_prim(struct brw_context *brw, int indirect_flag; int predicate_enable; - DBG("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode), + DBG("PRIM: %s %d %d\n", _mesa_enum_to_string(prim->mode), prim->start, prim->count); int start_vertex_location = prim->start; @@ -582,7 +582,7 @@ void brw_draw_prims( struct gl_context *ctx, */ if (ctx->RenderMode != GL_RENDER) { perf_debug("%s render mode not supported in hardware\n", - _mesa_lookup_enum_by_nr(ctx->RenderMode)); + _mesa_enum_to_string(ctx->RenderMode)); _swsetup_Wakeup(ctx); _tnl_wakeup(ctx); _tnl_draw_prims(ctx, prims, nr_prims, ib, diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index c95f0c37f89..c6dd69bbd29 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -230,7 +230,7 @@ brw_get_vertex_surface_type(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_VERTS)) fprintf(stderr, "type %s size %d normalized %d\n", - _mesa_lookup_enum_by_nr(glarray->Type), + _mesa_enum_to_string(glarray->Type), glarray->Size, glarray->Normalized); if (glarray->Integer) { diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c index 2b76e241d1a..3bab8f46ae8 100644 --- a/src/mesa/drivers/dri/i965/gen6_cc.c +++ b/src/mesa/drivers/dri/i965/gen6_cc.c @@ -97,8 +97,8 @@ gen6_upload_blend_state(struct brw_context *brw) rb_type != GL_UNSIGNED_NORMALIZED && rb_type != GL_FLOAT, "Ignoring %s logic op on %s " "renderbuffer\n", - _mesa_lookup_enum_by_nr(ctx->Color.LogicOp), - _mesa_lookup_enum_by_nr(rb_type)); + _mesa_enum_to_string(ctx->Color.LogicOp), + _mesa_enum_to_string(rb_type)); if (rb_type == GL_UNSIGNED_NORMALIZED) { blend[b].blend1.logic_op_enable = 1; blend[b].blend1.logic_op_func = diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 26f895bf904..87ba624b70d 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -310,7 +310,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend intel_miptree_release(&irb->mt); DBG("%s: %s: %s (%dx%d)\n", __func__, - _mesa_lookup_enum_by_nr(internalFormat), + _mesa_enum_to_string(internalFormat), _mesa_get_format_name(rb->Format), width, height); if (width == 0 || height == 0) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 3f22a87a742..5e7859cf990 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -279,7 +279,7 @@ intel_miptree_create_layout(struct brw_context *brw, return NULL; DBG("%s target %s format %s level %d..%d slices %d <-- %p\n", __func__, - _mesa_lookup_enum_by_nr(target), + _mesa_enum_to_string(target), _mesa_get_format_name(format), first_level, last_level, depth0, mt); diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 226aaeb4d54..536cc406846 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -97,8 +97,8 @@ intelTexImage(struct gl_context * ctx, DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n", __func__, _mesa_get_format_name(texImage->TexFormat), - _mesa_lookup_enum_by_nr(texImage->TexObject->Target), - _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type), + _mesa_enum_to_string(texImage->TexObject->Target), + _mesa_enum_to_string(format), _mesa_enum_to_string(type), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); /* Allocate storage for texture data. */ diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 7507f7669a0..31e511f0b7b 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -206,8 +206,8 @@ intelTexSubImage(struct gl_context * ctx, DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n", __func__, _mesa_get_format_name(texImage->TexFormat), - _mesa_lookup_enum_by_nr(texImage->TexObject->Target), - _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type), + _mesa_enum_to_string(texImage->TexObject->Target), + _mesa_enum_to_string(format), _mesa_enum_to_string(type), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); ok = _mesa_meta_pbo_TexSubImage(ctx, dims, texImage, diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 6fe70b5c9d0..2023ba09449 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -1669,7 +1669,7 @@ static void r200Enable( struct gl_context *ctx, GLenum cap, GLboolean state ) if ( R200_DEBUG & RADEON_STATE ) fprintf( stderr, "%s( %s = %s )\n", __func__, - _mesa_lookup_enum_by_nr( cap ), + _mesa_enum_to_string( cap ), state ? "GL_TRUE" : "GL_FALSE" ); switch ( cap ) { diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 083a1840d9e..feee0b2ba3f 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -68,9 +68,9 @@ static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenu radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s(tex %p) sw %s, tw %s, rw %s\n", __func__, t, - _mesa_lookup_enum_by_nr(swrap), - _mesa_lookup_enum_by_nr(twrap), - _mesa_lookup_enum_by_nr(rwrap)); + _mesa_enum_to_string(swrap), + _mesa_enum_to_string(twrap), + _mesa_enum_to_string(rwrap)); t->pp_txfilter &= ~(R200_CLAMP_S_MASK | R200_CLAMP_T_MASK | R200_BORDER_MODE_D3D); @@ -225,8 +225,8 @@ static void r200SetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf ) radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s(tex %p) minf %s, maxf %s, anisotropy %d.\n", __func__, t, - _mesa_lookup_enum_by_nr(minf), - _mesa_lookup_enum_by_nr(magf), + _mesa_enum_to_string(minf), + _mesa_enum_to_string(magf), anisotropy); if ( anisotropy == R200_MAX_ANISO_1_TO_1 ) { @@ -302,7 +302,7 @@ static void r200TexEnv( struct gl_context *ctx, GLenum target, struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE, "%s( %s )\n", - __func__, _mesa_lookup_enum_by_nr( pname ) ); + __func__, _mesa_enum_to_string( pname ) ); /* This is incorrect: Need to maintain this data for each of * GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch @@ -384,7 +384,7 @@ static void r200TexParameter( struct gl_context *ctx, radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE, "%s(%p, tex %p) pname %s\n", __func__, ctx, texObj, - _mesa_lookup_enum_by_nr( pname ) ); + _mesa_enum_to_string( pname ) ); switch ( pname ) { case GL_TEXTURE_MIN_FILTER: @@ -415,7 +415,7 @@ static void r200DeleteTexture(struct gl_context * ctx, struct gl_texture_object radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_NORMAL, "%s( %p (target = %s) )\n", __func__, (void *)texObj, - _mesa_lookup_enum_by_nr(texObj->Target)); + _mesa_enum_to_string(texObj->Target)); if (rmesa) { int i; @@ -473,7 +473,7 @@ static struct gl_texture_object *r200NewTextureObject(struct gl_context * ctx, radeon_print(RADEON_STATE | RADEON_TEXTURE, RADEON_NORMAL, "%s(%p) target %s, new texture %p.\n", __func__, ctx, - _mesa_lookup_enum_by_nr(target), t); + _mesa_enum_to_string(target), t); _mesa_initialize_texture_object(ctx, &t->base, name, target); t->base.Sampler.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index d834d9bde3f..fde89214ed2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -343,7 +343,7 @@ void radeonDrawBuffer( struct gl_context *ctx, GLenum mode ) { if (RADEON_DEBUG & RADEON_DRI) fprintf(stderr, "%s %s\n", __func__, - _mesa_lookup_enum_by_nr( mode )); + _mesa_enum_to_string( mode )); if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) { radeonContextPtr radeon = RADEON_CONTEXT(ctx); diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index ef62d097bae..5e4aaca1e0e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -700,7 +700,7 @@ radeon_bind_framebuffer(struct gl_context * ctx, GLenum target, radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s(%p, fb %p, target %s) \n", __func__, ctx, fb, - _mesa_lookup_enum_by_nr(target)); + _mesa_enum_to_string(target)); if (target == GL_FRAMEBUFFER_EXT || target == GL_DRAW_FRAMEBUFFER_EXT) { radeon_draw_buffer(ctx, fb); diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 28591cad895..c71766d0a3e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -276,7 +276,7 @@ static void calculate_min_max_lod(struct gl_sampler_object *samp, struct gl_text radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s(%p) target %s, min %d, max %d.\n", __func__, tObj, - _mesa_lookup_enum_by_nr(tObj->Target), + _mesa_enum_to_string(tObj->Target), minLod, maxLod); /* save these values */ diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c index 6998444fb66..e115b749da5 100644 --- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c +++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c @@ -212,7 +212,7 @@ radeonReadPixels(struct gl_context * ctx, */ radeon_print(RADEON_FALLBACKS, RADEON_NORMAL, "Falling back to sw for ReadPixels (format %s, type %s)\n", - _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type)); + _mesa_enum_to_string(format), _mesa_enum_to_string(type)); if (ctx->NewState) _mesa_update_state(ctx); diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index cba3d9c9689..156afb6f6ac 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1452,7 +1452,7 @@ static void radeonEnable( struct gl_context *ctx, GLenum cap, GLboolean state ) if ( RADEON_DEBUG & RADEON_STATE ) fprintf( stderr, "%s( %s = %s )\n", __func__, - _mesa_lookup_enum_by_nr( cap ), + _mesa_enum_to_string( cap ), state ? "GL_TRUE" : "GL_FALSE" ); switch ( cap ) { diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index 8a1fbab39f8..2fbd353297b 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -442,7 +442,7 @@ static GLboolean radeon_run_render( struct gl_context *ctx, radeon_print(RADEON_SWRENDER, RADEON_NORMAL, "radeon_render.c: prim %s %d..%d\n", - _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), + _mesa_enum_to_string(prim & PRIM_MODE_MASK), start, start+length); if (length) diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c index 353fdb00ec8..0955a135de8 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex.c @@ -263,7 +263,7 @@ static void radeonTexEnv( struct gl_context *ctx, GLenum target, if ( RADEON_DEBUG & RADEON_STATE ) { fprintf( stderr, "%s( %s )\n", - __func__, _mesa_lookup_enum_by_nr( pname ) ); + __func__, _mesa_enum_to_string( pname ) ); } switch ( pname ) { @@ -335,7 +335,7 @@ static void radeonTexParameter( struct gl_context *ctx, radeonTexObj* t = radeon_tex_obj(texObj); radeon_print(RADEON_TEXTURE, RADEON_VERBOSE, "%s( %s )\n", __func__, - _mesa_lookup_enum_by_nr( pname ) ); + _mesa_enum_to_string( pname ) ); switch ( pname ) { case GL_TEXTURE_BASE_LEVEL: @@ -359,7 +359,7 @@ static void radeonDeleteTexture( struct gl_context *ctx, radeon_print(RADEON_TEXTURE, RADEON_NORMAL, "%s( %p (target = %s) )\n", __func__, (void *)texObj, - _mesa_lookup_enum_by_nr( texObj->Target ) ); + _mesa_enum_to_string( texObj->Target ) ); if ( rmesa ) { radeon_firevertices(&rmesa->radeon); diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index d05c870128c..4794ddae069 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -279,8 +279,8 @@ mesa_format radeonChooseTextureFormat(struct gl_context * ctx, radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s InternalFormat=%s(%d) type=%s format=%s\n", __func__, - _mesa_lookup_enum_by_nr(internalFormat), internalFormat, - _mesa_lookup_enum_by_nr(type), _mesa_lookup_enum_by_nr(format)); + _mesa_enum_to_string(internalFormat), internalFormat, + _mesa_enum_to_string(type), _mesa_enum_to_string(format)); radeon_print(RADEON_TEXTURE, RADEON_TRACE, "%s do32bpt=%d force16bpt=%d\n", __func__, do32bpt, force16bpt); |