diff options
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_vtbl.c | 45 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_texprog.c | 21 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r128/r128_context.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r128/r128_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r128/r128_lock.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r128/r128_tris.c | 25 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_swtcl.c | 31 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_maos.c | 50 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r300/r300_state.c | 31 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/radeon/radeon_swtcl.c | 31 | ||||
-rw-r--r-- | src/mesa/drivers/dri/savage/savagetris.c | 42 | ||||
-rw-r--r-- | src/mesa/drivers/dri/sis/sis_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/sis/sis_tris.c | 19 | ||||
-rw-r--r-- | src/mesa/drivers/dri/unichrome/via_tris.c | 27 |
18 files changed, 189 insertions, 149 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h index 5bdcc21c5ab..d5811e6c349 100644 --- a/src/mesa/drivers/dri/i915/i830_context.h +++ b/src/mesa/drivers/dri/i915/i830_context.h @@ -118,7 +118,7 @@ struct i830_context { struct intel_context intel; - GLuint last_index; + DECLARE_RENDERINPUTS(last_index_bitset); struct i830_hw_state meta, initial, state, *current; }; diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index e8913e8063c..9e71b111091 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -65,11 +65,13 @@ static void i830_render_start( intelContextPtr intel ) i830ContextPtr i830 = I830_CONTEXT(intel); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint v0 = _3DSTATE_VFT0_CMD; GLuint v2 = _3DSTATE_VFT1_CMD; GLuint mcsb1 = 0; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + /* Important: */ VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr; @@ -78,7 +80,7 @@ static void i830_render_start( intelContextPtr intel ) /* EMIT_ATTR's must be in order as they tell t_vertex.c how to * build up a hardware vertex. */ - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, VFT0_XYZW ); intel->coloroffset = 4; } @@ -87,36 +89,37 @@ static void i830_render_start( intelContextPtr intel ) intel->coloroffset = 3; } - if (index & _TNL_BIT_POINTSIZE) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) { EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F, VFT0_POINT_WIDTH ); } EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, VFT0_DIFFUSE ); intel->specoffset = 0; - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { - if (index & _TNL_BIT_COLOR1) { - intel->specoffset = intel->coloroffset + 1; - EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, VFT0_SPEC ); + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { + intel->specoffset = intel->coloroffset + 1; + EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, VFT0_SPEC ); } - else - EMIT_PAD( 3 ); - - if (index & _TNL_BIT_FOG) - EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, VFT0_SPEC ); else - EMIT_PAD( 1 ); + EMIT_PAD( 3 ); + + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) + EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, VFT0_SPEC ); + else + EMIT_PAD( 1 ); } - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { int i, count = 0; for (i = 0; i < I830_TEX_UNITS; i++) { - if (index & _TNL_BIT_TEX(i)) { - GLuint sz = VB->TexCoordPtr[i]->size; - GLuint emit; - GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & - ~TEXCOORDTYPE_MASK); + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { + GLuint sz = VB->TexCoordPtr[i]->size; + GLuint emit; + GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & + ~TEXCOORDTYPE_MASK); switch (sz) { case 1: @@ -162,7 +165,7 @@ static void i830_render_start( intelContextPtr intel ) if (v0 != i830->state.Ctx[I830_CTXREG_VF] || v2 != i830->state.Ctx[I830_CTXREG_VF2] || mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] || - index != i830->last_index) { + !RENDERINPUTS_EQUAL( index_bitset, i830->last_index_bitset )) { I830_STATECHANGE( i830, I830_UPLOAD_CTX ); @@ -180,7 +183,7 @@ static void i830_render_start( intelContextPtr intel ) i830->state.Ctx[I830_CTXREG_VF] = v0; i830->state.Ctx[I830_CTXREG_VF2] = v2; i830->state.Ctx[I830_CTXREG_MCSB1] = mcsb1; - i830->last_index = index; + RENDERINPUTS_COPY( i830->last_index_bitset, index_bitset ); assert(i830_check_vertex_size( intel, intel->vertex_size )); } diff --git a/src/mesa/drivers/dri/i915/i915_texprog.c b/src/mesa/drivers/dri/i915/i915_texprog.c index 74ece96f8b7..4fbce34ba21 100644 --- a/src/mesa/drivers/dri/i915/i915_texprog.c +++ b/src/mesa/drivers/dri/i915/i915_texprog.c @@ -576,11 +576,13 @@ void i915ValidateTextureProgram( i915ContextPtr i915 ) GLcontext *ctx = &intel->ctx; TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); int i, offset; GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK; GLuint s2 = S2_TEXCOORD_NONE; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + /* Important: */ VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr; @@ -591,9 +593,9 @@ void i915ValidateTextureProgram( i915ContextPtr i915 ) if (i915->vertex_fog == I915_FOG_PIXEL) { EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16 ); - index &= ~_TNL_BIT_FOG; + RENDERINPUTS_CLEAR( index_bitset, _TNL_ATTRIB_FOG ); } - else if (index & _TNL_BITS_TEX_ANY) { + else if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, S4_VFMT_XYZW, 16 ); } else { @@ -601,29 +603,30 @@ void i915ValidateTextureProgram( i915ContextPtr i915 ) } /* How undefined is undefined? */ - if (index & _TNL_BIT_POINTSIZE) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) { EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F, S4_VFMT_POINT_WIDTH, 4 ); } intel->coloroffset = offset / 4; EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, S4_VFMT_COLOR, 4 ); - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { intel->specoffset = offset / 4; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, S4_VFMT_SPEC_FOG, 3 ); } else EMIT_PAD( 3 ); - if (index & _TNL_BIT_FOG) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, S4_VFMT_SPEC_FOG, 1 ); else EMIT_PAD( 1 ); } - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { for (i = 0; i < 8; i++) { - if (index & _TNL_BIT_TEX(i)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { int sz = VB->TexCoordPtr[i]->size; s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK); diff --git a/src/mesa/drivers/dri/r128/r128_context.c b/src/mesa/drivers/dri/r128/r128_context.c index 6194d128f4b..2f30bd253bf 100644 --- a/src/mesa/drivers/dri/r128/r128_context.c +++ b/src/mesa/drivers/dri/r128/r128_context.c @@ -190,7 +190,7 @@ GLboolean r128CreateContext( const __GLcontextModes *glVisual, rmesa->RenderIndex = -1; /* Impossible value */ rmesa->vert_buf = NULL; rmesa->num_verts = 0; - rmesa->tnl_state = ~0; + RENDERINPUTS_ONES( rmesa->tnl_state_bitset ); /* Set the maximum texture size small enough that we can guarentee that * all texture units can bind a maximal texture and have them both in diff --git a/src/mesa/drivers/dri/r128/r128_context.h b/src/mesa/drivers/dri/r128/r128_context.h index b3552ac7639..c51dd7fa58d 100644 --- a/src/mesa/drivers/dri/r128/r128_context.h +++ b/src/mesa/drivers/dri/r128/r128_context.h @@ -130,7 +130,7 @@ struct r128_context { char *verts; /* points to tnl->clipspace.vertex_buf */ GLuint num_verts; int coloroffset, specoffset; - int tnl_state; /* tnl->render_inputs for this _tnl_install_attrs */ + DECLARE_RENDERINPUTS(tnl_state_bitset); /* tnl->render_inputs for this _tnl_install_attrs */ GLuint NewGLState; GLuint Fallback; diff --git a/src/mesa/drivers/dri/r128/r128_lock.c b/src/mesa/drivers/dri/r128/r128_lock.c index ef67bc6a43a..393dd1ed74c 100644 --- a/src/mesa/drivers/dri/r128/r128_lock.c +++ b/src/mesa/drivers/dri/r128/r128_lock.c @@ -89,7 +89,7 @@ void r128GetLock( r128ContextPtr rmesa, GLuint flags ) driUpdateFramebufferSize(rmesa->glCtx, dPriv); rmesa->lastStamp = dPriv->lastStamp; rmesa->new_state |= R128_NEW_CLIP; - rmesa->tnl_state = ~0; + RENDERINPUTS_ONES( rmesa->tnl_state_bitset ); } rmesa->dirty |= R128_UPLOAD_CONTEXT | R128_UPLOAD_CLIPRECTS; diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c index 64f54682b6e..46315225165 100644 --- a/src/mesa/drivers/dri/r128/r128_tris.c +++ b/src/mesa/drivers/dri/r128/r128_tris.c @@ -564,11 +564,13 @@ static void r128RenderStart( GLcontext *ctx ) r128ContextPtr rmesa = R128_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint vc_frmt = 0; GLboolean fallback_projtex = GL_FALSE; GLuint offset = 0; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + /* Important: */ VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr; rmesa->vertex_attr_count = 0; @@ -577,7 +579,7 @@ static void r128RenderStart( GLcontext *ctx ) /* EMIT_ATTR's must be in order as they tell t_vertex.c how to * build up a hardware vertex. */ - if ( index & _TNL_BITS_TEX_ANY ) + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, R128_CCE_VC_FRMT_RHW, 16 ); else EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, 0, 12 ); @@ -591,28 +593,29 @@ static void r128RenderStart( GLcontext *ctx ) R128_CCE_VC_FRMT_DIFFUSE_ARGB, 4 ); #endif - if ( index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG) ) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { #if MESA_LITTLE_ENDIAN - if ( index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, R128_CCE_VC_FRMT_SPEC_FRGB, 3 ); } else EMIT_PAD( 3 ); - if (index & _TNL_BIT_FOG) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, R128_CCE_VC_FRMT_SPEC_FRGB, 1 ); else EMIT_PAD( 1 ); #else - if (index & _TNL_BIT_FOG) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, R128_CCE_VC_FRMT_SPEC_FRGB, 1 ); else EMIT_PAD( 1 ); - if ( index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB, R128_CCE_VC_FRMT_SPEC_FRGB, 3 ); @@ -621,12 +624,12 @@ static void r128RenderStart( GLcontext *ctx ) #endif } - if ( index & _TNL_BIT_TEX(rmesa->tmu_source[0]) ) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[0]) )) { if ( VB->TexCoordPtr[rmesa->tmu_source[0]]->size > 2 ) fallback_projtex = GL_TRUE; EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, R128_CCE_VC_FRMT_S_T, 8 ); } - if ( index & _TNL_BIT_TEX(rmesa->tmu_source[1]) ) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[1]) )) { if ( VB->TexCoordPtr[rmesa->tmu_source[1]]->size > 2 ) fallback_projtex = GL_TRUE; EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, R128_CCE_VC_FRMT_S2_T2, 8 ); @@ -638,7 +641,7 @@ static void r128RenderStart( GLcontext *ctx ) /* Only need to change the vertex emit code if there has been a * statechange to a TNL index. */ - if ( index != rmesa->tnl_state ) { + if (!RENDERINPUTS_EQUAL( index_bitset, rmesa->tnl_state_bitset )) { FLUSH_BATCH( rmesa ); rmesa->dirty |= R128_UPLOAD_CONTEXT; @@ -763,7 +766,7 @@ void r128InitTriFuncs( GLcontext *ctx ) _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12, (6 + 2 * ctx->Const.MaxTextureUnits) * sizeof(GLfloat) ); rmesa->verts = (char *)tnl->clipspace.vertex_buf; - rmesa->tnl_state = -1; + RENDERINPUTS_ONES( rmesa->tnl_state_bitset ); rmesa->NewGLState |= _R128_NEW_RENDER_STATE; } diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index faf1b96a2b8..f6709d3d7fd 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -897,7 +897,7 @@ struct r200_context { GLuint TclFallback; GLuint Fallback; GLuint NewGLState; - GLuint tnl_index; /* index of bits for last tnl_install_attrs */ + DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ /* Vertex buffers */ diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index 7ab3f7cd032..aa78f382868 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -85,11 +85,12 @@ static void r200SetVertexFormat( GLcontext *ctx ) r200ContextPtr rmesa = R200_CONTEXT( ctx ); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); int fmt_0 = 0; int fmt_1 = 0; int offset = 0; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); /* Important: */ @@ -106,7 +107,8 @@ static void r200SetVertexFormat( GLcontext *ctx ) /* EMIT_ATTR's must be in order as they tell t_vertex.c how to * build up a hardware vertex. */ - if ( !rmesa->swtcl.needproj || (index & _TNL_BITS_TEX_ANY)) { /* need w coord for projected textures */ + if ( !rmesa->swtcl.needproj || + RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { /* need w coord for projected textures */ EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F, R200_VTX_XY | R200_VTX_Z0 | R200_VTX_W0 ); offset = 4; } @@ -124,10 +126,11 @@ static void r200SetVertexFormat( GLcontext *ctx ) offset += 1; rmesa->swtcl.specoffset = 0; - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { #if MESA_LITTLE_ENDIAN - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->swtcl.specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB, (R200_VTX_PK_RGBA << R200_VTX_COLOR_1_SHIFT) ); } @@ -135,21 +138,21 @@ static void r200SetVertexFormat( GLcontext *ctx ) EMIT_PAD( 3 ); } - if (index & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, (R200_VTX_PK_RGBA << R200_VTX_COLOR_1_SHIFT) ); } else { EMIT_PAD( 1 ); } #else - if (index & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, (R200_VTX_PK_RGBA << R200_VTX_COLOR_1_SHIFT) ); } else { EMIT_PAD( 1 ); } - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->swtcl.specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, (R200_VTX_PK_RGBA << R200_VTX_COLOR_1_SHIFT) ); } @@ -159,11 +162,11 @@ static void r200SetVertexFormat( GLcontext *ctx ) #endif } - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { int i; for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - if (index & _TNL_BIT_TEX(i)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { GLuint sz = VB->TexCoordPtr[i]->size; fmt_1 |= sz << (3 * i); @@ -179,7 +182,7 @@ static void r200SetVertexFormat( GLcontext *ctx ) rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |= R200_FOG_USE_SPEC_ALPHA; } - if ( rmesa->tnl_index != index || + if (!RENDERINPUTS_EQUAL( rmesa->tnl_index_bitset, index_bitset ) || (rmesa->hw.vtx.cmd[VTX_VTXFMT_0] != fmt_0) || (rmesa->hw.vtx.cmd[VTX_VTXFMT_1] != fmt_1) ) { R200_NEWPRIM(rmesa); @@ -193,7 +196,7 @@ static void r200SetVertexFormat( GLcontext *ctx ) rmesa->swtcl.vertex_attr_count, NULL, 0 ); rmesa->swtcl.vertex_size /= 4; - rmesa->tnl_index = index; + RENDERINPUTS_COPY( rmesa->tnl_index_bitset, index_bitset ); } } @@ -235,12 +238,12 @@ void r200ChooseVertexState( GLcontext *ctx ) /* HW perspective divide is a win, but tiny vertex formats are a * bigger one. */ - if ( ((tnl->render_inputs & _TNL_BITS_TEX_ANY) == 0) + if (!RENDERINPUTS_TEST_RANGE( tnl->render_inputs_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) || (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { rmesa->swtcl.needproj = GL_TRUE; vte |= R200_VTX_XY_FMT | R200_VTX_Z_FMT; vte &= ~R200_VTX_W0_FMT; - if (tnl->render_inputs & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( tnl->render_inputs_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { vap &= ~R200_VAP_FORCE_W_TO_ONE; } else { @@ -719,7 +722,7 @@ void r200Fallback( GLcontext *ctx, GLuint bit, GLboolean mode ) */ _tnl_invalidate_vertex_state( ctx, ~0 ); _tnl_invalidate_vertices( ctx, ~0 ); - rmesa->tnl_index = 0; + RENDERINPUTS_ZERO( rmesa->tnl_index_bitset ); r200ChooseVertexState( ctx ); r200ChooseRenderState( ctx ); } diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h index 449459b5b10..7504bd894ab 100644 --- a/src/mesa/drivers/dri/r300/r300_context.h +++ b/src/mesa/drivers/dri/r300/r300_context.h @@ -776,7 +776,7 @@ struct r300_state { GLuint *Elts; struct r300_dma_region elt_dma; - GLuint render_inputs; /* actual render inputs that R300 was configured for. + DECLARE_RENDERINPUTS(render_inputs_bitset); /* actual render inputs that R300 was configured for. They are the same as tnl->render_inputs for fixed pipeline */ struct { diff --git a/src/mesa/drivers/dri/r300/r300_maos.c b/src/mesa/drivers/dri/r300/r300_maos.c index 1aa005c7207..290ffb44eab 100644 --- a/src/mesa/drivers/dri/r300/r300_maos.c +++ b/src/mesa/drivers/dri/r300/r300_maos.c @@ -268,8 +268,10 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) GLuint vic_1 = 0; /* R300_VAP_INPUT_CNTL_1 */ GLuint aa_vap_reg = 0; /* VAP register assignment */ GLuint i; - GLuint inputs = 0; - + DECLARE_RENDERINPUTS(inputs_bitset); + + RENDERINPUTS_ZERO( inputs_bitset ); + #define CONFIGURE_AOS(r, f, v, sz, cn) { \ if (RADEON_DEBUG & DEBUG_STATE) \ fprintf(stderr, "Enabling "#v "\n"); \ @@ -300,23 +302,23 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) GLuint InputsRead = CURRENT_VERTEX_SHADER(ctx)->Base.InputsRead; struct r300_vertex_program *prog=(struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx); if (InputsRead & (1<<VERT_ATTRIB_POS)) { - inputs |= _TNL_BIT_POS; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_POS ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_POS]; } if (InputsRead & (1<<VERT_ATTRIB_NORMAL)) { - inputs |= _TNL_BIT_NORMAL; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_NORMAL ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_NORMAL]; } if (InputsRead & (1<<VERT_ATTRIB_COLOR0)) { - inputs |= _TNL_BIT_COLOR0; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_COLOR0 ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_COLOR0]; } if (InputsRead & (1<<VERT_ATTRIB_COLOR1)) { - inputs |= _TNL_BIT_COLOR1; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_COLOR1 ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_COLOR1]; } if (InputsRead & (1<<VERT_ATTRIB_FOG)) { - inputs |= _TNL_BIT_FOG; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_FOG ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_FOG]; } if(ctx->Const.MaxTextureUnits > 8) { /* Not sure if this can even happen... */ @@ -325,17 +327,17 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) } for (i=0;i<ctx->Const.MaxTextureUnits;i++) { if (InputsRead & (1<<(VERT_ATTRIB_TEX0+i))) { - inputs |= _TNL_BIT_TEX0<<i; + RENDERINPUTS_SET( inputs_bitset, _TNL_ATTRIB_TEX(i) ); rmesa->state.aos[nr++].aos_reg = prog->inputs[VERT_ATTRIB_TEX0+i]; } } nr = 0; } else { - inputs = TNL_CONTEXT(ctx)->render_inputs; + RENDERINPUTS_COPY( inputs_bitset, TNL_CONTEXT(ctx)->render_inputs_bitset ); } - rmesa->state.render_inputs = inputs; + RENDERINPUTS_COPY( rmesa->state.render_inputs_bitset, inputs_bitset ); - if (inputs & _TNL_BIT_POS) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_POS )) { CONFIGURE_AOS(i_coords, AOS_FORMAT_FLOAT, VB->AttribPtr[VERT_ATTRIB_POS], immd ? 4 : VB->AttribPtr[VERT_ATTRIB_POS].size, @@ -344,7 +346,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) vic_1 |= R300_INPUT_CNTL_POS; } - if (inputs & _TNL_BIT_NORMAL) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_NORMAL )) { CONFIGURE_AOS(i_normal, AOS_FORMAT_FLOAT, VB->AttribPtr[VERT_ATTRIB_NORMAL], immd ? 4 : VB->AttribPtr[VERT_ATTRIB_NORMAL].size, @@ -353,7 +355,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) vic_1 |= R300_INPUT_CNTL_NORMAL; } - if (inputs & _TNL_BIT_COLOR0) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR0 )) { int emitsize=4; if (!immd) { @@ -376,7 +378,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) vic_1 |= R300_INPUT_CNTL_COLOR; } - if (inputs & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR1 )) { int emitsize=4; if (!immd) { @@ -398,7 +400,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) } #if 0 - if (inputs & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_FOG )) { CONFIGURE_AOS( AOS_FORMAT_FLOAT, VB->FogCoordPtr, immd ? 4 : VB->FogCoordPtr->size, @@ -408,7 +410,7 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) r300->state.texture.tc_count = 0; for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - if (inputs & (_TNL_BIT_TEX0 << i)) { + if (RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_TEX(i) )) { CONFIGURE_AOS(i_tex[i], AOS_FORMAT_FLOAT, VB->AttribPtr[VERT_ATTRIB_TEX0+i], immd ? 4 : VB->AttribPtr[VERT_ATTRIB_TEX0+i].size, @@ -531,17 +533,17 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) #if 0 r300->hw.vic.cmd[R300_VIC_CNTL_1]=0; - if(r300->state.render_inputs & _TNL_BIT_POS) + if(RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_POS )) r300->hw.vic.cmd[R300_VIC_CNTL_1]|=R300_INPUT_CNTL_POS; - if(r300->state.render_inputs & _TNL_BIT_NORMAL) + if(RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_NORMAL )) r300->hw.vic.cmd[R300_VIC_CNTL_1]|=R300_INPUT_CNTL_NORMAL; - if(r300->state.render_inputs & _TNL_BIT_COLOR0) + if(RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_COLOR0 )) r300->hw.vic.cmd[R300_VIC_CNTL_1]|=R300_INPUT_CNTL_COLOR; for(i=0;i < ctx->Const.MaxTextureUnits;i++) - if(r300->state.render_inputs & (_TNL_BIT_TEX0<<i)) + if(RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_TEX(i) )) r300->hw.vic.cmd[R300_VIC_CNTL_1]|=(R300_INPUT_CNTL_TC0<<i); #endif @@ -573,15 +575,15 @@ void r300EmitArrays(GLcontext * ctx, GLboolean immd) if(OutputsWritten & (1<<(VERT_RESULT_TEX0+i))) r300->hw.vof.cmd[R300_VOF_CNTL_1] |= (4<<(3*i)); } else { - if(inputs & _TNL_BIT_POS) + if(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_POS )) r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; - if(inputs & _TNL_BIT_COLOR0) + if(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR0 )) r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT; - if(inputs & _TNL_BIT_COLOR1) + if(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_COLOR1 )) r300->hw.vof.cmd[R300_VOF_CNTL_0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT; for(i=0;i < ctx->Const.MaxTextureUnits;i++) - if(inputs & (_TNL_BIT_TEX0<<i)) + if(RENDERINPUTS_TEST( inputs_bitset, _TNL_ATTRIB_TEX(i) )) r300->hw.vof.cmd[R300_VOF_CNTL_1]|=(4<<(3*i)); } diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c index 56052d64d26..bb0cb78382b 100644 --- a/src/mesa/drivers/dri/r300/r300_state.c +++ b/src/mesa/drivers/dri/r300/r300_state.c @@ -1270,6 +1270,19 @@ void r300_setup_textures(GLcontext *ctx) fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu); } +union r300_outputs_written { + GLuint vp_outputs; /* hw_tcl_on */ + DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */ +}; + +static GLboolean r300_outputs_written_test (r300_outputs_written *ow, GLuint vp_result, + GLuint tnl_attrib) +{ + if (hw_tcl_on) + return ow->vp_outputs & (1 << vp_result); + return RENDERINPUTS_TEST( ow->index_bitset, tnl_attrib ); +} + void r300_setup_rs_unit(GLcontext *ctx) { r300ContextPtr r300 = R300_CONTEXT(ctx); @@ -1284,16 +1297,16 @@ void r300_setup_rs_unit(GLcontext *ctx) 0x00, 0x00 }; - GLuint OutputsWritten; + union r300_outputs_written OutputsWritten; GLuint InputsRead; int fp_reg, high_rr; int in_texcoords, col_interp_nr; int i; if(hw_tcl_on) - OutputsWritten = CURRENT_VERTEX_SHADER(ctx)->Base.OutputsWritten; + OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->Base.OutputsWritten; else - OutputsWritten = r300->state.render_inputs; + RENDERINPUTS_COPY( OutputsWritten.index_bitset, r300->state.render_inputs_bitset ); if (ctx->FragmentProgram._Current) InputsRead = ctx->FragmentProgram._Current->Base.InputsRead; @@ -1324,7 +1337,7 @@ void r300_setup_rs_unit(GLcontext *ctx) | (fp_reg << R300_RS_ROUTE_DEST_SHIFT); high_rr = fp_reg; - if (!(OutputsWritten & (hw_tcl_on ? (1 << (VERT_RESULT_TEX0+i)) : (_TNL_BIT_TEX0<<i)))) { + if (!r300_outputs_written_test( &OutputsWritten, VERT_RESULT_TEX0+i, _TNL_ATTRIB_TEX(i) )) { /* Passing invalid data here can lock the GPU. */ WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i); //_mesa_print_program(&CURRENT_VERTEX_SHADER(ctx)->Base); @@ -1334,12 +1347,12 @@ void r300_setup_rs_unit(GLcontext *ctx) fp_reg++; } /* Need to count all coords enabled at vof */ - if (OutputsWritten & (hw_tcl_on ? (1 << (VERT_RESULT_TEX0+i)) : (_TNL_BIT_TEX0<<i))) + if (r300_outputs_written_test( &OutputsWritten, VERT_RESULT_TEX0+i, _TNL_ATTRIB_TEX(i) )) in_texcoords++; } if (InputsRead & FRAG_BIT_COL0) { - if (!(OutputsWritten & (hw_tcl_on ? (1<<VERT_RESULT_COL0) : _TNL_BIT_COLOR0))) { + if (!r300_outputs_written_test( &OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0 )) { WARN_ONCE("fragprog wants col0, vp doesn't provide it\n"); goto out; /* FIXME */ //_mesa_print_program(&CURRENT_VERTEX_SHADER(ctx)->Base); @@ -1355,7 +1368,7 @@ void r300_setup_rs_unit(GLcontext *ctx) out: if (InputsRead & FRAG_BIT_COL1) { - if (!(OutputsWritten & (hw_tcl_on ? (1<<VERT_RESULT_COL1) : _TNL_BIT_COLOR1))) { + if (!r300_outputs_written_test( &OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1 )) { WARN_ONCE("fragprog wants col1, vp doesn't provide it\n"); //exit(-1); } @@ -1515,7 +1528,7 @@ static void r300GenerateSimpleVertexShader(r300ContextPtr r300) ) o_reg += 2; - if (r300->state.render_inputs & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_COLOR1 )) { WRITE_OP( EASY_VSF_OP(MUL, o_reg++, ALL, RESULT), VSF_REG(r300->state.vap_reg.i_color[1]), @@ -1526,7 +1539,7 @@ static void r300GenerateSimpleVertexShader(r300ContextPtr r300) /* Pass through texture coordinates, if any */ for(i=0;i < r300->radeon.glCtx->Const.MaxTextureUnits;i++) - if(r300->state.render_inputs & (_TNL_BIT_TEX0<<i)){ + if (RENDERINPUTS_TEST( r300->state.render_inputs_bitset, _TNL_ATTRIB_TEX(i) )){ // fprintf(stderr, "i_tex[%d]=%d\n", i, r300->state.vap_reg.i_tex[i]); WRITE_OP( EASY_VSF_OP(MUL, o_reg++ /* 2+i */, ALL, RESULT), diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h index 9abd8667308..9902e60c595 100644 --- a/src/mesa/drivers/dri/radeon/radeon_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_context.h @@ -735,7 +735,7 @@ struct radeon_context { GLuint TclFallback; GLuint Fallback; GLuint NewGLState; - GLuint tnl_index; /* index of bits for last tnl_install_attrs */ + DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */ /* Vertex buffers */ diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index 9924931e1a2..4d5bbbd1f18 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -92,10 +92,11 @@ static void radeonSetVertexFormat( GLcontext *ctx ) radeonContextPtr rmesa = RADEON_CONTEXT( ctx ); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); int fmt_0 = 0; int offset = 0; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); /* Important: */ @@ -113,7 +114,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) * build up a hardware vertex. */ if ( !rmesa->swtcl.needproj || - (index & _TNL_BITS_TEX_ANY)) { /* for projtex */ + RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { /* for projtex */ EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F, RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z | RADEON_CP_VC_FRMT_W0 ); offset = 4; @@ -135,10 +136,11 @@ static void radeonSetVertexFormat( GLcontext *ctx ) offset += 1; rmesa->swtcl.specoffset = 0; - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { #if MESA_LITTLE_ENDIAN - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->swtcl.specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB, RADEON_CP_VC_FRMT_PKSPEC ); @@ -147,7 +149,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) EMIT_PAD( 3 ); } - if (index & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, RADEON_CP_VC_FRMT_PKSPEC ); } @@ -155,7 +157,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) EMIT_PAD( 1 ); } #else - if (index & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, RADEON_CP_VC_FRMT_PKSPEC ); } @@ -163,7 +165,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) EMIT_PAD( 1 ); } - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { rmesa->swtcl.specoffset = offset; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, RADEON_CP_VC_FRMT_PKSPEC ); @@ -174,11 +176,11 @@ static void radeonSetVertexFormat( GLcontext *ctx ) #endif } - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { int i; for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { - if (index & _TNL_BIT_TEX(i)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { GLuint sz = VB->TexCoordPtr[i]->size; switch (sz) { @@ -204,7 +206,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) } } - if ( rmesa->tnl_index != index || + if (!RENDERINPUTS_EQUAL( rmesa->tnl_index_bitset, index_bitset ) || fmt_0 != rmesa->swtcl.vertex_format) { RADEON_NEWPRIM(rmesa); rmesa->swtcl.vertex_format = fmt_0; @@ -214,7 +216,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) rmesa->swtcl.vertex_attr_count, NULL, 0 ); rmesa->swtcl.vertex_size /= 4; - rmesa->tnl_index = index; + RENDERINPUTS_COPY( rmesa->tnl_index_bitset, index_bitset ); if (RADEON_DEBUG & DEBUG_VERTS) fprintf( stderr, "%s: vertex_size= %d floats\n", __FUNCTION__, rmesa->swtcl.vertex_size); @@ -257,8 +259,9 @@ void radeonChooseVertexState( GLcontext *ctx ) * bigger one. */ - if ( ((tnl->render_inputs & (_TNL_BITS_TEX_ANY|_TNL_BIT_COLOR1) ) == 0) - || (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { + if ((!RENDERINPUTS_TEST_RANGE( tnl->render_inputs_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) && + !RENDERINPUTS_TEST( tnl->render_inputs_bitset, _TNL_ATTRIB_COLOR1 )) + || (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) { rmesa->swtcl.needproj = GL_TRUE; se_coord_fmt = (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | RADEON_VTX_Z_PRE_MULT_1_OVER_W0 | @@ -938,7 +941,7 @@ void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode ) */ _tnl_invalidate_vertex_state( ctx, ~0 ); _tnl_invalidate_vertices( ctx, ~0 ); - rmesa->tnl_index = 0; + RENDERINPUTS_ZERO( rmesa->tnl_index_bitset ); radeonChooseVertexState( ctx ); radeonChooseRenderState( ctx ); } diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c index 18470401372..3dd821a4d39 100644 --- a/src/mesa/drivers/dri/savage/savagetris.c +++ b/src/mesa/drivers/dri/savage/savagetris.c @@ -867,15 +867,17 @@ static GLboolean savageCheckPTexHack( GLcontext *ctx ) { TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); - if (index & _TNL_BIT_TEX(0) && VB->TexCoordPtr[0]->size == 4) { - if ((index & _TNL_BITS_TEX_ANY) == _TNL_BIT_TEX(0)) + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { + if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX )) return GL_TRUE; /* apply ptex hack */ else FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE); } - if ((index & _TNL_BIT_TEX(1)) && VB->TexCoordPtr[1]->size == 4) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE); return GL_FALSE; /* don't apply ptex hack */ @@ -929,10 +931,11 @@ static __inline__ GLuint savageChooseVertexFormat_s3d( GLcontext *ctx ) savageContextPtr imesa = SAVAGE_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint setupIndex = SAVAGE_EMIT_XYZ; GLubyte skip; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); imesa->vertex_attr_count = 0; skip = SAVAGE_SKIP_ALL_S3D; @@ -941,7 +944,7 @@ static __inline__ GLuint savageChooseVertexFormat_s3d( GLcontext *ctx ) /* EMIT_ATTR's must be in order as they tell t_vertex.c how to * build up a hardware vertex. */ - if ((index & _TNL_BITS_TEX_ANY) || !(ctx->_TriangleCaps & DD_FLATSHADE)) + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) || !(ctx->_TriangleCaps & DD_FLATSHADE)) EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, SAVAGE_EMIT_W, SAVAGE_SKIP_W ); else { EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F_VIEWPORT, 0, 0 ); @@ -952,17 +955,17 @@ static __inline__ GLuint savageChooseVertexFormat_s3d( GLcontext *ctx ) /* t_context.c always includes a diffuse color */ EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA, SAVAGE_EMIT_C0, SAVAGE_SKIP_C0 ); - if ((index & _TNL_BIT_COLOR1)) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, SAVAGE_EMIT_C1, SAVAGE_SKIP_C1 ); else EMIT_PAD( 3 ); - if ((index & _TNL_BIT_FOG)) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, SAVAGE_EMIT_FOG, SAVAGE_SKIP_C1 ); else EMIT_PAD( 1 ); skip &= ~SAVAGE_SKIP_C1; - if (index & _TNL_BIT_TEX(0)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (imesa->ptexHack) EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); else if (VB->TexCoordPtr[0]->size == 4) @@ -991,28 +994,27 @@ static __inline__ GLuint savageChooseVertexFormat_s4( GLcontext *ctx ) savageContextPtr imesa = SAVAGE_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint setupIndex = SAVAGE_EMIT_XYZ; GLubyte skip; GLuint size, mask; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); skip = SAVAGE_SKIP_ALL_S4; skip &= ~SAVAGE_SKIP_Z; /* all mesa vertices have a z coordinate */ - if ((index & _TNL_BITS_TEX_ANY) || !(ctx->_TriangleCaps & DD_FLATSHADE)) + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) || !(ctx->_TriangleCaps & DD_FLATSHADE)) NEED_ATTR( SAVAGE_EMIT_W, SAVAGE_SKIP_W ); /* t_context.c always includes a diffuse color */ NEED_ATTR( SAVAGE_EMIT_C0, SAVAGE_SKIP_C0 ); - - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { - if ((index & _TNL_BIT_COLOR1)) - NEED_ATTR( SAVAGE_EMIT_C1, SAVAGE_SKIP_C1 ); - if ((index & _TNL_BIT_FOG)) - NEED_ATTR( SAVAGE_EMIT_FOG, SAVAGE_SKIP_C1 ); - } - if (index & _TNL_BIT_TEX(0)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) + NEED_ATTR( SAVAGE_EMIT_C1, SAVAGE_SKIP_C1 ); + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) + NEED_ATTR( SAVAGE_EMIT_FOG, SAVAGE_SKIP_C1 ); + + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (imesa->ptexHack) NEED_ATTR( SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); else if (VB->TexCoordPtr[0]->size == 4) @@ -1024,7 +1026,7 @@ static __inline__ GLuint savageChooseVertexFormat_s4( GLcontext *ctx ) else NEED_ATTR( SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 ); } - if (index & _TNL_BIT_TEX(1)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { if (VB->TexCoordPtr[1]->size == 4) /* projective textures are not supported by the hardware */ assert (0); /* should be caught by savageCheckPTexHack */ diff --git a/src/mesa/drivers/dri/sis/sis_context.h b/src/mesa/drivers/dri/sis/sis_context.h index ead4a26678e..c349bf96ed2 100644 --- a/src/mesa/drivers/dri/sis/sis_context.h +++ b/src/mesa/drivers/dri/sis/sis_context.h @@ -332,7 +332,7 @@ struct sis_context GLint drawableID; GLint GlobalFlag; - GLuint last_tcl_state; + DECLARE_RENDERINPUTS(last_tcl_state_bitset); /* Stereo */ GLboolean useStereo; diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c index 24f6cb9aa87..a0e39dcd3c9 100644 --- a/src/mesa/drivers/dri/sis/sis_tris.c +++ b/src/mesa/drivers/dri/sis/sis_tris.c @@ -842,10 +842,12 @@ static void sisRenderStart( GLcontext *ctx ) TNLcontext *tnl = TNL_CONTEXT(ctx); sisContextPtr smesa = SIS_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint AGPParseSet = smesa->AGPParseSet; GLboolean tex_fallback = GL_FALSE; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + if (ctx->DrawBuffer->_ColorDrawBufferMask[0] == BUFFER_BIT_FRONT_LEFT && smesa->driDrawable->numClipRects != 0) { @@ -869,7 +871,7 @@ static void sisRenderStart( GLcontext *ctx ) AGPParseSet &= ~(MASK_VertexDWSize | MASK_VertexDataFormat); AGPParseSet |= SiS_PS_HAS_XYZ | SiS_PS_HAS_DIFFUSE; - if (index & _TNL_BITS_TEX_ANY) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) { EMIT_ATTR(_TNL_ATTRIB_POS, EMIT_4F_VIEWPORT); AGPParseSet |= SiS_PS_HAS_W; smesa->coloroffset = 4; @@ -881,17 +883,18 @@ static void sisRenderStart( GLcontext *ctx ) EMIT_ATTR(_TNL_ATTRIB_COLOR0, EMIT_4UB_4F_BGRA); smesa->specoffset = 0; - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { AGPParseSet |= SiS_PS_HAS_SPECULAR; - if (index & _TNL_BIT_COLOR1) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { EMIT_ATTR(_TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR); smesa->specoffset = smesa->coloroffset + 1; } else { EMIT_PAD(3); } - if (index & _TNL_BIT_FOG) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR(_TNL_ATTRIB_FOG, EMIT_1UB_1F); } else { EMIT_PAD(1); @@ -899,14 +902,14 @@ static void sisRenderStart( GLcontext *ctx ) } /* projective textures are not supported by the hardware */ - if (index & _TNL_BIT_TEX(0)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (VB->TexCoordPtr[0]->size > 2) tex_fallback = GL_TRUE; EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F); AGPParseSet |= SiS_PS_HAS_UV0; } /* Will only hit tex1 on SiS300 */ - if (index & _TNL_BIT_TEX(1)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { if (VB->TexCoordPtr[1]->size > 2) tex_fallback = GL_TRUE; EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F); @@ -914,7 +917,7 @@ static void sisRenderStart( GLcontext *ctx ) } FALLBACK(smesa, SIS_FALLBACK_TEXTURE, tex_fallback); - if (smesa->last_tcl_state != index) { + if (!RENDERINPUTS_EQUAL( smesa->last_tcl_state_bitset, index_bitset )) { smesa->AGPParseSet = AGPParseSet; smesa->vertex_size = _tnl_install_attrs( ctx, smesa->vertex_attrs, diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c index 9cb88ae2399..4cc7942b1b6 100644 --- a/src/mesa/drivers/dri/unichrome/via_tris.c +++ b/src/mesa/drivers/dri/unichrome/via_tris.c @@ -744,16 +744,18 @@ static void viaChooseVertexState( GLcontext *ctx ) { struct via_context *vmesa = VIA_CONTEXT(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLuint regCmdB = HC_HVPMSK_X | HC_HVPMSK_Y | HC_HVPMSK_Z; GLuint setupIndex = 0; + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); vmesa->vertex_attr_count = 0; /* EMIT_ATTR's must be in order as they tell t_vertex.c how to * build up a hardware vertex. */ - if (index & (_TNL_BITS_TEX_ANY|_TNL_BIT_FOG)) { + if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F_VIEWPORT, VIA_EMIT_W, HC_HVPMSK_W ); vmesa->coloroffset = 4; } @@ -767,8 +769,9 @@ static void viaChooseVertexState( GLcontext *ctx ) HC_HVPMSK_Cd ); vmesa->specoffset = 0; - if (index & (_TNL_BIT_COLOR1|_TNL_BIT_FOG)) { - if ((index & _TNL_BIT_COLOR1)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) || + RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) { vmesa->specoffset = vmesa->coloroffset + 1; EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR, VIA_EMIT_SPEC, HC_HVPMSK_Cs ); @@ -776,13 +779,13 @@ static void viaChooseVertexState( GLcontext *ctx ) else EMIT_PAD( 3 ); - if ((index & _TNL_BIT_FOG)) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F, VIA_EMIT_FOG, HC_HVPMSK_Cs ); else EMIT_PAD( 1 ); } - if (index & _TNL_BIT_TEX(0)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (vmesa->ptexHack) EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, VIA_EMIT_PTEX0, (HC_HVPMSK_S | HC_HVPMSK_T) ); @@ -791,7 +794,7 @@ static void viaChooseVertexState( GLcontext *ctx ) (HC_HVPMSK_S | HC_HVPMSK_T) ); } - if (index & _TNL_BIT_TEX(1)) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, VIA_EMIT_TEX1, (HC_HVPMSK_S | HC_HVPMSK_T) ); } @@ -824,17 +827,19 @@ static GLboolean viaCheckPTexHack( GLcontext *ctx ) { TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLuint index = tnl->render_inputs; + DECLARE_RENDERINPUTS(index_bitset); GLboolean fallback = GL_FALSE; GLboolean ptexHack = GL_FALSE; - if (index & _TNL_BIT_TEX(0) && VB->TexCoordPtr[0]->size == 4) { - if ((index & _TNL_BITS_TEX_ANY) == _TNL_BIT_TEX(0)) + RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); + + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { + if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX )) ptexHack = GL_TRUE; else fallback = GL_TRUE; } - if ((index & _TNL_BIT_TEX(1)) && VB->TexCoordPtr[1]->size == 4) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) fallback = GL_TRUE; FALLBACK(VIA_CONTEXT(ctx), VIA_FALLBACK_PROJ_TEXTURE, fallback); |