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-rw-r--r--src/mesa/drivers/dri/unichrome/server/via_dri.c471
-rw-r--r--src/mesa/drivers/dri/unichrome/server/via_driver.h400
-rw-r--r--src/mesa/drivers/dri/unichrome/server/via_regs.h14
3 files changed, 448 insertions, 437 deletions
diff --git a/src/mesa/drivers/dri/unichrome/server/via_dri.c b/src/mesa/drivers/dri/unichrome/server/via_dri.c
index db661b4056b..d82d7acc733 100644
--- a/src/mesa/drivers/dri/unichrome/server/via_dri.c
+++ b/src/mesa/drivers/dri/unichrome/server/via_dri.c
@@ -44,6 +44,7 @@
#include "driver.h"
#include "drm.h"
+#include "imports.h"
#endif
#include "dri_util.h"
@@ -66,15 +67,11 @@ static int VIADRIScreenInit(DRIDriverContext * ctx);
static void VIADRICloseScreen(DRIDriverContext * ctx);
static int VIADRIFinishScreenInit(DRIDriverContext * ctx);
-/* TODO XXX _SOLO temp macros */
-typedef unsigned char CARD8;
-typedef unsigned short CARD16;
+/* _SOLO : missing macros normally defined by X code */
#define xf86DrvMsg(a, b, ...) fprintf(stderr, __VA_ARGS__)
#define MMIO_IN8(base, addr) ((*(((volatile CARD8*)base)+(addr)))+0)
#define MMIO_OUT8(base, addr, val) ((*(((volatile CARD8*)base)+(addr)))=((CARD8)val))
#define MMIO_OUT16(base, addr, val) ((*(volatile CARD16*)(((CARD8*)base)+(addr)))=((CARD16)val))
-#define VGA_MISC_OUT_R 0x3cc
-#define VGA_MISC_OUT_W 0x3c2
#define VIDEO 0
#define AGP 1
@@ -149,25 +146,18 @@ static int VIADRIAgpInit(const DRIDriverContext *ctx, VIAPtr pVia)
#if 0
xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] agpBase = %p\n", pVia->agpBase);
+ "[drm] agpBase = 0x%08lx\n", pVia->agpBase);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agpAddr = 0x%08lx\n", pVia->agpAddr);
#endif
xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] agpSize = 0x%08x\n", pVia->agpSize);
+ "[drm] agpSize = 0x%08lx\n", pVia->agpSize);
xf86DrvMsg(pScreen->myNum, X_INFO,
"[drm] agp physical addr = 0x%08lx\n", agp_phys);
- {
- drm_via_agp_t agp;
- agp.offset = 0;
- agp.size = AGP_SIZE;
- if (drmCommandWrite(pVia->drmFD, DRM_VIA_AGP_INIT, &agp,
- sizeof(drm_via_agp_t)) < 0)
- return FALSE;
- }
-
+ drmVIAAgpInit(pVia->drmFD, 0, AGP_SIZE);
return TRUE;
+
}
static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia)
@@ -177,24 +167,14 @@ static int VIADRIFBInit(DRIDriverContext * ctx, VIAPtr pVia)
VIADRIPtr pVIADRI = pVia->devPrivate;
pVIADRI->fbOffset = FBOffset;
pVIADRI->fbSize = pVia->videoRambytes;
-
- {
- drm_via_fb_t fb;
- fb.offset = FBOffset;
- fb.size = FBSize;
-
- if (drmCommandWrite(pVia->drmFD, DRM_VIA_FB_INIT, &fb,
- sizeof(drm_via_fb_t)) < 0) {
- xf86DrvMsg(pScreen->myNum, X_ERROR,
- "[drm] failed to init frame buffer area\n");
- return FALSE;
- } else {
- xf86DrvMsg(pScreen->myNum, X_INFO,
- "[drm] FBFreeStart= 0x%08x FBFreeEnd= 0x%08x "
- "FBSize= 0x%08x\n",
- pVia->FBFreeStart, pVia->FBFreeEnd, FBSize);
- return TRUE;
- }
+
+ if (drmVIAFBInit(pVia->drmFD, FBOffset, FBSize) < 0) {
+ xf86DrvMsg(pScreen->myNum, X_ERROR,"[drm] failed to init frame buffer area\n");
+ return FALSE;
+ }
+ else {
+ xf86DrvMsg(pScreen->myNum, X_INFO,"[drm] FBFreeStart= 0x%08lx FBFreeEnd= 0x%08lx FBSize= 0x%08lx\n", pVia->FBFreeStart, pVia->FBFreeEnd, FBSize);
+ return TRUE;
}
}
@@ -275,7 +255,7 @@ static int VIADRIScreenInit(DRIDriverContext * ctx)
fprintf(stderr, "[drm] framebuffer handle = 0x%08lx\n",
ctx->shared.hFrameBuffer);
- pVIADRI = (VIADRIPtr) calloc(1, sizeof(VIADRIRec));
+ pVIADRI = (VIADRIPtr) CALLOC(sizeof(VIADRIRec));
if (!pVIADRI) {
drmClose(ctx->drmFD);
return FALSE;
@@ -309,8 +289,12 @@ static int VIADRIScreenInit(DRIDriverContext * ctx)
pVIADRI->regs.size = VIA_MMIO_REGSIZE;
pVIADRI->regs.map = 0;
pVIADRI->regs.handle = pVia->registerHandle;
- xf86DrvMsg(ctx->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n",
+ xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] mmio Registers = 0x%08lx\n",
pVIADRI->regs.handle);
+
+ /*pVIADRI->drixinerama = pVia->drixinerama;*/
+ /*=* John Sheng [2003.12.9] Tuxracer & VQ *=*/
+ pVIADRI->VQEnable = pVia->VQEnable;
if (drmMap(pVia->drmFD,
pVIADRI->regs.handle,
@@ -394,9 +378,8 @@ VIADRIFinishScreenInit(DRIDriverContext * ctx)
/* Initialize the kernel data structures. */
static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia)
{
- drm_via_init_t drmInfo;
- memset(&drmInfo, 0, sizeof(drm_via_init_t));
- drmInfo.func = VIA_INIT_MAP;
+ drmVIAInit drmInfo;
+ memset(&drmInfo, 0, sizeof(drmVIAInit));
drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec);
drmInfo.fb_offset = pVia->FrameBufferBase;
drmInfo.mmio_offset = pVia->registerHandle;
@@ -405,9 +388,7 @@ static int VIADRIKernelInit(DRIDriverContext * ctx, VIAPtr pVia)
else
drmInfo.agpAddr = (CARD32)pVia->agpAddr;
- if ((drmCommandWrite(pVia->drmFD, DRM_VIA_MAP_INIT,&drmInfo,
- sizeof(drm_via_init_t))) < 0)
- return FALSE;
+ if (drmVIAInitMAP(pVia->drmFD, &drmInfo) < 0) return FALSE;
return TRUE;
}
@@ -429,7 +410,7 @@ static int VIADRIMapInit(DRIDriverContext * ctx, VIAPtr pVia)
const __GLcontextModes __glModes[] =
{
- /* 32 bit, RGBA Depth=24 Stencil=8 */
+ /* 32 bit, RGBA Depth=16 Stencil=8 */
{.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
.haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_TRUE,
.redBits = 8, .greenBits = 8, .blueBits = 8, .alphaBits = 8,
@@ -437,8 +418,9 @@ const __GLcontextModes __glModes[] =
.rgbBits = 32, .indexBits = 0,
.accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
.depthBits = 16, .stencilBits = 8,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, },
+ .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_TRUE, },
+#if 0
/* 16 bit, RGB Depth=16 */
{.rgbMode = GL_TRUE, .colorIndexMode = GL_FALSE, .doubleBufferMode = GL_TRUE, .stereoMode = GL_FALSE,
.haveAccumBuffer = GL_FALSE, .haveDepthBuffer = GL_TRUE, .haveStencilBuffer = GL_FALSE,
@@ -447,7 +429,8 @@ const __GLcontextModes __glModes[] =
.rgbBits = 16, .indexBits = 0,
.accumRedBits = 0, .accumGreenBits = 0, .accumBlueBits = 0, .accumAlphaBits = 0,
.depthBits = 16, .stencilBits = 0,
- .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_FALSE, },
+ .numAuxBuffers= 0, .level = 0, .pixmapMode = GL_TRUE, },
+#endif
};
static int viaInitContextModes(const DRIDriverContext *ctx,
@@ -493,8 +476,8 @@ static void VIAEnableMMIO(DRIDriverContext * ctx)
val = VGAIN8(0x3c3);
VGAOUT8(0x3c3, val | 0x01);
- val = VGAIN8(VGA_MISC_OUT_R);
- VGAOUT8(VGA_MISC_OUT_W, val | 0x01);
+ val = VGAIN8(0x3cc);
+ VGAOUT8(0x3c2, val | 0x01);
/* Unlock Extended IO Space */
VGAOUT8(0x3c4, 0x10);
@@ -518,6 +501,10 @@ static void VIAEnableMMIO(DRIDriverContext * ctx)
VGAOUT8(0x3c5, val | 0x38);
}
+ /* Unlock CRTC registers */
+ VGAOUT8(0x3d4, 0x47);
+ VGAOUT8(0x3d5, 0x00);
+
return;
}
@@ -536,57 +523,293 @@ static void VIADisableMMIO(DRIDriverContext * ctx)
static void VIADisableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- CARD32 dwTemp;
-
- dwTemp = (CARD32)VIAGETREG(0x298);
- dwTemp |= 0x20000000;
- VIASETREG(0x298, dwTemp);
-
- dwTemp = (CARD32)VIAGETREG(0x230);
- dwTemp &= ~0x00200000;
- VIASETREG(0x230, dwTemp);
-
- dwTemp = (CARD32)VIAGETREG(0x298);
- dwTemp &= ~0x20000000;
- VIASETREG(0x298, dwTemp);
+ CARD32 dwGE230, dwGE298;
+
+ /* Cause of exit XWindow will dump back register value, others chipset no
+ * need to set extended fifo value */
+ if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15 &&
+ (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary)) {
+ /* Turn off Extend FIFO */
+ /* 0x298[29] */
+ dwGE298 = VIAGETREG(0x298);
+ VIASETREG(0x298, dwGE298 | 0x20000000);
+ /* 0x230[21] */
+ dwGE230 = VIAGETREG(0x230);
+ VIASETREG(0x230, dwGE230 & ~0x00200000);
+ /* 0x298[29] */
+ dwGE298 = VIAGETREG(0x298);
+ VIASETREG(0x298, dwGE298 & ~0x20000000);
+ }
}
static void VIAEnableExtendedFIFO(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
- CARD32 dwTemp;
- CARD8 bTemp;
-
- dwTemp = (CARD32)VIAGETREG(0x298);
- dwTemp |= 0x20000000;
- VIASETREG(0x298, dwTemp);
-
- dwTemp = (CARD32)VIAGETREG(0x230);
- dwTemp |= 0x00200000;
- VIASETREG(0x230, dwTemp);
-
- dwTemp = (CARD32)VIAGETREG(0x298);
- dwTemp &= ~0x20000000;
- VIASETREG(0x298, dwTemp);
-
- VGAOUT8(0x3C4, 0x17);
- bTemp = VGAIN8(0x3C5);
- bTemp &= ~0x7F;
- bTemp |= 0x2F;
- VGAOUT8(0x3C5, bTemp);
-
- VGAOUT8(0x3C4, 0x16);
- bTemp = VGAIN8(0x3C5);
- bTemp &= ~0x3F;
- bTemp |= 0x17;
- VGAOUT8(0x3C5, bTemp);
-
- VGAOUT8(0x3C4, 0x18);
- bTemp = VGAIN8(0x3C5);
- bTemp &= ~0x3F;
- bTemp |= 0x17;
- bTemp |= 0x40; /* force the preq always higher than treq */
- VGAOUT8(0x3C5, bTemp);
+ CARD8 bRegTemp;
+ CARD32 dwGE230, dwGE298;
+
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ if (pVia->ChipRev > 14) { /* For 3123Cx */
+ if (pVia->HasSecondary) { /* SAMM or DuoView case */
+ if (ctx->shared.virtualWidth >= 1024)
+ {
+ /* 3c5.16[0:5] */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x1C;
+ VGAOUT8(0x3C5, bRegTemp);
+ /* 3c5.17[0:6] */
+ VGAOUT8(0x3C4, 0x17);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x7F;
+ bRegTemp |= 0x3F;
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ }
+ else /* Single view or Simultaneoue case */
+ {
+ if (ctx->shared.virtualWidth > 1024)
+ {
+ /* 3c5.16[0:5] */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ VGAOUT8(0x3C5, bRegTemp);
+ /* 3c5.17[0:6] */
+ VGAOUT8(0x3C4, 0x17);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x7F;
+ bRegTemp |= 0x2F;
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ }
+ /* 3c5.18[0:5] */
+ VGAOUT8(0x3C4, 0x18);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ bRegTemp |= 0x40; /* force the preq always higher than treq */
+ VGAOUT8(0x3C5, bRegTemp);
+ }
+ else { /* for 3123Ax */
+ if (ctx->shared.virtualWidth > 1024 || pVia->HasSecondary) {
+ /* Turn on Extend FIFO */
+ /* 0x298[29] */
+ dwGE298 = VIAGETREG(0x298);
+ VIASETREG(0x298, dwGE298 | 0x20000000);
+ /* 0x230[21] */
+ dwGE230 = VIAGETREG(0x230);
+ VIASETREG(0x230, dwGE230 | 0x00200000);
+ /* 0x298[29] */
+ dwGE298 = VIAGETREG(0x298);
+ VIASETREG(0x298, dwGE298 & ~0x20000000);
+
+ /* 3c5.16[0:5] */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ /* bRegTemp |= 0x10; */
+ VGAOUT8(0x3C5, bRegTemp);
+ /* 3c5.17[0:6] */
+ VGAOUT8(0x3C4, 0x17);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x7F;
+ bRegTemp |= 0x2F;
+ /*bRegTemp |= 0x1F;*/
+ VGAOUT8(0x3C5, bRegTemp);
+ /* 3c5.18[0:5] */
+ VGAOUT8(0x3C4, 0x18);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ bRegTemp |= 0x40; /* force the preq always higher than treq */
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ }
+ break;
+ case VIA_KM400:
+ if (pVia->HasSecondary) { /* SAMM or DuoView case */
+ if ((ctx->shared.virtualWidth >= 1600) &&
+ (pVia->MemClk <= VIA_MEM_DDR200)) {
+ /* enable CRT extendded FIFO */
+ VGAOUT8(0x3C4, 0x17);
+ VGAOUT8(0x3C5, 0x1C);
+ /* revise second display queue depth and read threshold */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp = (bRegTemp) | (0x09);
+ VGAOUT8(0x3C5, bRegTemp);
+ }
+ else {
+ /* enable CRT extendded FIFO */
+ VGAOUT8(0x3C4, 0x17);
+ VGAOUT8(0x3C5,0x3F);
+ /* revise second display queue depth and read threshold */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp = (bRegTemp) | (0x1C);
+ VGAOUT8(0x3C5, bRegTemp);
+ }
+ /* 3c5.18[0:5] */
+ VGAOUT8(0x3C4, 0x18);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ bRegTemp |= 0x40; /* force the preq always higher than treq */
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ else {
+ if ( (ctx->shared.virtualWidth > 1024) && (ctx->shared.virtualWidth <= 1280) )
+ {
+ /* enable CRT extendded FIFO */
+ VGAOUT8(0x3C4, 0x17);
+ VGAOUT8(0x3C5, 0x3F);
+ /* revise second display queue depth and read threshold */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp = (bRegTemp) | (0x17);
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ else if ((ctx->shared.virtualWidth > 1280))
+ {
+ /* enable CRT extendded FIFO */
+ VGAOUT8(0x3C4, 0x17);
+ VGAOUT8(0x3C5, 0x3F);
+ /* revise second display queue depth and read threshold */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp = (bRegTemp) | (0x1C);
+ VGAOUT8(0x3C5, bRegTemp);
+ pVia->EnableExtendedFIFO = TRUE;
+ }
+ else
+ {
+ /* enable CRT extendded FIFO */
+ VGAOUT8(0x3C4, 0x17);
+ VGAOUT8(0x3C5, 0x3F);
+ /* revise second display queue depth and read threshold */
+ VGAOUT8(0x3C4, 0x16);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp = (bRegTemp) | (0x10);
+ VGAOUT8(0x3C5, bRegTemp);
+ }
+ /* 3c5.18[0:5] */
+ VGAOUT8(0x3C4, 0x18);
+ bRegTemp = VGAIN8(0x3C5);
+ bRegTemp &= ~0x3F;
+ bRegTemp |= 0x17;
+ bRegTemp |= 0x40; /* force the preq always higher than treq */
+ VGAOUT8(0x3C5, bRegTemp);
+ }
+ break;
+ case VIA_K8M800:
+ /*=* R1 Display FIFO depth (384 /8 -1 -> 0xbf) SR17[7:0] (8bits) *=*/
+ VGAOUT8(0x3c4, 0x17);
+ VGAOUT8(0x3c5, 0xbf);
+
+ /*=* R2 Display fetch datum threshold value (328/4 -> 0x52)
+ SR16[5:0], SR16[7] (7bits) *=*/
+ VGAOUT8(0x3c4, 0x16);
+ bRegTemp = VGAIN8(0x3c5) & ~0xBF;
+ bRegTemp |= (0x52 & 0x3F);
+ bRegTemp |= ((0x52 & 0x40) << 1);
+ VGAOUT8(0x3c5, bRegTemp);
+
+ /*=* R3 Switch to the highest agent threshold value (74 -> 0x4a)
+ SR18[5:0], SR18[7] (7bits) *=*/
+ VGAOUT8(0x3c4, 0x18);
+ bRegTemp = VGAIN8(0x3c5) & ~0xBF;
+ bRegTemp |= (0x4a & 0x3F);
+ bRegTemp |= ((0x4a & 0x40) << 1);
+ VGAOUT8(0x3c5, bRegTemp);
+#if 0
+ /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
+ SR1C[7:0], SR1D[1:0] (10bits) *=*/
+ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
+ VGAOUT8(0x3c4, 0x1c);
+ VGAOUT8(0x3c5, (CARD8)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c4, 0x1d);
+ bRegTemp = VGAIN8(0x3c5) & ~0x03;
+ VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
+#endif
+ if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
+ {
+ /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
+ VGAOUT8(0x3c4, 0x22);
+ bRegTemp = VGAIN8(0x3c5) & ~0x1F;
+ VGAOUT8(0x3c5, bRegTemp | 0x10);
+ }
+ else
+ {
+ /*=* Max. length for a request SR22[4:0]
+ (128/4 -> over flow 0x0) *=*/
+ VGAOUT8(0x3c4, 0x22);
+ bRegTemp = VGAIN8(0x3c5) & ~0x1F;
+ VGAOUT8(0x3c5, bRegTemp);
+ }
+ break;
+ case VIA_PM800:
+ /*=* R1 Display FIFO depth (96-1 -> 0x5f) SR17[7:0] (8bits) *=*/
+ VGAOUT8(0x3c4, 0x17);
+ VGAOUT8(0x3c5, 0x5f);
+
+ /*=* R2 Display fetch datum threshold value (32 -> 0x20)
+ SR16[5:0], SR16[7] (7bits) *=*/
+ VGAOUT8(0x3c4, 0x16);
+ bRegTemp = VGAIN8(0x3c5) & ~0xBF;
+ bRegTemp |= (0x20 & 0x3F);
+ bRegTemp |= ((0x20 & 0x40) << 1);
+ VGAOUT8(0x3c5, bRegTemp);
+
+ /*=* R3 Switch to the highest agent threshold value (16 -> 0x10)
+ SR18[5:0], SR18[7] (7bits) *=*/
+ VGAOUT8(0x3c4, 0x18);
+ bRegTemp = VGAIN8(0x3c5) & ~0xBF;
+ bRegTemp |= (0x10 & 0x3F);
+ bRegTemp |= ((0x10 & 0x40) << 1);
+ VGAOUT8(0x3c5, bRegTemp);
+#if 0
+ /*=* R4 Fetch Number for a scan line (unit: 8 bytes)
+ SR1C[7:0], SR1D[1:0] (10bits) *=*/
+ wRegTemp = (pBIOSInfo->offsetWidthByQWord >> 1) + 4;
+ VGAOUT8(0x3c4, 0x1c);
+ VGAOUT8(0x3c5, (CARD8)(wRegTemp & 0xFF));
+ VGAOUT8(0x3c4, 0x1d);
+ bRegTemp = VGAIN8(0x3c5) & ~0x03;
+ VGAOUT8(0x3c5, bRegTemp | ((wRegTemp & 0x300) >> 8));
+#endif
+ if (ctx->shared.virtualWidth >= 1400 && ctx->bpp == 32)
+ {
+ /*=* Max. length for a request SR22[4:0] (64/4 -> 0x10) *=*/
+ VGAOUT8(0x3c4, 0x22);
+ bRegTemp = VGAIN8(0x3c5) & ~0x1F;
+ VGAOUT8(0x3c5, bRegTemp | 0x10);
+ }
+ else
+ {
+ /*=* Max. length for a request SR22[4:0] (0x1F) *=*/
+ VGAOUT8(0x3c4, 0x22);
+ bRegTemp = VGAIN8(0x3c5) & ~0x1F;
+ VGAOUT8(0x3c5, bRegTemp | 0x1F);
+ }
+ break;
+ default:
+ break;
+ }
}
static void VIAInitialize2DEngine(DRIDriverContext *ctx)
@@ -614,6 +837,8 @@ static void VIAInitialize2DEngine(DRIDriverContext *ctx)
VIASETREG(0x3c, 0x0);
VIASETREG(0x40, 0x0);
+ VIADisableMMIO(ctx);
+
/* Init AGP and VQ regs */
VIASETREG(0x43c, 0x00100000);
VIASETREG(0x440, 0x00000000);
@@ -706,6 +931,8 @@ static void VIAInitialize2DEngine(DRIDriverContext *ctx)
break;
}
#endif
+
+ VIAEnableMMIO(ctx);
/* Set BPP and Pitch */
VIASETREG(VIA_REG_GEMODE, dwGEMode);
@@ -718,12 +945,14 @@ static void VIAInitialize2DEngine(DRIDriverContext *ctx)
(((ctx->shared.virtualWidth * ctx->bpp >> 3) >> 3) << 16));
}
+static int b3DRegsInitialized = 0;
+
static void VIAInitialize3DEngine(DRIDriverContext *ctx)
{
VIAPtr pVia = VIAPTR(ctx);
int i;
- if (!pVia->sharedData->b3DRegsInitialized)
+ if (!b3DRegsInitialized)
{
VIASETREG(0x43C, 0x00010000);
@@ -788,7 +1017,7 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx)
VIASETREG(0x440,0x52000000);
VIASETREG(0x440,0x53000000);
- pVia->sharedData->b3DRegsInitialized = 1;
+ b3DRegsInitialized = 1;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"3D Engine has been initialized.\n");
}
@@ -806,13 +1035,51 @@ static void VIAInitialize3DEngine(DRIDriverContext *ctx)
VIASETREG(0x440,0x20000000);
}
+static int
+WaitIdleCLE266(VIAPtr pVia)
+{
+ int loop = 0;
+
+ /*mem_barrier();*/
+
+ while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && (loop++ < MAXLOOP))
+ ;
+
+ while ((VIAGETREG(VIA_REG_STATUS) &
+ (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY)) &&
+ (loop++ < MAXLOOP))
+ ;
+
+ return loop >= MAXLOOP;
+}
+
static int viaInitFBDev(DRIDriverContext *ctx)
{
- VIAPtr pVia = calloc(1, sizeof(*pVia));
+ VIAPtr pVia = CALLOC(sizeof(*pVia));
ctx->driverPrivate = (void *)pVia;
- pVia->Chipset = ctx->chipset;
+ switch (ctx->chipset) {
+ case PCI_CHIP_CLE3122:
+ case PCI_CHIP_CLE3022:
+ pVia->Chipset = VIA_CLE266;
+ break;
+ case PCI_CHIP_VT7205:
+ case PCI_CHIP_VT3205:
+ pVia->Chipset = VIA_KM400;
+ break;
+ case PCI_CHIP_VT3204:
+ pVia->Chipset = VIA_K8M800;
+ break;
+ case PCI_CHIP_VT3259:
+ pVia->Chipset = VIA_PM800;
+ break;
+ default:
+ xf86DrvMsg(0, X_ERROR, "VIA: Unknown device ID (0x%x)\n", ctx->chipset);
+ }
+
+ /* _SOLO TODO XXX need to read ChipRev too */
+ pVia->ChipRev = 0;
pVia->videoRambytes = ctx->shared.fbSize;
pVia->MmioBase = ctx->MMIOStart;
@@ -822,22 +1089,26 @@ static int viaInitFBDev(DRIDriverContext *ctx)
ctx->shared.virtualHeight;
pVia->FBFreeEnd = pVia->videoRambytes;
- pVia->sharedData = (ViaSharedPtr) calloc(1, sizeof(ViaSharedRec));
-
if (!VIADRIScreenInit(ctx))
return 0;
VIAEnableMMIO(ctx);
+ /* Get video memory clock. */
+ VGAOUT8(0x3D4, 0x3D);
+ pVia->MemClk = (VGAIN8(0x3D5) & 0xF0) >> 4;
+ xf86DrvMsg(0, X_INFO, "[dri] MemClk (0x%x)\n", pVia->MemClk);
+
/* 3D rendering has noise if not enabled. */
VIAEnableExtendedFIFO(ctx);
VIAInitialize2DEngine(ctx);
- VIAInitialize3DEngine(ctx);
/* Must disable MMIO or 3D won't work. */
VIADisableMMIO(ctx);
+ VIAInitialize3DEngine(ctx);
+
return 1;
}
diff --git a/src/mesa/drivers/dri/unichrome/server/via_driver.h b/src/mesa/drivers/dri/unichrome/server/via_driver.h
index f97704c0768..fe7df163cf7 100644
--- a/src/mesa/drivers/dri/unichrome/server/via_driver.h
+++ b/src/mesa/drivers/dri/unichrome/server/via_driver.h
@@ -23,8 +23,8 @@
* DEALINGS IN THE SOFTWARE.
*/
-#ifndef _VIA_DRIVER_H_
-#define _VIA_DRIVER_H_ 1
+#ifndef _VIA_DRIVER_H
+#define _VIA_DRIVER_H
#if 0 /* DEBUG is use in VIA DRI code as a flag */
/* #define DEBUG_PRINT */
@@ -75,7 +75,6 @@
#include "via_dri.h"
#endif
#else
-#include "via_priv.h"
#include "via_regs.h"
#include "sarea.h"
@@ -83,11 +82,25 @@
#include "via_dri.h"
#endif
+typedef unsigned char CARD8;
+typedef unsigned short CARD16;
+typedef enum Bool { FALSE, TRUE } Bool;
+
+/* _SOLO : copied from via_bios.h */
+/* System Memory CLK */
+#define VIA_MEM_SDR66 0x00
+#define VIA_MEM_SDR100 0x01
+#define VIA_MEM_SDR133 0x02
+#define VIA_MEM_DDR200 0x03
+#define VIA_MEM_DDR266 0x04
+#define VIA_MEM_DDR333 0x05
+#define VIA_MEM_DDR400 0x06
+
#define DRIVER_NAME "via"
#define DRIVER_VERSION "4.1.0"
#define VERSION_MAJOR 4
#define VERSION_MINOR 1
-#define PATCHLEVEL 30
+#define PATCHLEVEL 41
#define VIA_VERSION ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL)
#define VGAIN8(addr) MMIO_IN8(pVia->MapBase+0x8000, addr)
@@ -127,145 +140,22 @@ typedef struct {
unsigned char CR13, CR30, CR31, CR32, CR33, CR34, CR35, CR36;
unsigned char CR37, CR38, CR39, CR3A, CR40, CR41, CR42, CR43;
unsigned char CR44, CR45, CR46, CR47, CR48, CR49, CR4A;
- unsigned char CRTCRegs[68];
- unsigned char TVRegs[0xFF];
+ unsigned char CRTCRegs[83];
+ unsigned char TVRegs[0xCF];
+ unsigned char TVRegs2[0xCF];
/* unsigned char LCDRegs[0x40];*/
-} VIARegRec, *VIARegPtr;
-/*Definition for CapturePortID*/
-#define PORT0 0 /* Capture Port 0*/
-#define PORT1 1 /* Capture Port 1*/
-
-typedef struct __viaVideoControl {
- CARD32 PORTID;
- CARD32 dwCompose;
- CARD32 dwHighQVDO;
- CARD32 VideoStatus;
- CARD32 dwAction;
-#define ACTION_SET_PORTID 0
-#define ACTION_SET_COMPOSE 1
-#define ACTION_SET_HQV 2
-#define ACTION_SET_BOB 4
-#define ACTION_SET_VIDEOSTATUS 8
- Bool Cap0OnScreen1; /* True: Capture0 On Screen1 ; False: Capture0 On Screen0 */
- Bool Cap1OnScreen1; /* True: Capture1 On Screen1 ; False: Capture1 On Screen0 */
- Bool MPEGOnScreen1; /* True: MPEG On Screen1 ; False: MPEG On Screen0 */
-} VIAVideoControlRec, VIAVideoControlPtr;
-
-/*For Video HW Difference */
-#define VIA_REVISION_CLEC0 0x10
-#define VIA_REVISION_CLEC1 0x11
-#define VIA_REVISION_CLECX 0x10
-
-#define VID_HWDIFF_TRUE 0x00000001
-#define VID_HWDIFF_FALSE 0x00000000
-
-/*
- * Video HW Difference Structure
- */
-
-typedef struct __VIAHWRec
-{
- unsigned long dwThreeHQVBuffer; /* Use Three HQV Buffers*/
- unsigned long dwV3SrcHeightSetting; /* Set Video Source Width and Height*/
- unsigned long dwSupportExtendFIFO; /* Support Extand FIFO*/
- unsigned long dwHQVFetchByteUnit; /* HQV Fetch Count unit is byte*/
- unsigned long dwHQVInitPatch; /* Initialize HQV Engine 2 times*/
- unsigned long dwSupportV3Gamma; /* Support V3 Gamma */
- unsigned long dwUpdFlip; /* Set HQV3D0[15] to flip video*/
- unsigned long dwHQVDisablePatch; /* Change Video Engine Clock setting for HQV disable bug*/
- unsigned long dwSUBFlip; /* Set HQV3D0[15] to flip video for sub-picture blending*/
- unsigned long dwNeedV3Prefetch; /* V3 pre-fetch function for K8*/
- unsigned long dwNeedV4Prefetch; /* V4 pre-fetch function for K8*/
- unsigned long dwUseSystemMemory; /* Use system memory for DXVA compressed data buffers*/
- unsigned long dwExpandVerPatch; /* Patch video HW bug in expand SIM mode or same display path*/
- unsigned long dwExpandVerHorPatch; /* Patch video HW bug in expand SAMM mode or same display path*/
- unsigned long dwV3ExpireNumTune; /* Change V3 expire number setting for V3 bandwidth issue*/
- unsigned long dwV3FIFOThresholdTune; /* Change V3 FIFO, Threshold and Pre-threshold setting for V3 bandwidth issue*/
- unsigned long dwCheckHQVFIFOEmpty; /* HW Flip path, need to check HQV FIFO status */
- unsigned long dwUseMPEGAGP; /* Use MPEG AGP function*/
- unsigned long dwV3FIFOPatch; /* For CLE V3 FIFO Bug (srcWidth <= 8)*/
- unsigned long dwSupportTwoColorKey; /* Support two color key*/
- unsigned long dwCxColorSpace; /* CLE_Cx ColorSpace*/
-} VIAHWRec;
-
-/*Wait Function Structure and Flag*/
-typedef struct _WaitHWINFO
-{
- unsigned char * pjVideo; /* MMIO Address Info*/
- unsigned long dwVideoFlag; /* Video Flag*/
-}WaitHWINFO, * LPWaitHWINFO;
-
-#if 0
-/* VIA Tuners */
-typedef struct
-{
- int decoderType; /* Decoder I2C Type */
-#define SAA7108H 0
-#define SAA7113H 1
-#define SAA7114H 2
- I2CDevPtr I2C; /* Decoder I2C */
- I2CDevPtr FMI2C; /* FM Tuner I2C */
-
- /* Not yet used */
- int autoDetect; /* Autodetect mode */
- int tunerMode; /* Fixed mode */
-} ViaTunerRec, *ViaTunerPtr;
-#endif
-
-/*
- * New style overlay structure for the SubPicture overlay
- */
-
-#if 0
-typedef struct
-{
- VIAMem Memory;
- int visible:1; /* Idea is for the top bits to become a generic class */
- CARD32 width;
- CARD32 height;
- CARD32 pitch;
- CARD32 base[2]; /* Some channels have 3 so 3 for the generic unit */
- struct
- {
- CARD8 Y;
- CARD8 Cb;
- CARD8 Cr;
- } palette[16];
-} ViaSubPictureRecord;
-
-typedef struct
-{
- VIAMem Memory;
- int visible:1; /* Visible */
- CARD32 width;
- CARD32 height;
- CARD32 pitch;
- CARD32 base[3];
- int Channel;
- int HQV; /* Own HQV */
-} ViaTVRecord;
-
-typedef struct
-{
- VIAMem Memory;
- CARD32 base[3];
- int Busy;
-} ViaHQVRecord;
-#endif
-
-/*
- * Variables that need to be shared among different screens.
- */
-typedef struct {
- Bool b3DRegsInitialized;
-} ViaSharedRec, *ViaSharedPtr;
+} VIARegRec, *VIARegPtr;
typedef struct _VIA {
VIARegRec SavedReg;
VIARegRec ModeReg;
- //xf86CursorInfoPtr CursorInfoRec;
+#if 0
+ xf86CursorInfoPtr CursorInfoRec;
+ int stateMode;
+ VIAModeInfoPtr VIAModeList;
+#endif
Bool ModeStructInit;
int Bpp, Bpl, ScissB;
unsigned PlaneMask;
@@ -289,11 +179,6 @@ typedef struct _VIA {
unsigned char* MapBaseDense;
unsigned char* FBBase;
unsigned char* FBStart;
-
- /* Private memory pool management */
- int SWOVUsed[MEM_BLOCKS]; /* Free map for SWOV pool */
- unsigned long SWOVPool; /* Base of SWOV pool */
- unsigned long SWOVSize; /* Size of SWOV blocks */
Bool PrimaryVidMapped;
int dacSpeedBpp;
@@ -311,13 +196,15 @@ typedef struct _VIA {
Bool NoDDCValue;
int rotate;
- //CloseScreenProcPtr CloseScreen;
- //pciVideoPtr PciInfo;
- //PCITAG PciTag;
+#if 0
+ CloseScreenProcPtr CloseScreen;
+ pciVideoPtr PciInfo;
+ PCITAG PciTag;
+#endif
int Chipset;
int ChipId;
int ChipRev;
- //vbeInfoPtr pVbe;
+ /*vbeInfoPtr pVbe;*/
int EntityIndex;
/* Support for shadowFB and rotation */
@@ -326,8 +213,10 @@ typedef struct _VIA {
void (*PointerMoved)(int index, int x, int y);
/* Support for XAA acceleration */
- //XAAInfoRecPtr AccelInfoRec;
- //xRectangle Rect;
+#if 0
+ XAAInfoRecPtr AccelInfoRec;
+ xRectangle Rect;
+#endif
CARD32 SavedCmd;
CARD32 SavedFgColor;
CARD32 SavedBgColor;
@@ -335,39 +224,50 @@ typedef struct _VIA {
CARD32 SavedPattern1;
CARD32 SavedPatternAddr;
+#if 0
/* Support for Int10 processing */
- //xf86Int10InfoPtr pInt10;
+ xf86Int10InfoPtr pInt10;
/* BIOS Info Ptr */
- //VIABIOSInfoPtr pBIOSInfo;
+ VIABIOSInfoPtr pBIOSInfo;
+ VGABIOSVERPtr pBIOSVer;
+#endif
/* Support for DGA */
int numDGAModes;
- //DGAModePtr DGAModes;
+ /*DGAModePtr DGAModes;*/
Bool DGAactive;
int DGAViewportStatus;
- int DGAOldDisplayWidth;
- int DGAOldBitsPerPixel;
- int DGAOldDepth;
+
/* The various wait handlers. */
int (*myWaitIdle)(struct _VIA*);
+#if 0
/* I2C & DDC */
- //I2CBusPtr I2C_Port1;
- //I2CBusPtr I2C_Port2;
- //xf86MonPtr DDC1;
- //xf86MonPtr DDC2;
+ I2CBusPtr I2C_Port1;
+ I2CBusPtr I2C_Port2;
+ xf86MonPtr DDC1;
+ xf86MonPtr DDC2;
+#endif
/* MHS */
Bool IsSecondary;
Bool HasSecondary;
- /* Capture de-interlace Mode */
+#if 0
+ /* Capture information */
+ VIACAPINFO CapInfo[2]; /* 2 capture information */
+#endif
+
+/*
CARD32 Cap0_Deinterlace;
CARD32 Cap1_Deinterlace;
Bool Cap0_FieldSwap;
-
+ Bool NoCap0_HFilter;
+ Bool Capture_OverScanOff;
+ Bool NoMPEGHQV_VFilter;
+*/
#ifdef XF86DRI
Bool directRenderingEnabled;
DRIInfoPtr pDRIInfo;
@@ -377,7 +277,7 @@ typedef struct _VIA {
VIAConfigPrivPtr pVisualConfigsPriv;
unsigned long agpHandle;
unsigned long registerHandle;
- unsigned long agpAddr;
+ CARD32 agpAddr;
unsigned char *agpBase;
unsigned int agpSize;
Bool IsPCI;
@@ -391,184 +291,24 @@ typedef struct _VIA {
unsigned int agpSize;
Bool IsPCI;
#endif
- Bool OldDRI; /* True if DRM < 2.0 found */
-
- unsigned char ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */
- unsigned char *CursorImage;
- CARD32 CursorFG;
- CARD32 CursorBG;
- CARD32 CursorMC;
-#if 0
- /* Video */
- swovRec swov;
- VIAVideoControlRec Video;
- VIAHWRec ViaHW;
- unsigned long dwV1, dwV3;
- unsigned long OverlaySupported;
- unsigned long dwFrameNum;
-
- pointer VidReg;
- unsigned long gdwVidRegCounter;
- unsigned long old_dwUseExtendedFIFO;
-
- /* Overlay TV Tuners */
- ViaTunerPtr Tuner[2];
- I2CDevPtr CXA2104S;
- int AudioMode;
- int AudioMute;
-#endif
+ Bool V4LEnabled;
+ CARD16 ActiveDevice; /* if SAMM, non-equal pBIOSInfo->ActiveDevice */
+ unsigned char *CursorImage;
+ CARD32 CursorFG;
+ CARD32 CursorBG;
+ CARD32 CursorMC;
- /* SubPicture */
- //ViaSubPictureRecord SubPicture;
- //ViaHQVRecord HQV;
- //ViaTVRecord TV0, TV1;
-
- /* TODO: MPEG TV0 TV1 */
-
- /* Global 2D state block - needs to slowly die */
- //ViaGraphicRec graphicInfo;
- ViaSharedPtr sharedData;
-
- VIADRIPtr devPrivate;
+ unsigned char MemClk;
+ Bool EnableExtendedFIFO;
+ VIADRIPtr devPrivate;
} VIARec, *VIAPtr;
-#if 0
-typedef struct
-{
- Bool IsDRIEnabled;
-
- Bool HasSecondary;
- Bool BypassSecondary;
- /*These two registers are used to make sure the CRTC2 is
- retored before CRTC_EXT, otherwise it could lead to blank screen.*/
- Bool IsSecondaryRestored;
- Bool RestorePrimary;
-
- ScrnInfoPtr pSecondaryScrn;
- ScrnInfoPtr pPrimaryScrn;
-}VIAEntRec, *VIAEntPtr;
-#endif
-
-
/* Shortcuts. These depend on a local symbol "pVia". */
#define WaitIdle() pVia->myWaitIdle(pVia)
#define VIAPTR(p) ((VIAPtr)((p)->driverPrivate))
+#endif /* _VIA_DRIVER_H */
-#if 0
-/* Prototypes. */
-void VIAAdjustFrame(int scrnIndex, int y, int x, int flags);
-Bool VIASwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
-
-/* In HwDiff.c */
-void VIAvfInitHWDiff(VIAPtr pVia );
-
-/* In via_cursor.c. */
-Bool VIAHWCursorInit(ScreenPtr pScreen);
-void VIAShowCursor(ScrnInfoPtr);
-void VIAHideCursor(ScrnInfoPtr);
-
-
-/* In via_accel.c. */
-Bool VIAInitAccel(ScreenPtr);
-void VIAInitialize2DEngine(ScrnInfoPtr);
-void VIAAccelSync(ScrnInfoPtr);
-void VIAInitLinear(ScreenPtr pScreen);
-
-
-/* In via_shadow.c */
-void VIAPointerMoved(int index, int x, int y);
-void VIARefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void VIARefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void VIARefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void VIARefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-void VIARefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
-
-
-/* In via_bios.c */
-void VIAEnableLCD(VIABIOSInfoPtr pBIOSInfo);
-void VIADisableLCD(VIABIOSInfoPtr pBIOSInfo);
-
-/* In via_dga.c */
-Bool VIADGAInit(ScreenPtr);
-
-/* In via_i2c.c */
-Bool VIAI2CInit(ScrnInfoPtr pScrn);
-
-/* In via_gpioi2c.c */
-Bool VIAGPIOI2C_Write(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 Data);
-Bool VIAGPIOI2C_Read(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 *Buffer, int BufferLen);
-Bool VIAGPIOI2C_ReadByte(VIABIOSInfoPtr pBIOSInfo, int SubAddress, CARD8 *Buffer);
-Bool VIAGPIOI2C_Initial(VIABIOSInfoPtr pBIOSInfo, CARD8 SlaveDevice);
-
-/*In via_video.c*/
-void viaInitVideo(ScreenPtr pScreen);
-void viaExitVideo(ScrnInfoPtr pScrn);
-void viaResetVideo(ScrnInfoPtr pScrn);
-void viaSaveVideo(ScrnInfoPtr pScrn);
-void viaRestoreVideo(ScrnInfoPtr pScrn);
-
-/*In via_utility.c */
-void VIAXVUtilityProc(ScrnInfoPtr pScrn, unsigned char* buf);
-Bool VIAUTGetInfo(VIABIOSInfoPtr pBIOSInfo);
-Bool VIALoadUserSetting(VIABIOSInfoPtr pBIOSInfo);
-Bool VIALoadGammaSetting(VIABIOSInfoPtr pBIOSInfo);
-Bool VIARestoreUserSetting(VIABIOSInfoPtr pBIOSInfo);
-void VIAUTRemoveRestartFlag(VIABIOSInfoPtr pBIOSInfo);
-
-/* in via_overlay.c */
-unsigned long viaOverlayHQVCalcZoomHeight (VIAPtr pVia, unsigned long srcHeight,unsigned long dstHeight,
- unsigned long * lpzoomCtl, unsigned long * lpminiCtl, unsigned long * lpHQVfilterCtl, unsigned long * lpHQVminiCtl,unsigned long * lpHQVzoomflag);
-unsigned long viaOverlayGetSrcStartAddress (VIAPtr pVia, unsigned long dwVideoFlag,RECTL rSrc,RECTL rDest, unsigned long dwSrcPitch,LPDDPIXELFORMAT lpDPF,unsigned long * lpHQVoffset );
-void viaOverlayGetDisplayCount(VIAPtr pVIa, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF,unsigned long dwSrcWidth,unsigned long * lpDisplayCountW);
-unsigned long viaOverlayHQVCalcZoomWidth(VIAPtr pVia, unsigned long dwVideoFlag, unsigned long srcWidth , unsigned long dstWidth,
- unsigned long * lpzoomCtl, unsigned long * lpminiCtl, unsigned long * lpHQVfilterCtl, unsigned long * lpHQVminiCtl,unsigned long * lpHQVzoomflag);
-void viaOverlayGetV1Format(VIAPtr pVia, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF, unsigned long * lpdwVidCtl,unsigned long * lpdwHQVCtl );
-void viaOverlayGetV3Format(VIAPtr pVia, unsigned long dwVideoFlag,LPDDPIXELFORMAT lpDPF, unsigned long * lpdwVidCtl,unsigned long * lpdwHQVCtl );
-
-/* In via_memory.c */
-void VIAFreeLinear(VIAMemPtr);
-unsigned long VIAAllocLinear(VIAMemPtr, ScrnInfoPtr, unsigned long);
-void VIAInitPool(VIAPtr, unsigned long, unsigned long);
-
-/* In via_tuner.c */
-void ViaTunerStandard(ViaTunerPtr, int);
-void ViaTunerBrightness(ViaTunerPtr, int);
-void ViaTunerContrast(ViaTunerPtr, int);
-void ViaTunerHue(ViaTunerPtr, int);
-void ViaTunerLuminance(ViaTunerPtr, int);
-void ViaTunerSaturation(ViaTunerPtr, int);
-void ViaTunerInput(ViaTunerPtr, int);
-#define MODE_TV 0
-#define MODE_SVIDEO 1
-#define MODE_COMPOSITE 2
-
-void ViaTunerChannel(ViaTunerPtr, int, int);
-void ViaAudioSelect(VIAPtr pVia, int tuner);
-void ViaAudioInit(VIAPtr pVia);
-void ViaAudioMode(VIAPtr pVia, int mode);
-void ViaAudioMute(VIAPtr pVia, int mute);
-void ViaTunerProbe(ScrnInfoPtr pScrn);
-void ViaTunerDestroy(ScrnInfoPtr pScrn);
-
-/* In via_lib.c */
-int VIACLECXChipset(VIAPtr pVia);
-void VIASetColorspace(VIAPtr pVia, int check_secondary);
-void VIAYUVFillBlack(VIAPtr pVia, int offset, int pixels);
-
-/* In via_subp.c */
-unsigned long VIACreateSubPictureSurface(ScrnInfoPtr pScrn, CARD32 width, CARD32 height);
-void VIADestroySubPictureSurface(ScrnInfoPtr pScrn);
-void VIASubPicturePalette(ScrnInfoPtr pScrn);
-void VIASubPictureStart(ScrnInfoPtr pScrn, int frame);
-void VIASubPictureStop(ScrnInfoPtr pScrn);
-
-/* In via_tv0.c */
-unsigned long VIACreateTV0Surface(ScrnInfoPtr pScrn, CARD32 width, CARD32 height);
-void VIADestroyTV0Surface(ScrnInfoPtr pScrn);
-#endif
-
-#endif /* _VIA_DRIVER_H_ */
diff --git a/src/mesa/drivers/dri/unichrome/server/via_regs.h b/src/mesa/drivers/dri/unichrome/server/via_regs.h
index 3e2fb0a2a06..8205939106f 100644
--- a/src/mesa/drivers/dri/unichrome/server/via_regs.h
+++ b/src/mesa/drivers/dri/unichrome/server/via_regs.h
@@ -1,4 +1,3 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_regs.h,v 1.3 2003/08/27 15:16:13 tsi Exp $ */
/*
* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
@@ -30,12 +29,12 @@
*
************************************************************************/
-#ifndef _VIA_REGS_H_
-#define _VIA_REGS_H_ 1
+#ifndef _VIA_REGS_H
+#define _VIA_REGS_H
#include "via_driver.h"
-#define VIA_SERIES(chip) (chip == VIA_CLE266)
+/*#define VIA_SERIES(chip) (chip == VIA_CLE266)*/
/* Chip tags. These are used to group the adapters into
@@ -47,6 +46,7 @@ enum VIACHIPTAGS {
VIA_CLE266,
VIA_KM400,
VIA_K8M800,
+ VIA_PM800,
VIA_LAST
};
@@ -57,8 +57,8 @@ enum VIACHIPTAGS {
#define PCI_CHIP_CLE3022 0x3022
#define PCI_CHIP_VT3205 0x3205
#define PCI_CHIP_VT7205 0x7205
-#define PCI_CHIP_VT3204 0x3204
-#define PCI_CHIP_VT7204 0x7204
+#define PCI_CHIP_VT3204 0x3108
+#define PCI_CHIP_VT3259 0x3118
#define BIOS_BSIZE 1024
@@ -209,4 +209,4 @@ enum VIACHIPTAGS {
#define VIAGETREG(addr) *(volatile unsigned int *)(pVia->MapBase + (addr))
-#endif /* _VIA_REGS_H_ */
+#endif /* _VIA_REGS_H */
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 03:49:21 +0000