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-rw-r--r--src/mesa/drivers/dri/radeon/radeon_blit.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_blit.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_buffer_objects.c14
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.c28
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common.h24
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c16
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.h22
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_context.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_context.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.h6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_fbo.c28
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.h8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_arrays.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_maos_verts.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_pixel_read.c4
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_queryobj.c20
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_queryobj.h8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.c8
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_span.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.c98
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state.h14
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_state_init.c26
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_swtcl.c32
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_swtcl.h18
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tcl.c22
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tcl.h10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex.c10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex.h2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex_copy.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_tex_getimage.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texstate.c10
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.c44
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_texture.h40
39 files changed, 292 insertions, 286 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.c b/src/mesa/drivers/dri/radeon/radeon_blit.c
index 143822361e1..fe14540bc2e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.c
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.c
@@ -321,7 +321,7 @@ static inline void emit_draw_packet(struct r100_context *r100,
* @param[in] height region height
* @param[in] flip_y set if y coords of the source image need to be flipped
*/
-unsigned r100_blit(GLcontext *ctx,
+unsigned r100_blit(struct gl_context *ctx,
struct radeon_bo *src_bo,
intptr_t src_offset,
gl_format src_mesaformat,
diff --git a/src/mesa/drivers/dri/radeon/radeon_blit.h b/src/mesa/drivers/dri/radeon/radeon_blit.h
index d7d0b5554a6..5e5c73481a6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_blit.h
+++ b/src/mesa/drivers/dri/radeon/radeon_blit.h
@@ -32,7 +32,7 @@ void r100_blit_init(struct r100_context *r100);
unsigned r100_check_blit(gl_format mesa_format);
-unsigned r100_blit(GLcontext *ctx,
+unsigned r100_blit(struct gl_context *ctx,
struct radeon_bo *src_bo,
intptr_t src_offset,
gl_format src_mesaformat,
diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
index 0897dafbd8b..0d1af726c07 100644
--- a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
+++ b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
@@ -40,7 +40,7 @@ get_radeon_buffer_object(struct gl_buffer_object *obj)
}
static struct gl_buffer_object *
-radeonNewBufferObject(GLcontext * ctx,
+radeonNewBufferObject(struct gl_context * ctx,
GLuint name,
GLenum target)
{
@@ -57,7 +57,7 @@ radeonNewBufferObject(GLcontext * ctx,
* Called via glDeleteBuffersARB().
*/
static void
-radeonDeleteBufferObject(GLcontext * ctx,
+radeonDeleteBufferObject(struct gl_context * ctx,
struct gl_buffer_object *obj)
{
struct radeon_buffer_object *radeon_obj = get_radeon_buffer_object(obj);
@@ -82,7 +82,7 @@ radeonDeleteBufferObject(GLcontext * ctx,
* \return GL_TRUE for success, GL_FALSE if out of memory
*/
static GLboolean
-radeonBufferData(GLcontext * ctx,
+radeonBufferData(struct gl_context * ctx,
GLenum target,
GLsizeiptrARB size,
const GLvoid * data,
@@ -129,7 +129,7 @@ radeonBufferData(GLcontext * ctx,
* Called via glBufferSubDataARB().
*/
static void
-radeonBufferSubData(GLcontext * ctx,
+radeonBufferSubData(struct gl_context * ctx,
GLenum target,
GLintptrARB offset,
GLsizeiptrARB size,
@@ -154,7 +154,7 @@ radeonBufferSubData(GLcontext * ctx,
* Called via glGetBufferSubDataARB()
*/
static void
-radeonGetBufferSubData(GLcontext * ctx,
+radeonGetBufferSubData(struct gl_context * ctx,
GLenum target,
GLintptrARB offset,
GLsizeiptrARB size,
@@ -174,7 +174,7 @@ radeonGetBufferSubData(GLcontext * ctx,
* Called via glMapBufferARB()
*/
static void *
-radeonMapBuffer(GLcontext * ctx,
+radeonMapBuffer(struct gl_context * ctx,
GLenum target,
GLenum access,
struct gl_buffer_object *obj)
@@ -204,7 +204,7 @@ radeonMapBuffer(GLcontext * ctx,
* Called via glUnmapBufferARB()
*/
static GLboolean
-radeonUnmapBuffer(GLcontext * ctx,
+radeonUnmapBuffer(struct gl_context * ctx,
GLenum target,
struct gl_buffer_object *obj)
{
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
index c1a660af3d0..43a6355ad8b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c
@@ -201,7 +201,7 @@ void radeonSetCliprects(radeonContextPtr radeon)
-void radeonUpdateScissor( GLcontext *ctx )
+void radeonUpdateScissor( struct gl_context *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
GLint x = ctx->Scissor.X, y = ctx->Scissor.Y;
@@ -252,7 +252,7 @@ void radeonUpdateScissor( GLcontext *ctx )
* Scissoring
*/
-void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
+void radeonScissor(struct gl_context* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
if (ctx->Scissor.Enabled) {
@@ -578,7 +578,7 @@ void radeonSwapBuffers(__DRIdrawable * dPriv)
if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
radeonContextPtr radeon;
- GLcontext *ctx;
+ struct gl_context *ctx;
radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
ctx = radeon->glCtx;
@@ -620,7 +620,7 @@ void radeonCopySubBuffer(__DRIdrawable * dPriv,
{
if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
radeonContextPtr radeon;
- GLcontext *ctx;
+ struct gl_context *ctx;
radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
ctx = radeon->glCtx;
@@ -646,7 +646,7 @@ void radeonCopySubBuffer(__DRIdrawable * dPriv,
* If so, set the intel->front_buffer_dirty field to true.
*/
void
-radeon_check_front_buffer_rendering(GLcontext *ctx)
+radeon_check_front_buffer_rendering(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
const struct gl_framebuffer *fb = ctx->DrawBuffer;
@@ -662,7 +662,7 @@ radeon_check_front_buffer_rendering(GLcontext *ctx)
}
-void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb)
+void radeon_draw_buffer(struct gl_context *ctx, struct gl_framebuffer *fb)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_renderbuffer *rrbDepth = NULL, *rrbStencil = NULL,
@@ -817,7 +817,7 @@ void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb)
/**
* Called via glDrawBuffer.
*/
-void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
+void radeonDrawBuffer( struct gl_context *ctx, GLenum mode )
{
if (RADEON_DEBUG & RADEON_DRI)
fprintf(stderr, "%s %s\n", __FUNCTION__,
@@ -844,7 +844,7 @@ void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
radeon_draw_buffer(ctx, ctx->DrawBuffer);
}
-void radeonReadBuffer( GLcontext *ctx, GLenum mode )
+void radeonReadBuffer( struct gl_context *ctx, GLenum mode )
{
if ((ctx->DrawBuffer != NULL) && (ctx->DrawBuffer->Name == 0)) {
struct radeon_context *const rmesa = RADEON_CONTEXT(ctx);
@@ -891,11 +891,11 @@ void radeon_window_moved(radeonContextPtr radeon)
}
}
-void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height)
+void radeon_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei width, GLsizei height)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
__DRIcontext *driContext = radeon->dri.context;
- void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
+ void (*old_viewport)(struct gl_context *ctx, GLint x, GLint y,
GLsizei w, GLsizei h);
if (!driContext->driScreenPriv->dri2.enabled)
@@ -1064,7 +1064,7 @@ static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean emitAll)
COMMIT_BATCH();
}
-static GLboolean radeon_revalidate_bos(GLcontext *ctx)
+static GLboolean radeon_revalidate_bos(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
int ret;
@@ -1104,7 +1104,7 @@ void radeonEmitState(radeonContextPtr radeon)
}
-void radeonFlush(GLcontext *ctx)
+void radeonFlush(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & RADEON_IOCTL)
@@ -1145,7 +1145,7 @@ flush_front:
/* Make sure all commands have been sent to the hardware and have
* completed processing.
*/
-void radeonFinish(GLcontext * ctx)
+void radeonFinish(struct gl_context * ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct gl_framebuffer *fb = ctx->DrawBuffer;
@@ -1327,7 +1327,7 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n,
}
-void radeonUserClear(GLcontext *ctx, GLuint mask)
+void radeonUserClear(struct gl_context *ctx, GLuint mask)
{
_mesa_meta_Clear(ctx, mask);
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h
index 35b3f08fff9..85a114623ad 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common.h
@@ -5,11 +5,11 @@
#include "radeon_dma.h"
#include "radeon_texture.h"
-void radeonUserClear(GLcontext *ctx, GLuint mask);
+void radeonUserClear(struct gl_context *ctx, GLuint mask);
void radeonRecalcScissorRects(radeonContextPtr radeon);
void radeonSetCliprects(radeonContextPtr radeon);
-void radeonUpdateScissor( GLcontext *ctx );
-void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
+void radeonUpdateScissor( struct gl_context *ctx );
+void radeonScissor(struct gl_context* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
void radeonWaitForIdleLocked(radeonContextPtr radeon);
extern uint32_t radeonGetAge(radeonContextPtr radeon);
@@ -21,18 +21,18 @@ void radeonCopySubBuffer(__DRIdrawable * dPriv,
void radeonUpdatePageFlipping(radeonContextPtr rmesa);
-void radeonFlush(GLcontext *ctx);
-void radeonFinish(GLcontext * ctx);
+void radeonFlush(struct gl_context *ctx);
+void radeonFinish(struct gl_context * ctx);
void radeonEmitState(radeonContextPtr radeon);
GLuint radeonCountStateEmitSize(radeonContextPtr radeon);
-void radeon_clear_tris(GLcontext *ctx, GLbitfield mask);
+void radeon_clear_tris(struct gl_context *ctx, GLbitfield mask);
void radeon_window_moved(radeonContextPtr radeon);
-void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb);
-void radeonDrawBuffer( GLcontext *ctx, GLenum mode );
-void radeonReadBuffer( GLcontext *ctx, GLenum mode );
-void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height);
+void radeon_draw_buffer(struct gl_context *ctx, struct gl_framebuffer *fb);
+void radeonDrawBuffer( struct gl_context *ctx, GLenum mode );
+void radeonReadBuffer( struct gl_context *ctx, GLenum mode );
+void radeon_viewport(struct gl_context *ctx, GLint x, GLint y, GLsizei width, GLsizei height);
void radeon_get_cliprects(radeonContextPtr radeon,
struct drm_clip_rect **cliprects,
unsigned int *num_cliprects,
@@ -45,12 +45,12 @@ struct radeon_renderbuffer *
radeon_create_renderbuffer(gl_format format, __DRIdrawable *driDrawPriv);
void
-radeonReadPixels(GLcontext * ctx,
+radeonReadPixels(struct gl_context * ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack, GLvoid * pixels);
-void radeon_check_front_buffer_rendering(GLcontext *ctx);
+void radeon_check_front_buffer_rendering(struct gl_context *ctx);
static inline struct radeon_renderbuffer *radeon_renderbuffer(struct gl_renderbuffer *rb)
{
struct radeon_renderbuffer *rrb = (struct radeon_renderbuffer *)rb;
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 85e4988c53f..40544860b3b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -105,7 +105,7 @@ static const char* get_chip_family_name(int chip_family)
/* Return various strings for glGetString().
*/
-static const GLubyte *radeonGetString(GLcontext * ctx, GLenum name)
+static const GLubyte *radeonGetString(struct gl_context * ctx, GLenum name)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
static char buffer[128];
@@ -180,14 +180,14 @@ static void radeonInitDriverFuncs(struct dd_function_table *functions)
*/
GLboolean radeonInitContext(radeonContextPtr radeon,
struct dd_function_table* functions,
- const __GLcontextModes * glVisual,
+ const struct gl_config * glVisual,
__DRIcontext * driContextPriv,
void *sharedContextPrivate)
{
__DRIscreen *sPriv = driContextPriv->driScreenPriv;
radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
- GLcontext* ctx;
- GLcontext* shareCtx;
+ struct gl_context* ctx;
+ struct gl_context* shareCtx;
int fthrottle_mode;
/* Fill in additional standard functions. */
@@ -521,6 +521,7 @@ void radeon_prepare_render(radeonContextPtr radeon)
__DRIcontext *driContext = radeon->dri.context;
__DRIdrawable *drawable;
__DRIscreen *screen;
+ struct radeon_framebuffer *draw;
screen = driContext->driScreenPriv;
if (!screen->dri2.loader)
@@ -531,9 +532,10 @@ void radeon_prepare_render(radeonContextPtr radeon)
if (drawable->lastStamp != drawable->dri2.stamp)
radeon_update_renderbuffers(driContext, drawable, GL_FALSE);
- /* Intel driver does the equivalent of this, no clue if it is needed:
- * radeon_draw_buffer(radeon->glCtx, &(drawable->driverPrivate)->base);
- */
+ /* Intel driver does the equivalent of this, no clue if it is needed:*/
+ draw = drawable->driverPrivate;
+ radeon_draw_buffer(radeon->glCtx, &draw->base);
+
driContext->dri2.draw_stamp = drawable->dri2.stamp;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
index 024e31f8ec7..c62913afd0c 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h
@@ -159,8 +159,8 @@ struct radeon_state_atom {
GLuint *cmd; /* one or more cmd's */
GLuint *lastcmd; /* one or more cmd's */
GLboolean dirty; /* dirty-mark in emit_state_list */
- int (*check) (GLcontext *, struct radeon_state_atom *atom); /* is this state active? */
- void (*emit) (GLcontext *, struct radeon_state_atom *atom);
+ int (*check) (struct gl_context *, struct radeon_state_atom *atom); /* is this state active? */
+ void (*emit) (struct gl_context *, struct radeon_state_atom *atom);
};
struct radeon_hw_state {
@@ -316,7 +316,7 @@ struct radeon_dma {
* flush must be called before non-active vertex allocations can be
* performed.
*/
- void (*flush) (GLcontext *);
+ void (*flush) (struct gl_context *);
};
/* radeon_swtcl.c
@@ -432,7 +432,7 @@ struct radeon_cmdbuf {
};
struct radeon_context {
- GLcontext *glCtx;
+ struct gl_context *glCtx;
radeonScreenPtr radeonScreen; /* Screen private DRI data */
/* Texture object bookkeeping
@@ -518,17 +518,17 @@ struct radeon_context {
struct {
void (*get_lock)(radeonContextPtr radeon);
- void (*update_viewport_offset)(GLcontext *ctx);
+ void (*update_viewport_offset)(struct gl_context *ctx);
void (*emit_cs_header)(struct radeon_cs *cs, radeonContextPtr rmesa);
- void (*swtcl_flush)(GLcontext *ctx, uint32_t offset);
+ void (*swtcl_flush)(struct gl_context *ctx, uint32_t offset);
void (*pre_emit_atoms)(radeonContextPtr rmesa);
void (*pre_emit_state)(radeonContextPtr rmesa);
- void (*fallback)(GLcontext *ctx, GLuint bit, GLboolean mode);
- void (*free_context)(GLcontext *ctx);
+ void (*fallback)(struct gl_context *ctx, GLuint bit, GLboolean mode);
+ void (*free_context)(struct gl_context *ctx);
void (*emit_query_finish)(radeonContextPtr radeon);
- void (*update_scissor)(GLcontext *ctx);
+ void (*update_scissor)(struct gl_context *ctx);
unsigned (*check_blit)(gl_format mesa_format);
- unsigned (*blit)(GLcontext *ctx,
+ unsigned (*blit)(struct gl_context *ctx,
struct radeon_bo *src_bo,
intptr_t src_offset,
gl_format src_mesaformat,
@@ -611,7 +611,7 @@ static INLINE uint32_t radeonPackFloat24(float f)
GLboolean radeonInitContext(radeonContextPtr radeon,
struct dd_function_table* functions,
- const __GLcontextModes * glVisual,
+ const struct gl_config * glVisual,
__DRIcontext * driContextPriv,
void *sharedContextPrivate);
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c b/src/mesa/drivers/dri/radeon/radeon_context.c
index 0b92c514660..cc9590213c4 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -167,7 +167,7 @@ static void r100_vtbl_pre_emit_state(radeonContextPtr radeon)
radeon->hw.is_dirty = 1;
}
-static void r100_vtbl_free_context(GLcontext *ctx)
+static void r100_vtbl_free_context(struct gl_context *ctx)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
_mesa_vector4f_free( &rmesa->tcl.ObjClean );
@@ -206,7 +206,7 @@ static void r100_init_vtbl(radeonContextPtr radeon)
*/
GLboolean
r100CreateContext( gl_api api,
- const __GLcontextModes *glVisual,
+ const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate)
{
@@ -214,7 +214,7 @@ r100CreateContext( gl_api api,
radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
struct dd_function_table functions;
r100ContextPtr rmesa;
- GLcontext *ctx;
+ struct gl_context *ctx;
int i;
int tcl_mode, fthrottle_mode;
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.h b/src/mesa/drivers/dri/radeon/radeon_context.h
index c4bfbfdaeb3..de71aa2c6dd 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.h
+++ b/src/mesa/drivers/dri/radeon/radeon_context.h
@@ -451,7 +451,7 @@ struct r100_context {
#define RADEON_OLD_PACKETS 1
extern GLboolean r100CreateContext( gl_api api,
- const __GLcontextModes *glVisual,
+ const struct gl_config *glVisual,
__DRIcontext *driContextPriv,
void *sharedContextPrivate);
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index 31a45169daf..03d4e9656d7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -133,7 +133,7 @@ void radeonEmitVec16(uint32_t *out, const GLvoid * data, int stride, int count)
}
}
-void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
+void rcommon_emit_vector(struct gl_context * ctx, struct radeon_aos *aos,
const GLvoid * data, int size, int stride, int count)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
@@ -389,7 +389,7 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa)
/* Flush vertices in the current dma region.
*/
-void rcommon_flush_last_swtcl_prim( GLcontext *ctx )
+void rcommon_flush_last_swtcl_prim( struct gl_context *ctx )
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
struct radeon_dma *dma = &rmesa->dma;
@@ -462,7 +462,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize )
return head;
}
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
+void radeonReleaseArrays( struct gl_context *ctx, GLuint newinputs )
{
radeonContextPtr radeon = RADEON_CONTEXT( ctx );
int i;
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.h b/src/mesa/drivers/dri/radeon/radeon_dma.h
index 74e653fd189..ad6a3b8baab 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.h
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.h
@@ -38,7 +38,7 @@ void radeonEmitVec8(uint32_t *out, const GLvoid * data, int stride, int count);
void radeonEmitVec12(uint32_t *out, const GLvoid * data, int stride, int count);
void radeonEmitVec16(uint32_t *out, const GLvoid * data, int stride, int count);
-void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos,
+void rcommon_emit_vector(struct gl_context * ctx, struct radeon_aos *aos,
const GLvoid * data, int size, int stride, int count);
void radeonReturnDmaRegion(radeonContextPtr rmesa, int return_bytes);
@@ -50,9 +50,9 @@ void radeonAllocDmaRegion(radeonContextPtr rmesa,
int bytes, int alignment);
void radeonReleaseDmaRegions(radeonContextPtr rmesa);
-void rcommon_flush_last_swtcl_prim(GLcontext *ctx);
+void rcommon_flush_last_swtcl_prim(struct gl_context *ctx);
void *rcommonAllocDmaLowVerts(radeonContextPtr rmesa, int nverts, int vsize);
void radeonFreeDmaRegions(radeonContextPtr rmesa);
-void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs );
+void radeonReleaseArrays( struct gl_context *ctx, GLuint newinputs );
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 0597d4250de..2a6fbaeaf09 100644
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -47,7 +47,7 @@
} while(0)
static struct gl_framebuffer *
-radeon_new_framebuffer(GLcontext *ctx, GLuint name)
+radeon_new_framebuffer(struct gl_context *ctx, GLuint name)
{
return _mesa_new_framebuffer(ctx, name);
}
@@ -70,7 +70,7 @@ radeon_delete_renderbuffer(struct gl_renderbuffer *rb)
}
static void *
-radeon_get_pointer(GLcontext *ctx, struct gl_renderbuffer *rb,
+radeon_get_pointer(struct gl_context *ctx, struct gl_renderbuffer *rb,
GLint x, GLint y)
{
radeon_print(RADEON_TEXTURE, RADEON_TRACE,
@@ -85,7 +85,7 @@ radeon_get_pointer(GLcontext *ctx, struct gl_renderbuffer *rb,
* storage for a user-created renderbuffer.
*/
static GLboolean
-radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+radeon_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
GLenum internalFormat,
GLuint width, GLuint height)
{
@@ -206,7 +206,7 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
* Not used for user-created renderbuffers!
*/
static GLboolean
-radeon_alloc_window_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+radeon_alloc_window_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
GLenum internalFormat, GLuint width, GLuint height)
{
ASSERT(rb->Name == 0);
@@ -223,7 +223,7 @@ radeon_alloc_window_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
static void
-radeon_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb,
+radeon_resize_buffers(struct gl_context *ctx, struct gl_framebuffer *fb,
GLuint width, GLuint height)
{
struct radeon_framebuffer *radeon_fb = (struct radeon_framebuffer*)fb;
@@ -255,7 +255,7 @@ radeon_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb,
/** Dummy function for gl_renderbuffer::AllocStorage() */
static GLboolean
-radeon_nop_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
+radeon_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb,
GLenum internalFormat, GLuint width, GLuint height)
{
_mesa_problem(ctx, "radeon_op_alloc_storage should never be called.");
@@ -352,7 +352,7 @@ radeon_create_renderbuffer(gl_format format, __DRIdrawable *driDrawPriv)
}
static struct gl_renderbuffer *
-radeon_new_renderbuffer(GLcontext * ctx, GLuint name)
+radeon_new_renderbuffer(struct gl_context * ctx, GLuint name)
{
struct radeon_renderbuffer *rrb;
@@ -376,7 +376,7 @@ radeon_new_renderbuffer(GLcontext * ctx, GLuint name)
}
static void
-radeon_bind_framebuffer(GLcontext * ctx, GLenum target,
+radeon_bind_framebuffer(struct gl_context * ctx, GLenum target,
struct gl_framebuffer *fb, struct gl_framebuffer *fbread)
{
radeon_print(RADEON_TEXTURE, RADEON_TRACE,
@@ -393,7 +393,7 @@ radeon_bind_framebuffer(GLcontext * ctx, GLenum target,
}
static void
-radeon_framebuffer_renderbuffer(GLcontext * ctx,
+radeon_framebuffer_renderbuffer(struct gl_context * ctx,
struct gl_framebuffer *fb,
GLenum attachment, struct gl_renderbuffer *rb)
{
@@ -410,7 +410,7 @@ radeon_framebuffer_renderbuffer(GLcontext * ctx,
}
static GLboolean
-radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb,
+radeon_update_wrapper(struct gl_context *ctx, struct radeon_renderbuffer *rrb,
struct gl_texture_image *texImage)
{
radeon_print(RADEON_TEXTURE, RADEON_TRACE,
@@ -459,7 +459,7 @@ radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb,
static struct radeon_renderbuffer *
-radeon_wrap_texture(GLcontext * ctx, struct gl_texture_image *texImage)
+radeon_wrap_texture(struct gl_context * ctx, struct gl_texture_image *texImage)
{
const GLuint name = ~0; /* not significant, but distinct for debugging */
struct radeon_renderbuffer *rrb;
@@ -488,7 +488,7 @@ radeon_wrap_texture(GLcontext * ctx, struct gl_texture_image *texImage)
}
static void
-radeon_render_texture(GLcontext * ctx,
+radeon_render_texture(struct gl_context * ctx,
struct gl_framebuffer *fb,
struct gl_renderbuffer_attachment *att)
{
@@ -568,13 +568,13 @@ radeon_render_texture(GLcontext * ctx,
}
static void
-radeon_finish_render_texture(GLcontext * ctx,
+radeon_finish_render_texture(struct gl_context * ctx,
struct gl_renderbuffer_attachment *att)
{
}
static void
-radeon_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
+radeon_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
gl_format mesa_format;
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index d08a82f1a55..a91d8727792 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -178,7 +178,7 @@ extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
#endif
}
-void radeonFlushElts( GLcontext *ctx )
+void radeonFlushElts( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
BATCH_LOCALS(&rmesa->radeon);
@@ -432,7 +432,7 @@ void radeonEmitAOS( r100ContextPtr rmesa,
*/
#define RADEON_MAX_CLEARS 256
-static void radeonKernelClear(GLcontext *ctx, GLuint flags)
+static void radeonKernelClear(struct gl_context *ctx, GLuint flags)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
@@ -555,7 +555,7 @@ static void radeonKernelClear(GLcontext *ctx, GLuint flags)
UNLOCK_HARDWARE( &rmesa->radeon );
}
-static void radeonClear( GLcontext *ctx, GLbitfield mask )
+static void radeonClear( struct gl_context *ctx, GLbitfield mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
@@ -629,7 +629,7 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask )
}
}
-void radeonInitIoctlFuncs( GLcontext *ctx )
+void radeonInitIoctlFuncs( struct gl_context *ctx )
{
ctx->Driver.Clear = radeonClear;
ctx->Driver.Finish = radeonFinish;
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.h b/src/mesa/drivers/dri/radeon/radeon_ioctl.h
index deb53ae3138..790205719b6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.h
@@ -50,7 +50,7 @@ extern void radeonEmitVbufPrim( r100ContextPtr rmesa,
GLuint primitive,
GLuint vertex_nr );
-extern void radeonFlushElts( GLcontext *ctx );
+extern void radeonFlushElts( struct gl_context *ctx );
extern GLushort *radeonAllocEltsOpenEnded( r100ContextPtr rmesa,
@@ -77,9 +77,9 @@ extern void radeonEmitWait( r100ContextPtr rmesa, GLuint flags );
extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
-extern void radeonFlush( GLcontext *ctx );
-extern void radeonFinish( GLcontext *ctx );
-extern void radeonInitIoctlFuncs( GLcontext *ctx );
+extern void radeonFlush( struct gl_context *ctx );
+extern void radeonFinish( struct gl_context *ctx );
+extern void radeonInitIoctlFuncs( struct gl_context *ctx );
extern void radeonGetAllParams( r100ContextPtr rmesa );
extern void radeonSetUpAtomList( r100ContextPtr rmesa );
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos.h b/src/mesa/drivers/dri/radeon/radeon_maos.h
index b88eb198d57..0feea358151 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos.h
@@ -37,6 +37,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_context.h"
-extern void radeonEmitArrays( GLcontext *ctx, GLuint inputs );
+extern void radeonEmitArrays( struct gl_context *ctx, GLuint inputs );
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
index d810e6080eb..94fe7e4b9f5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c
@@ -48,7 +48,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_maos.h"
#include "radeon_tcl.h"
-static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
+static void emit_vecfog(struct gl_context *ctx, struct radeon_aos *aos,
GLvoid *data, int stride, int count)
{
int i;
@@ -121,7 +121,7 @@ static void emit_stq_vec(uint32_t *out, GLvoid *data, int stride, int count)
-static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
+static void emit_tex_vector(struct gl_context *ctx, struct radeon_aos *aos,
GLvoid *data, int size, int stride, int count)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
@@ -182,7 +182,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
/* Emit any changed arrays to new GART memory, re-emit a packet to
* update the arrays.
*/
-void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
+void radeonEmitArrays( struct gl_context *ctx, GLuint inputs )
{
r100ContextPtr rmesa = R100_CONTEXT( ctx );
struct vertex_buffer *VB = &TNL_CONTEXT( ctx )->vb;
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
index d764ccb9826..b73fc8abfe2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h
@@ -34,7 +34,7 @@
#define TCL_DEBUG 0
#endif
-static void TAG(emit)( GLcontext *ctx,
+static void TAG(emit)( struct gl_context *ctx,
GLuint start, GLuint end,
void *dest )
{
diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
index ad3bc2d23db..5dac2a362b2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
+++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c
@@ -54,7 +54,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
union emit_union { float f; GLuint ui; radeon_color_t rgba; };
static struct {
- void (*emit)( GLcontext *, GLuint, GLuint, void * );
+ void (*emit)( struct gl_context *, GLuint, GLuint, void * );
GLuint vertex_size;
GLuint vertex_format;
} setup_tab[RADEON_TCL_MAX_SETUP];
@@ -307,7 +307,7 @@ static void init_tcl_verts( void )
}
-void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
+void radeonEmitArrays( struct gl_context *ctx, GLuint inputs )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index ddfde3edaf7..1fadad2756b 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -578,7 +578,7 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj,
* If individual images are stored in different mipmap trees
* use the mipmap tree that has the most of the correct data.
*/
-int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj)
+int radeon_validate_texture_miptree(struct gl_context * ctx, struct gl_texture_object *texObj)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
radeonTexObj *t = radeon_tex_obj(texObj);
diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
index 216eb932db0..e44d6f2f8f7 100644
--- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
+++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c
@@ -86,7 +86,7 @@ static gl_format gl_format_and_type_to_mesa_format(GLenum format, GLenum type)
}
static GLboolean
-do_blit_readpixels(GLcontext * ctx,
+do_blit_readpixels(struct gl_context * ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
@@ -194,7 +194,7 @@ do_blit_readpixels(GLcontext * ctx,
}
void
-radeonReadPixels(GLcontext * ctx,
+radeonReadPixels(struct gl_context * ctx,
GLint x, GLint y, GLsizei width, GLsizei height,
GLenum format, GLenum type,
const struct gl_pixelstore_attrib *pack, GLvoid * pixels)
diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.c b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
index 5b7178bcca2..a45ca7cad0d 100644
--- a/src/mesa/drivers/dri/radeon/radeon_queryobj.c
+++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.c
@@ -33,7 +33,7 @@
#include <inttypes.h>
-static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
+static void radeonQueryGetResult(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
@@ -79,7 +79,7 @@ static void radeonQueryGetResult(GLcontext *ctx, struct gl_query_object *q)
radeon_bo_unmap(query->bo);
}
-static struct gl_query_object * radeonNewQueryObject(GLcontext *ctx, GLuint id)
+static struct gl_query_object * radeonNewQueryObject(struct gl_context *ctx, GLuint id)
{
struct radeon_query_object *query;
@@ -95,7 +95,7 @@ static struct gl_query_object * radeonNewQueryObject(GLcontext *ctx, GLuint id)
return &query->Base;
}
-static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonDeleteQuery(struct gl_context *ctx, struct gl_query_object *q)
{
struct radeon_query_object *query = (struct radeon_query_object *)q;
@@ -108,7 +108,7 @@ static void radeonDeleteQuery(GLcontext *ctx, struct gl_query_object *q)
free(query);
}
-static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonWaitQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
@@ -125,7 +125,7 @@ static void radeonWaitQuery(GLcontext *ctx, struct gl_query_object *q)
}
-static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonBeginQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = (struct radeon_query_object *)q;
@@ -148,7 +148,7 @@ static void radeonBeginQuery(GLcontext *ctx, struct gl_query_object *q)
radeon->hw.is_dirty = GL_TRUE;
}
-void radeonEmitQueryEnd(GLcontext *ctx)
+void radeonEmitQueryEnd(struct gl_context *ctx)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = radeon->query.current;
@@ -168,7 +168,7 @@ void radeonEmitQueryEnd(GLcontext *ctx)
radeon->vtbl.emit_query_finish(radeon);
}
-static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonEndQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
@@ -181,7 +181,7 @@ static void radeonEndQuery(GLcontext *ctx, struct gl_query_object *q)
radeon->query.current = NULL;
}
-static void radeonCheckQuery(GLcontext *ctx, struct gl_query_object *q)
+static void radeonCheckQuery(struct gl_context *ctx, struct gl_query_object *q)
{
radeon_print(RADEON_STATE, RADEON_TRACE, "%s: query id %d\n", __FUNCTION__, q->Id);
@@ -219,7 +219,7 @@ void radeonInitQueryObjFunctions(struct dd_function_table *functions)
functions->WaitQuery = radeonWaitQuery;
}
-int radeon_check_query_active(GLcontext *ctx, struct radeon_state_atom *atom)
+int radeon_check_query_active(struct gl_context *ctx, struct radeon_state_atom *atom)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
struct radeon_query_object *query = radeon->query.current;
@@ -229,7 +229,7 @@ int radeon_check_query_active(GLcontext *ctx, struct radeon_state_atom *atom)
return atom->cmd_size;
}
-void radeon_emit_queryobj(GLcontext *ctx, struct radeon_state_atom *atom)
+void radeon_emit_queryobj(struct gl_context *ctx, struct radeon_state_atom *atom)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
BATCH_LOCALS(radeon);
diff --git a/src/mesa/drivers/dri/radeon/radeon_queryobj.h b/src/mesa/drivers/dri/radeon/radeon_queryobj.h
index 19374dc76b7..e5063934824 100644
--- a/src/mesa/drivers/dri/radeon/radeon_queryobj.h
+++ b/src/mesa/drivers/dri/radeon/radeon_queryobj.h
@@ -29,15 +29,15 @@
#include "main/simple_list.h"
#include "radeon_common_context.h"
-extern void radeonEmitQueryBegin(GLcontext *ctx);
-extern void radeonEmitQueryEnd(GLcontext *ctx);
+extern void radeonEmitQueryBegin(struct gl_context *ctx);
+extern void radeonEmitQueryEnd(struct gl_context *ctx);
extern void radeonInitQueryObjFunctions(struct dd_function_table *functions);
#define RADEON_QUERY_PAGE_SIZE 4096
-int radeon_check_query_active(GLcontext *ctx, struct radeon_state_atom *atom);
-void radeon_emit_queryobj(GLcontext *ctx, struct radeon_state_atom *atom);
+int radeon_check_query_active(struct gl_context *ctx, struct radeon_state_atom *atom);
+void radeon_emit_queryobj(struct gl_context *ctx, struct radeon_state_atom *atom);
static inline void radeon_init_query_stateobj(radeonContextPtr radeon, int SZ)
{
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 2ea77e56c7e..43ebc810939 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -258,7 +258,7 @@ radeonFillInModes( __DRIscreen *psp,
unsigned stencil_bits, GLboolean have_back_buffer )
{
__DRIconfig **configs;
- __GLcontextModes *m;
+ struct gl_config *m;
unsigned depth_buffer_factor;
unsigned back_buffer_factor;
int i;
@@ -1583,7 +1583,7 @@ radeonInitDriver( __DRIscreen *sPriv )
static GLboolean
radeonCreateBuffer( __DRIscreen *driScrnPriv,
__DRIdrawable *driDrawPriv,
- const __GLcontextModes *mesaVis,
+ const struct gl_config *mesaVis,
GLboolean isPixmap )
{
radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private;
@@ -1691,7 +1691,7 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
if (!rfb)
return;
radeon_cleanup_renderbuffers(rfb);
- _mesa_reference_framebuffer((GLframebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
+ _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
}
@@ -1700,7 +1700,7 @@ radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
*
* \todo maybe fold this into intelInitDriver
*
- * \return the __GLcontextModes supported by this driver
+ * \return the struct gl_config supported by this driver
*/
static const __DRIconfig **
radeonInitScreen(__DRIscreen *psp)
@@ -1750,7 +1750,7 @@ radeonInitScreen(__DRIscreen *psp)
* This is the driver specific part of the createNewScreen entry point.
* Called when using DRI2.
*
- * \return the __GLcontextModes supported by this driver
+ * \return the struct gl_config supported by this driver
*/
static const
__DRIconfig **radeonInitScreen2(__DRIscreen *psp)
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 9dfe2dd2433..1c5326fe9dc 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -1015,7 +1015,7 @@ static void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
}
static void
-radeon_map_unmap_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb,
+radeon_map_unmap_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb,
GLboolean map)
{
GLuint i, j;
@@ -1060,7 +1060,7 @@ radeon_map_unmap_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb,
radeon_check_front_buffer_rendering(ctx);
}
-static void radeonSpanRenderStart(GLcontext * ctx)
+static void radeonSpanRenderStart(struct gl_context * ctx)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
int i;
@@ -1087,7 +1087,7 @@ static void radeonSpanRenderStart(GLcontext * ctx)
radeon_map_unmap_framebuffer(ctx, ctx->ReadBuffer, GL_TRUE);
}
-static void radeonSpanRenderFinish(GLcontext * ctx)
+static void radeonSpanRenderFinish(struct gl_context * ctx)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
int i;
@@ -1108,7 +1108,7 @@ static void radeonSpanRenderFinish(GLcontext * ctx)
}
}
-void radeonInitSpanFuncs(GLcontext * ctx)
+void radeonInitSpanFuncs(struct gl_context * ctx)
{
struct swrast_device_driver *swdd =
_swrast_GetDeviceDriverReference(ctx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_span.h b/src/mesa/drivers/dri/radeon/radeon_span.h
index ea6a2e7fb4e..64517b59237 100644
--- a/src/mesa/drivers/dri/radeon/radeon_span.h
+++ b/src/mesa/drivers/dri/radeon/radeon_span.h
@@ -42,6 +42,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifndef __RADEON_SPAN_H__
#define __RADEON_SPAN_H__
-extern void radeonInitSpanFuncs(GLcontext * ctx);
+extern void radeonInitSpanFuncs(struct gl_context * ctx);
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c
index 539b067742f..cae12f192c3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state.c
@@ -55,13 +55,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_tex.h"
#include "radeon_swtcl.h"
-static void radeonUpdateSpecular( GLcontext *ctx );
+static void radeonUpdateSpecular( struct gl_context *ctx );
/* =============================================================
* Alpha blending
*/
-static void radeonAlphaFunc( GLcontext *ctx, GLenum func, GLfloat ref )
+static void radeonAlphaFunc( struct gl_context *ctx, GLenum func, GLfloat ref )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC];
@@ -104,7 +104,7 @@ static void radeonAlphaFunc( GLcontext *ctx, GLenum func, GLfloat ref )
rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc;
}
-static void radeonBlendEquationSeparate( GLcontext *ctx,
+static void radeonBlendEquationSeparate( struct gl_context *ctx,
GLenum modeRGB, GLenum modeA )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -144,7 +144,7 @@ static void radeonBlendEquationSeparate( GLcontext *ctx,
}
}
-static void radeonBlendFuncSeparate( GLcontext *ctx,
+static void radeonBlendFuncSeparate( struct gl_context *ctx,
GLenum sfactorRGB, GLenum dfactorRGB,
GLenum sfactorA, GLenum dfactorA )
{
@@ -256,7 +256,7 @@ static void radeonBlendFuncSeparate( GLcontext *ctx,
* Depth testing
*/
-static void radeonDepthFunc( GLcontext *ctx, GLenum func )
+static void radeonDepthFunc( struct gl_context *ctx, GLenum func )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -292,7 +292,7 @@ static void radeonDepthFunc( GLcontext *ctx, GLenum func )
}
-static void radeonDepthMask( GLcontext *ctx, GLboolean flag )
+static void radeonDepthMask( struct gl_context *ctx, GLboolean flag )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
RADEON_STATECHANGE( rmesa, ctx );
@@ -304,7 +304,7 @@ static void radeonDepthMask( GLcontext *ctx, GLboolean flag )
}
}
-static void radeonClearDepth( GLcontext *ctx, GLclampd d )
+static void radeonClearDepth( struct gl_context *ctx, GLclampd d )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint format = (rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &
@@ -326,7 +326,7 @@ static void radeonClearDepth( GLcontext *ctx, GLclampd d )
*/
-static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
+static void radeonFogfv( struct gl_context *ctx, GLenum pname, const GLfloat *param )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
union { int i; float f; } c, d;
@@ -411,7 +411,7 @@ static void radeonFogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
* Culling
*/
-static void radeonCullFace( GLcontext *ctx, GLenum unused )
+static void radeonCullFace( struct gl_context *ctx, GLenum unused )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL];
@@ -448,7 +448,7 @@ static void radeonCullFace( GLcontext *ctx, GLenum unused )
}
}
-static void radeonFrontFace( GLcontext *ctx, GLenum mode )
+static void radeonFrontFace( struct gl_context *ctx, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -477,7 +477,7 @@ static void radeonFrontFace( GLcontext *ctx, GLenum mode )
/* =============================================================
* Line state
*/
-static void radeonLineWidth( GLcontext *ctx, GLfloat widthf )
+static void radeonLineWidth( struct gl_context *ctx, GLfloat widthf )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -494,7 +494,7 @@ static void radeonLineWidth( GLcontext *ctx, GLfloat widthf )
}
}
-static void radeonLineStipple( GLcontext *ctx, GLint factor, GLushort pattern )
+static void radeonLineStipple( struct gl_context *ctx, GLint factor, GLushort pattern )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -507,7 +507,7 @@ static void radeonLineStipple( GLcontext *ctx, GLint factor, GLushort pattern )
/* =============================================================
* Masks
*/
-static void radeonColorMask( GLcontext *ctx,
+static void radeonColorMask( struct gl_context *ctx,
GLboolean r, GLboolean g,
GLboolean b, GLboolean a )
{
@@ -536,7 +536,7 @@ static void radeonColorMask( GLcontext *ctx,
* Polygon state
*/
-static void radeonPolygonOffset( GLcontext *ctx,
+static void radeonPolygonOffset( struct gl_context *ctx,
GLfloat factor, GLfloat units )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -549,7 +549,7 @@ static void radeonPolygonOffset( GLcontext *ctx,
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
}
-static void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
+static void radeonPolygonStipplePreKMS( struct gl_context *ctx, const GLubyte *mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint i;
@@ -574,7 +574,7 @@ static void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
UNLOCK_HARDWARE( &rmesa->radeon );
}
-static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
+static void radeonPolygonMode( struct gl_context *ctx, GLenum face, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLboolean flag = (ctx->_TriangleCaps & DD_TRI_UNFILLED) != 0;
@@ -601,7 +601,7 @@ static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
/* Examine lighting and texture state to determine if separate specular
* should be enabled.
*/
-static void radeonUpdateSpecular( GLcontext *ctx )
+static void radeonUpdateSpecular( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL];
@@ -689,7 +689,7 @@ static void radeonUpdateSpecular( GLcontext *ctx )
/* Update on colormaterial, material emmissive/ambient,
* lightmodel.globalambient
*/
-static void update_global_ambient( GLcontext *ctx )
+static void update_global_ambient( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
float *fcmd = (float *)RADEON_DB_STATE( glt );
@@ -719,7 +719,7 @@ static void update_global_ambient( GLcontext *ctx )
* - light[p].colors
* - light[p].enabled
*/
-static void update_light_colors( GLcontext *ctx, GLuint p )
+static void update_light_colors( struct gl_context *ctx, GLuint p )
{
struct gl_light *l = &ctx->Light.Light[p];
@@ -739,7 +739,7 @@ static void update_light_colors( GLcontext *ctx, GLuint p )
/* Also fallback for asym colormaterial mode in twoside lighting...
*/
-static void check_twoside_fallback( GLcontext *ctx )
+static void check_twoside_fallback( struct gl_context *ctx )
{
GLboolean fallback = GL_FALSE;
GLint i;
@@ -764,7 +764,7 @@ static void check_twoside_fallback( GLcontext *ctx )
}
-static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
+static void radeonColorMaterial( struct gl_context *ctx, GLenum face, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint light_model_ctl1 = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL];
@@ -828,7 +828,7 @@ static void radeonColorMaterial( GLcontext *ctx, GLenum face, GLenum mode )
}
}
-void radeonUpdateMaterial( GLcontext *ctx )
+void radeonUpdateMaterial( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLfloat (*mat)[4] = ctx->Light.Material.Attrib;
@@ -893,7 +893,7 @@ void radeonUpdateMaterial( GLcontext *ctx )
* lighting space (model or eye), hence dependencies on _NEW_MODELVIEW
* and _MESA_NEW_NEED_EYE_COORDS.
*/
-static void update_light( GLcontext *ctx )
+static void update_light( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -957,7 +957,7 @@ static void update_light( GLcontext *ctx )
}
}
-static void radeonLightfv( GLcontext *ctx, GLenum light,
+static void radeonLightfv( struct gl_context *ctx, GLenum light,
GLenum pname, const GLfloat *params )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1078,7 +1078,7 @@ static void radeonLightfv( GLcontext *ctx, GLenum light,
-static void radeonLightModelfv( GLcontext *ctx, GLenum pname,
+static void radeonLightModelfv( struct gl_context *ctx, GLenum pname,
const GLfloat *param )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1120,7 +1120,7 @@ static void radeonLightModelfv( GLcontext *ctx, GLenum pname,
}
}
-static void radeonShadeModel( GLcontext *ctx, GLenum mode )
+static void radeonShadeModel( struct gl_context *ctx, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL];
@@ -1158,7 +1158,7 @@ static void radeonShadeModel( GLcontext *ctx, GLenum mode )
* User clip planes
*/
-static void radeonClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
+static void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat *eq )
{
GLint p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1171,7 +1171,7 @@ static void radeonClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
rmesa->hw.ucp[p].cmd[UCP_W] = ip[3];
}
-static void radeonUpdateClipPlanes( GLcontext *ctx )
+static void radeonUpdateClipPlanes( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint p;
@@ -1195,7 +1195,7 @@ static void radeonUpdateClipPlanes( GLcontext *ctx )
*/
static void
-radeonStencilFuncSeparate( GLcontext *ctx, GLenum face, GLenum func,
+radeonStencilFuncSeparate( struct gl_context *ctx, GLenum face, GLenum func,
GLint ref, GLuint mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1240,7 +1240,7 @@ radeonStencilFuncSeparate( GLcontext *ctx, GLenum face, GLenum func,
}
static void
-radeonStencilMaskSeparate( GLcontext *ctx, GLenum face, GLuint mask )
+radeonStencilMaskSeparate( struct gl_context *ctx, GLenum face, GLuint mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1250,7 +1250,7 @@ radeonStencilMaskSeparate( GLcontext *ctx, GLenum face, GLuint mask )
((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT);
}
-static void radeonStencilOpSeparate( GLcontext *ctx, GLenum face, GLenum fail,
+static void radeonStencilOpSeparate( struct gl_context *ctx, GLenum face, GLenum fail,
GLenum zfail, GLenum zpass )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1370,7 +1370,7 @@ static void radeonStencilOpSeparate( GLcontext *ctx, GLenum face, GLenum fail,
}
}
-static void radeonClearStencil( GLcontext *ctx, GLint s )
+static void radeonClearStencil( struct gl_context *ctx, GLint s )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1396,7 +1396,7 @@ static void radeonClearStencil( GLcontext *ctx, GLint s )
* Called when window size or position changes or viewport or depth range
* state is changed. We update the hardware viewport state here.
*/
-void radeonUpdateWindow( GLcontext *ctx )
+void radeonUpdateWindow( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
@@ -1433,7 +1433,7 @@ void radeonUpdateWindow( GLcontext *ctx )
}
-static void radeonViewport( GLcontext *ctx, GLint x, GLint y,
+static void radeonViewport( struct gl_context *ctx, GLint x, GLint y,
GLsizei width, GLsizei height )
{
/* Don't pipeline viewport changes, conflict with window offset
@@ -1445,13 +1445,13 @@ static void radeonViewport( GLcontext *ctx, GLint x, GLint y,
radeon_viewport(ctx, x, y, width, height);
}
-static void radeonDepthRange( GLcontext *ctx, GLclampd nearval,
+static void radeonDepthRange( struct gl_context *ctx, GLclampd nearval,
GLclampd farval )
{
radeonUpdateWindow( ctx );
}
-void radeonUpdateViewportOffset( GLcontext *ctx )
+void radeonUpdateViewportOffset( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
__DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon);
@@ -1507,7 +1507,7 @@ void radeonUpdateViewportOffset( GLcontext *ctx )
* Miscellaneous
*/
-static void radeonClearColor( GLcontext *ctx, const GLfloat color[4] )
+static void radeonClearColor( struct gl_context *ctx, const GLfloat color[4] )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLubyte c[4];
@@ -1526,7 +1526,7 @@ static void radeonClearColor( GLcontext *ctx, const GLfloat color[4] )
}
-static void radeonRenderMode( GLcontext *ctx, GLenum mode )
+static void radeonRenderMode( struct gl_context *ctx, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
FALLBACK( rmesa, RADEON_FALLBACK_RENDER_MODE, (mode != GL_RENDER) );
@@ -1552,7 +1552,7 @@ static GLuint radeon_rop_tab[] = {
RADEON_ROP_SET,
};
-static void radeonLogicOpCode( GLcontext *ctx, GLenum opcode )
+static void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint rop = (GLuint)opcode - GL_CLEAR;
@@ -1567,7 +1567,7 @@ static void radeonLogicOpCode( GLcontext *ctx, GLenum opcode )
* State enable/disable
*/
-static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
+static void radeonEnable( struct gl_context *ctx, GLenum cap, GLboolean state )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint p, flag;
@@ -1860,7 +1860,7 @@ static void radeonEnable( GLcontext *ctx, GLenum cap, GLboolean state )
}
-static void radeonLightingSpaceChange( GLcontext *ctx )
+static void radeonLightingSpaceChange( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLboolean tmp;
@@ -1995,7 +1995,7 @@ static void upload_matrix_t( r100ContextPtr rmesa, GLfloat *src, int idx )
}
-static void update_texturematrix( GLcontext *ctx )
+static void update_texturematrix( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT( ctx );
GLuint tpc = rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL];
@@ -2061,7 +2061,7 @@ static void update_texturematrix( GLcontext *ctx )
}
}
-static GLboolean r100ValidateBuffers(GLcontext *ctx)
+static GLboolean r100ValidateBuffers(struct gl_context *ctx)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct radeon_renderbuffer *rrb;
@@ -2105,7 +2105,7 @@ static GLboolean r100ValidateBuffers(GLcontext *ctx)
return GL_TRUE;
}
-GLboolean radeonValidateState( GLcontext *ctx )
+GLboolean radeonValidateState( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint new_state = rmesa->radeon.NewGLState;
@@ -2163,7 +2163,7 @@ GLboolean radeonValidateState( GLcontext *ctx )
}
-static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
+static void radeonInvalidateState( struct gl_context *ctx, GLuint new_state )
{
_swrast_InvalidateState( ctx, new_state );
_swsetup_InvalidateState( ctx, new_state );
@@ -2176,7 +2176,7 @@ static void radeonInvalidateState( GLcontext *ctx, GLuint new_state )
/* A hack. Need a faster way to find this out.
*/
-static GLboolean check_material( GLcontext *ctx )
+static GLboolean check_material( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
GLint i;
@@ -2192,7 +2192,7 @@ static GLboolean check_material( GLcontext *ctx )
}
-static void radeonWrapRunPipeline( GLcontext *ctx )
+static void radeonWrapRunPipeline( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLboolean has_material;
@@ -2221,7 +2221,7 @@ static void radeonWrapRunPipeline( GLcontext *ctx )
}
}
-static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
+static void radeonPolygonStipple( struct gl_context *ctx, const GLubyte *mask )
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
GLint i;
@@ -2242,7 +2242,7 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
* Many of the ctx->Driver functions might have been initialized to
* software defaults in the earlier _mesa_init_driver_functions() call.
*/
-void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2 )
+void radeonInitStateFuncs( struct gl_context *ctx , GLboolean dri2 )
{
ctx->Driver.UpdateState = radeonInvalidateState;
ctx->Driver.LightingSpaceChange = radeonLightingSpaceChange;
diff --git a/src/mesa/drivers/dri/radeon/radeon_state.h b/src/mesa/drivers/dri/radeon/radeon_state.h
index c780cff0cfb..9a011e11b22 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state.h
+++ b/src/mesa/drivers/dri/radeon/radeon_state.h
@@ -40,20 +40,20 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_context.h"
extern void radeonInitState( r100ContextPtr rmesa );
-extern void radeonInitStateFuncs( GLcontext *ctx , GLboolean dri2);
+extern void radeonInitStateFuncs( struct gl_context *ctx , GLboolean dri2);
-extern void radeonUpdateMaterial( GLcontext *ctx );
+extern void radeonUpdateMaterial( struct gl_context *ctx );
-extern void radeonUpdateViewportOffset( GLcontext *ctx );
-extern void radeonUpdateWindow( GLcontext *ctx );
-extern void radeonUpdateDrawBuffer( GLcontext *ctx );
+extern void radeonUpdateViewportOffset( struct gl_context *ctx );
+extern void radeonUpdateWindow( struct gl_context *ctx );
+extern void radeonUpdateDrawBuffer( struct gl_context *ctx );
extern void radeonUploadTexMatrix( r100ContextPtr rmesa,
int unit, GLboolean swapcols );
-extern GLboolean radeonValidateState( GLcontext *ctx );
+extern GLboolean radeonValidateState( struct gl_context *ctx );
-extern void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode );
+extern void radeonFallback( struct gl_context *ctx, GLuint bit, GLboolean mode );
#define FALLBACK( rmesa, bit, mode ) do { \
if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n", \
__FUNCTION__, bit, mode ); \
diff --git a/src/mesa/drivers/dri/radeon/radeon_state_init.c b/src/mesa/drivers/dri/radeon/radeon_state_init.c
index 91718a47774..698efb145c0 100644
--- a/src/mesa/drivers/dri/radeon/radeon_state_init.c
+++ b/src/mesa/drivers/dri/radeon/radeon_state_init.c
@@ -195,13 +195,13 @@ static int cmdscl( int offset, int stride, int count )
}
#define CHECK( NM, FLAG, ADD ) \
-static int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \
+static int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom ) \
{ \
return FLAG ? atom->cmd_size + (ADD) : 0; \
}
#define TCL_CHECK( NM, FLAG, ADD ) \
-static int check_##NM( GLcontext *ctx, struct radeon_state_atom *atom ) \
+static int check_##NM( struct gl_context *ctx, struct radeon_state_atom *atom ) \
{ \
r100ContextPtr rmesa = R100_CONTEXT(ctx); \
return (!rmesa->radeon.TclFallback && (FLAG)) ? atom->cmd_size + (ADD) : 0; \
@@ -294,7 +294,7 @@ CHECK( txr2, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_RECT_BIT), 0 )
OUT_BATCH_TABLE((data), h.scalars.count); \
} while(0)
-static void scl_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void scl_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -306,7 +306,7 @@ static void scl_emit(GLcontext *ctx, struct radeon_state_atom *atom)
}
-static void vec_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void vec_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -318,7 +318,7 @@ static void vec_emit(GLcontext *ctx, struct radeon_state_atom *atom)
}
-static void lit_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void lit_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -330,7 +330,7 @@ static void lit_emit(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static void ctx_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void ctx_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -395,7 +395,7 @@ static void ctx_emit(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static int check_always_ctx( GLcontext *ctx, struct radeon_state_atom *atom)
+static int check_always_ctx( struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
struct radeon_renderbuffer *rrb, *drb;
@@ -417,7 +417,7 @@ static int check_always_ctx( GLcontext *ctx, struct radeon_state_atom *atom)
return dwords;
}
-static void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
+static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -512,7 +512,7 @@ static void ctx_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void cube_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -540,7 +540,7 @@ static void cube_emit(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
+static void cube_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -576,7 +576,7 @@ static void cube_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom)
+static void tex_emit(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -611,7 +611,7 @@ static void tex_emit(GLcontext *ctx, struct radeon_state_atom *atom)
END_BATCH();
}
-static void tex_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
+static void tex_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
{
r100ContextPtr r100 = R100_CONTEXT(ctx);
BATCH_LOCALS(&r100->radeon);
@@ -666,7 +666,7 @@ static void tex_emit_cs(GLcontext *ctx, struct radeon_state_atom *atom)
*/
void radeonInitState( r100ContextPtr rmesa )
{
- GLcontext *ctx = rmesa->radeon.glCtx;
+ struct gl_context *ctx = rmesa->radeon.glCtx;
GLuint i;
rmesa->radeon.state.color.clear = 0x00000000;
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index 29defe73a70..ff3506b2259 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -87,7 +87,7 @@ static GLuint radeon_cp_vc_frmts[3][2] =
{ RADEON_CP_VC_FRMT_ST2, RADEON_CP_VC_FRMT_ST2 | RADEON_CP_VC_FRMT_Q2 },
};
-static void radeonSetVertexFormat( GLcontext *ctx )
+static void radeonSetVertexFormat( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT( ctx );
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -243,7 +243,7 @@ static void radeon_predict_emit_size( r100ContextPtr rmesa )
}
}
-static void radeonRenderStart( GLcontext *ctx )
+static void radeonRenderStart( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT( ctx );
@@ -260,7 +260,7 @@ static void radeonRenderStart( GLcontext *ctx )
* determine in advance whether or not the hardware can / should do the
* projection divide or Mesa should do it.
*/
-void radeonChooseVertexState( GLcontext *ctx )
+void radeonChooseVertexState( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT( ctx );
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -302,7 +302,7 @@ void radeonChooseVertexState( GLcontext *ctx )
}
}
-void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
+void r100_swtcl_flush(struct gl_context *ctx, uint32_t current_offset)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -398,7 +398,7 @@ static void* radeon_alloc_verts( r100ContextPtr rmesa , GLuint nr, GLuint size )
/**********************************************************************/
-static GLboolean radeon_run_render( GLcontext *ctx,
+static GLboolean radeon_run_render( struct gl_context *ctx,
struct tnl_pipeline_stage *stage )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -412,6 +412,8 @@ static GLboolean radeon_run_render( GLcontext *ctx,
return GL_TRUE;
radeon_prepare_render(&rmesa->radeon);
+ if (rmesa->radeon.NewGLState)
+ radeonValidateState( ctx );
tnl->Driver.Render.Start( ctx );
@@ -467,9 +469,9 @@ static const GLuint reduced_hw_prim[GL_POLYGON+1] = {
RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
};
-static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim );
-static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim );
-static void radeonResetLineStipple( GLcontext *ctx );
+static void radeonRasterPrimitive( struct gl_context *ctx, GLuint hwprim );
+static void radeonRenderPrimitive( struct gl_context *ctx, GLenum prim );
+static void radeonResetLineStipple( struct gl_context *ctx );
/***********************************************************************
@@ -678,7 +680,7 @@ static void init_rast_tab( void )
/* Choose render functions */
/**********************************************************************/
-void radeonChooseRenderState( GLcontext *ctx )
+void radeonChooseRenderState( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -718,7 +720,7 @@ void radeonChooseRenderState( GLcontext *ctx )
/**********************************************************************/
-static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim )
+static void radeonRasterPrimitive( struct gl_context *ctx, GLuint hwprim )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -728,7 +730,7 @@ static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim )
}
}
-static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim )
+static void radeonRenderPrimitive( struct gl_context *ctx, GLenum prim )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
rmesa->radeon.swtcl.render_primitive = prim;
@@ -736,11 +738,11 @@ static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim )
radeonRasterPrimitive( ctx, reduced_hw_prim[prim] );
}
-static void radeonRenderFinish( GLcontext *ctx )
+static void radeonRenderFinish( struct gl_context *ctx )
{
}
-static void radeonResetLineStipple( GLcontext *ctx )
+static void radeonResetLineStipple( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
RADEON_STATECHANGE( rmesa, lin );
@@ -774,7 +776,7 @@ static const char *getFallbackString(GLuint bit)
}
-void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
+void radeonFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -831,7 +833,7 @@ void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
/* Initialization. */
/**********************************************************************/
-void radeonInitSwtcl( GLcontext *ctx )
+void radeonInitSwtcl( struct gl_context *ctx )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
r100ContextPtr rmesa = R100_CONTEXT(ctx);
diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.h b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
index da89158eeb9..ce2aa1e4c36 100644
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.h
@@ -39,28 +39,28 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "swrast/swrast.h"
#include "radeon_context.h"
-extern void radeonInitSwtcl( GLcontext *ctx );
+extern void radeonInitSwtcl( struct gl_context *ctx );
-extern void radeonChooseRenderState( GLcontext *ctx );
-extern void radeonChooseVertexState( GLcontext *ctx );
+extern void radeonChooseRenderState( struct gl_context *ctx );
+extern void radeonChooseVertexState( struct gl_context *ctx );
-extern void radeonCheckTexSizes( GLcontext *ctx );
+extern void radeonCheckTexSizes( struct gl_context *ctx );
-extern void radeonBuildVertices( GLcontext *ctx, GLuint start, GLuint count,
+extern void radeonBuildVertices( struct gl_context *ctx, GLuint start, GLuint count,
GLuint newinputs );
extern void radeonPrintSetupFlags(char *msg, GLuint flags );
-extern void radeon_emit_indexed_verts( GLcontext *ctx,
+extern void radeon_emit_indexed_verts( struct gl_context *ctx,
GLuint start,
GLuint count );
-extern void radeon_translate_vertex( GLcontext *ctx,
+extern void radeon_translate_vertex( struct gl_context *ctx,
const radeonVertex *src,
SWvertex *dst );
-extern void radeon_print_vertex( GLcontext *ctx, const radeonVertex *v );
+extern void radeon_print_vertex( struct gl_context *ctx, const radeonVertex *v );
-extern void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset);
+extern void r100_swtcl_flush(struct gl_context *ctx, uint32_t current_offset);
#endif
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c
index 5e1718f9dfc..5d2e8f4870f 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c
@@ -164,7 +164,7 @@ static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
* discrete and there are no intervening state changes. (Somewhat
* duplicates changes to DrawArrays code)
*/
-static void radeonEmitPrim( GLcontext *ctx,
+static void radeonEmitPrim( struct gl_context *ctx,
GLenum prim,
GLuint hwprim,
GLuint start,
@@ -228,7 +228,7 @@ static void radeonEmitPrim( GLcontext *ctx,
/* External entrypoints */
/**********************************************************************/
-void radeonEmitPrimitive( GLcontext *ctx,
+void radeonEmitPrimitive( struct gl_context *ctx,
GLuint first,
GLuint last,
GLuint flags )
@@ -236,7 +236,7 @@ void radeonEmitPrimitive( GLcontext *ctx,
tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
}
-void radeonEmitEltPrimitive( GLcontext *ctx,
+void radeonEmitEltPrimitive( struct gl_context *ctx,
GLuint first,
GLuint last,
GLuint flags )
@@ -244,7 +244,7 @@ void radeonEmitEltPrimitive( GLcontext *ctx,
tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
}
-void radeonTclPrimitive( GLcontext *ctx,
+void radeonTclPrimitive( struct gl_context *ctx,
GLenum prim,
int hw_prim )
{
@@ -253,6 +253,8 @@ void radeonTclPrimitive( GLcontext *ctx,
GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
radeon_prepare_render(&rmesa->radeon);
+ if (rmesa->radeon.NewGLState)
+ radeonValidateState( ctx );
if (newprim != rmesa->tcl.hw_primitive ||
!discrete_prim[hw_prim&0xf]) {
@@ -326,7 +328,7 @@ radeonInitStaticFogData( void )
* Fog blend factors are in the range [0,1].
*/
float
-radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
+radeonComputeFogBlendFactor( struct gl_context *ctx, GLfloat fogcoord )
{
GLfloat end = ctx->Fog.End;
GLfloat d, temp;
@@ -361,7 +363,7 @@ radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
* Predict total emit size for next rendering operation so there is no flush in middle of rendering
* Prediction has to aim towards the best possible value that is worse than worst case scenario
*/
-static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
+static GLuint radeonEnsureEmitSize( struct gl_context * ctx , GLuint inputs )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -432,7 +434,7 @@ static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
/* TCL render.
*/
-static GLboolean radeon_run_tcl_render( GLcontext *ctx,
+static GLboolean radeon_run_tcl_render( struct gl_context *ctx,
struct tnl_pipeline_stage *stage )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -529,7 +531,7 @@ const struct tnl_pipeline_stage _radeon_tcl_stage =
*/
-static void transition_to_swtnl( GLcontext *ctx )
+static void transition_to_swtnl( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -558,7 +560,7 @@ static void transition_to_swtnl( GLcontext *ctx )
}
-static void transition_to_hwtnl( GLcontext *ctx )
+static void transition_to_hwtnl( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
TNLcontext *tnl = TNL_CONTEXT(ctx);
@@ -618,7 +620,7 @@ static char *getFallbackString(GLuint bit)
-void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
+void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint oldfallback = rmesa->radeon.TclFallback;
diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.h b/src/mesa/drivers/dri/radeon/radeon_tcl.h
index dccbea5fdbd..cf19766b9f2 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tcl.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tcl.h
@@ -38,16 +38,16 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "radeon_context.h"
-extern void radeonTclPrimitive( GLcontext *ctx, GLenum prim, int hw_prim );
-extern void radeonEmitEltPrimitive( GLcontext *ctx, GLuint first, GLuint last,
+extern void radeonTclPrimitive( struct gl_context *ctx, GLenum prim, int hw_prim );
+extern void radeonEmitEltPrimitive( struct gl_context *ctx, GLuint first, GLuint last,
GLuint flags );
-extern void radeonEmitPrimitive( GLcontext *ctx, GLuint first, GLuint last,
+extern void radeonEmitPrimitive( struct gl_context *ctx, GLuint first, GLuint last,
GLuint flags );
-extern void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode );
+extern void radeonTclFallback( struct gl_context *ctx, GLuint bit, GLboolean mode );
extern void radeonInitStaticFogData( void );
-extern float radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord );
+extern float radeonComputeFogBlendFactor( struct gl_context *ctx, GLfloat fogcoord );
#define RADEON_TCL_FALLBACK_RASTER 0x1 /* rasterization */
#define RADEON_TCL_FALLBACK_UNFILLED 0x2 /* unfilled tris */
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.c b/src/mesa/drivers/dri/radeon/radeon_tex.c
index c66e5d17b12..d5285e24cd5 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.c
@@ -253,7 +253,7 @@ static void radeonSetTexBorderColor( radeonTexObjPtr t, const GLfloat color[4] )
#define SCALED_FLOAT_TO_BYTE( x, scale ) \
(((GLuint)((255.0F / scale) * (x))) / 2)
-static void radeonTexEnv( GLcontext *ctx, GLenum target,
+static void radeonTexEnv( struct gl_context *ctx, GLenum target,
GLenum pname, const GLfloat *param )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -316,7 +316,7 @@ static void radeonTexEnv( GLcontext *ctx, GLenum target,
* next UpdateTextureState
*/
-static void radeonTexParameter( GLcontext *ctx, GLenum target,
+static void radeonTexParameter( struct gl_context *ctx, GLenum target,
struct gl_texture_object *texObj,
GLenum pname, const GLfloat *params )
{
@@ -354,7 +354,7 @@ static void radeonTexParameter( GLcontext *ctx, GLenum target,
}
}
-static void radeonDeleteTexture( GLcontext *ctx,
+static void radeonDeleteTexture( struct gl_context *ctx,
struct gl_texture_object *texObj )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -392,7 +392,7 @@ static void radeonDeleteTexture( GLcontext *ctx,
* Basically impossible to do this on the fly - just collect some
* basic info & do the checks from ValidateState().
*/
-static void radeonTexGen( GLcontext *ctx,
+static void radeonTexGen( struct gl_context *ctx,
GLenum coord,
GLenum pname,
const GLfloat *params )
@@ -409,7 +409,7 @@ static void radeonTexGen( GLcontext *ctx,
* texture object from the core mesa gl_texture_object. Not done at this time.
*/
static struct gl_texture_object *
-radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
+radeonNewTextureObject( struct gl_context *ctx, GLuint name, GLenum target )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex.h b/src/mesa/drivers/dri/radeon/radeon_tex.h
index 0113ffd3dac..05729f1e0b6 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex.h
+++ b/src/mesa/drivers/dri/radeon/radeon_tex.h
@@ -45,7 +45,7 @@ extern void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawabl
extern void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format,
__DRIdrawable *dPriv);
-extern void radeonUpdateTextureState( GLcontext *ctx );
+extern void radeonUpdateTextureState( struct gl_context *ctx );
extern int radeonUploadTexImages( r100ContextPtr rmesa, radeonTexObjPtr t,
GLuint face );
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
index 4cb0bb60c85..f14dfa25d40 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c
@@ -37,7 +37,7 @@
#include "radeon_mipmap_tree.h"
static GLboolean
-do_copy_texsubimage(GLcontext *ctx,
+do_copy_texsubimage(struct gl_context *ctx,
GLenum target, GLint level,
struct radeon_tex_obj *tobj,
radeon_texture_image *timg,
@@ -141,7 +141,7 @@ do_copy_texsubimage(GLcontext *ctx,
}
void
-radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
+radeonCopyTexImage2D(struct gl_context *ctx, GLenum target, GLint level,
GLenum internalFormat,
GLint x, GLint y, GLsizei width, GLsizei height,
GLint border)
@@ -196,7 +196,7 @@ fail:
}
void
-radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
+radeonCopyTexSubImage2D(struct gl_context *ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLint x, GLint y,
GLsizei width, GLsizei height)
diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c
index f878b48e5f9..4a73089ce19 100644
--- a/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c
+++ b/src/mesa/drivers/dri/radeon/radeon_tex_getimage.c
@@ -40,7 +40,7 @@
* then unmap it.
*/
static void
-radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
+radeon_get_tex_image(struct gl_context * ctx, GLenum target, GLint level,
GLenum format, GLenum type, GLvoid * pixels,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage, int compressed)
@@ -83,7 +83,7 @@ radeon_get_tex_image(GLcontext * ctx, GLenum target, GLint level,
}
void
-radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
+radeonGetTexImage(struct gl_context * ctx, GLenum target, GLint level,
GLenum format, GLenum type, GLvoid * pixels,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage)
@@ -93,7 +93,7 @@ radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
}
void
-radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
+radeonGetCompressedTexImage(struct gl_context *ctx, GLenum target, GLint level,
GLvoid *pixels,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage)
diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index f852116deeb..dd8ecdd500a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -260,7 +260,7 @@ do { \
* Texture unit state management
*/
-static GLboolean radeonUpdateTextureEnv( GLcontext *ctx, int unit )
+static GLboolean radeonUpdateTextureEnv( struct gl_context *ctx, int unit )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
@@ -885,7 +885,7 @@ static void set_texgen_matrix( r100ContextPtr rmesa,
/* Returns GL_FALSE if fallback required.
*/
-static GLboolean radeon_validate_texgen( GLcontext *ctx, GLuint unit )
+static GLboolean radeon_validate_texgen( struct gl_context *ctx, GLuint unit )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
@@ -1085,7 +1085,7 @@ static GLboolean setup_hardware_state(r100ContextPtr rmesa, radeonTexObj *t, int
return GL_TRUE;
}
-static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_object *texObj, int unit)
+static GLboolean radeon_validate_texture(struct gl_context *ctx, struct gl_texture_object *texObj, int unit)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
radeonTexObj *t = radeon_tex_obj(texObj);
@@ -1128,7 +1128,7 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
return !t->border_fallback;
}
-static GLboolean radeonUpdateTextureUnit( GLcontext *ctx, int unit )
+static GLboolean radeonUpdateTextureUnit( struct gl_context *ctx, int unit )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
@@ -1155,7 +1155,7 @@ static GLboolean radeonUpdateTextureUnit( GLcontext *ctx, int unit )
return GL_TRUE;
}
-void radeonUpdateTextureState( GLcontext *ctx )
+void radeonUpdateTextureState( struct gl_context *ctx )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLboolean ok;
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c
index d1ebd83550d..18ccb512d7a 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.c
@@ -76,7 +76,7 @@ void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
/**
* Allocate an empty texture image object.
*/
-struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx)
+struct gl_texture_image *radeonNewTextureImage(struct gl_context *ctx)
{
return CALLOC(sizeof(radeon_texture_image));
}
@@ -84,7 +84,7 @@ struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx)
/**
* Free memory associated with this texture image.
*/
-void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage)
+void radeonFreeTexImageData(struct gl_context *ctx, struct gl_texture_image *timage)
{
radeon_texture_image* image = get_radeon_texture_image(timage);
@@ -154,7 +154,7 @@ void radeon_teximage_unmap(radeon_texture_image *image)
}
}
-static void map_override(GLcontext *ctx, radeonTexObj *t)
+static void map_override(struct gl_context *ctx, radeonTexObj *t)
{
radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
@@ -163,7 +163,7 @@ static void map_override(GLcontext *ctx, radeonTexObj *t)
img->base.Data = t->bo->ptr;
}
-static void unmap_override(GLcontext *ctx, radeonTexObj *t)
+static void unmap_override(struct gl_context *ctx, radeonTexObj *t)
{
radeon_texture_image *img = get_radeon_texture_image(t->base.Image[0][0]);
@@ -175,7 +175,7 @@ static void unmap_override(GLcontext *ctx, radeonTexObj *t)
/**
* Map a validated texture for reading during software rendering.
*/
-void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
+void radeonMapTexture(struct gl_context *ctx, struct gl_texture_object *texObj)
{
radeonTexObj* t = radeon_tex_obj(texObj);
int face, level;
@@ -213,7 +213,7 @@ void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
}
}
-void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
+void radeonUnmapTexture(struct gl_context *ctx, struct gl_texture_object *texObj)
{
radeonTexObj* t = radeon_tex_obj(texObj);
int face, level;
@@ -241,7 +241,7 @@ void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj)
* This relies on internal details of _mesa_generate_mipmap, in particular
* the fact that the memory for recreated texture images is always freed.
*/
-static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
+static void radeon_generate_mipmap(struct gl_context *ctx, GLenum target,
struct gl_texture_object *texObj)
{
radeonTexObj* t = radeon_tex_obj(texObj);
@@ -273,7 +273,7 @@ static void radeon_generate_mipmap(GLcontext *ctx, GLenum target,
}
-void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj)
+void radeonGenerateMipmap(struct gl_context* ctx, GLenum target, struct gl_texture_object *texObj)
{
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
struct radeon_bo *bo;
@@ -338,7 +338,7 @@ static gl_format radeonChoose8888TexFormat(radeonContextPtr rmesa,
return _dri_texformat_argb8888;
}
-gl_format radeonChooseTextureFormat_mesa(GLcontext * ctx,
+gl_format radeonChooseTextureFormat_mesa(struct gl_context * ctx,
GLint internalFormat,
GLenum format,
GLenum type)
@@ -347,7 +347,7 @@ gl_format radeonChooseTextureFormat_mesa(GLcontext * ctx,
type, 0);
}
-gl_format radeonChooseTextureFormat(GLcontext * ctx,
+gl_format radeonChooseTextureFormat(struct gl_context * ctx,
GLint internalFormat,
GLenum format,
GLenum type, GLboolean fbo)
@@ -641,7 +641,7 @@ static void teximage_assign_miptree(radeonContextPtr rmesa,
"%s Failed to allocate miptree.\n", __func__);
}
-static GLuint * allocate_image_offsets(GLcontext *ctx,
+static GLuint * allocate_image_offsets(struct gl_context *ctx,
unsigned alignedWidth,
unsigned height,
unsigned depth)
@@ -665,7 +665,7 @@ static GLuint * allocate_image_offsets(GLcontext *ctx,
/**
* Update a subregion of the given texture image.
*/
-static void radeon_store_teximage(GLcontext* ctx, int dims,
+static void radeon_store_teximage(struct gl_context* ctx, int dims,
GLint xoffset, GLint yoffset, GLint zoffset,
GLsizei width, GLsizei height, GLsizei depth,
GLsizei imageSize,
@@ -758,7 +758,7 @@ static void radeon_store_teximage(GLcontext* ctx, int dims,
* All glTexImage calls go through this function.
*/
static void radeon_teximage(
- GLcontext *ctx, int dims,
+ struct gl_context *ctx, int dims,
GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint depth,
@@ -833,7 +833,7 @@ static void radeon_teximage(
_mesa_unmap_teximage_pbo(ctx, packing);
}
-void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage1D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint border,
GLenum format, GLenum type, const GLvoid * pixels,
@@ -845,7 +845,7 @@ void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
0, format, type, pixels, packing, texObj, texImage, 0);
}
-void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage2D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid * pixels,
@@ -858,7 +858,7 @@ void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level,
0, format, type, pixels, packing, texObj, texImage, 0);
}
-void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target,
+void radeonCompressedTexImage2D(struct gl_context * ctx, GLenum target,
GLint level, GLint internalFormat,
GLint width, GLint height, GLint border,
GLsizei imageSize, const GLvoid * data,
@@ -869,7 +869,7 @@ void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target,
imageSize, 0, 0, data, &ctx->Unpack, texObj, texImage, 1);
}
-void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage3D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint depth,
GLint border,
@@ -885,7 +885,7 @@ void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
/**
* All glTexSubImage calls go through this function.
*/
-static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int level,
+static void radeon_texsubimage(struct gl_context* ctx, int dims, GLenum target, int level,
GLint xoffset, GLint yoffset, GLint zoffset,
GLsizei width, GLsizei height, GLsizei depth,
GLsizei imageSize,
@@ -939,7 +939,7 @@ static void radeon_texsubimage(GLcontext* ctx, int dims, GLenum target, int leve
_mesa_unmap_teximage_pbo(ctx, packing);
}
-void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage1D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset,
GLsizei width,
GLenum format, GLenum type,
@@ -952,7 +952,7 @@ void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
format, type, pixels, packing, texObj, texImage, 0);
}
-void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage2D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
@@ -966,7 +966,7 @@ void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
0);
}
-void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
+void radeonCompressedTexSubImage2D(struct gl_context * ctx, GLenum target,
GLint level, GLint xoffset,
GLint yoffset, GLsizei width,
GLsizei height, GLenum format,
@@ -979,7 +979,7 @@ void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
}
-void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage3D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset, GLint zoffset,
GLsizei width, GLsizei height, GLsizei depth,
GLenum format, GLenum type,
diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.h b/src/mesa/drivers/dri/radeon/radeon_texture.h
index 4ce639ea34e..9138a7d5548 100644
--- a/src/mesa/drivers/dri/radeon/radeon_texture.h
+++ b/src/mesa/drivers/dri/radeon/radeon_texture.h
@@ -35,47 +35,47 @@
void copy_rows(void* dst, GLuint dststride, const void* src, GLuint srcstride,
GLuint numrows, GLuint rowsize);
-struct gl_texture_image *radeonNewTextureImage(GLcontext *ctx);
-void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage);
+struct gl_texture_image *radeonNewTextureImage(struct gl_context *ctx);
+void radeonFreeTexImageData(struct gl_context *ctx, struct gl_texture_image *timage);
void radeon_teximage_map(radeon_texture_image *image, GLboolean write_enable);
void radeon_teximage_unmap(radeon_texture_image *image);
-void radeonMapTexture(GLcontext *ctx, struct gl_texture_object *texObj);
-void radeonUnmapTexture(GLcontext *ctx, struct gl_texture_object *texObj);
-void radeonGenerateMipmap(GLcontext* ctx, GLenum target, struct gl_texture_object *texObj);
-int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *texObj);
+void radeonMapTexture(struct gl_context *ctx, struct gl_texture_object *texObj);
+void radeonUnmapTexture(struct gl_context *ctx, struct gl_texture_object *texObj);
+void radeonGenerateMipmap(struct gl_context* ctx, GLenum target, struct gl_texture_object *texObj);
+int radeon_validate_texture_miptree(struct gl_context * ctx, struct gl_texture_object *texObj);
-gl_format radeonChooseTextureFormat_mesa(GLcontext * ctx,
+gl_format radeonChooseTextureFormat_mesa(struct gl_context * ctx,
GLint internalFormat,
GLenum format,
GLenum type);
-gl_format radeonChooseTextureFormat(GLcontext * ctx,
+gl_format radeonChooseTextureFormat(struct gl_context * ctx,
GLint internalFormat,
GLenum format,
GLenum type, GLboolean fbo);
-void radeonTexImage1D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage1D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint border,
GLenum format, GLenum type, const GLvoid * pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonTexImage2D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage2D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint border,
GLenum format, GLenum type, const GLvoid * pixels,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonCompressedTexImage2D(GLcontext * ctx, GLenum target,
+void radeonCompressedTexImage2D(struct gl_context * ctx, GLenum target,
GLint level, GLint internalFormat,
GLint width, GLint height, GLint border,
GLsizei imageSize, const GLvoid * data,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexImage3D(struct gl_context * ctx, GLenum target, GLint level,
GLint internalFormat,
GLint width, GLint height, GLint depth,
GLint border,
@@ -83,7 +83,7 @@ void radeonTexImage3D(GLcontext * ctx, GLenum target, GLint level,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage1D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset,
GLsizei width,
GLenum format, GLenum type,
@@ -91,7 +91,7 @@ void radeonTexSubImage1D(GLcontext * ctx, GLenum target, GLint level,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage2D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLsizei width, GLsizei height,
GLenum format, GLenum type,
@@ -99,7 +99,7 @@ void radeonTexSubImage2D(GLcontext * ctx, GLenum target, GLint level,
const struct gl_pixelstore_attrib *packing,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
+void radeonCompressedTexSubImage2D(struct gl_context * ctx, GLenum target,
GLint level, GLint xoffset,
GLint yoffset, GLsizei width,
GLsizei height, GLenum format,
@@ -107,7 +107,7 @@ void radeonCompressedTexSubImage2D(GLcontext * ctx, GLenum target,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
+void radeonTexSubImage3D(struct gl_context * ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset, GLint zoffset,
GLsizei width, GLsizei height, GLsizei depth,
GLenum format, GLenum type,
@@ -116,21 +116,21 @@ void radeonTexSubImage3D(GLcontext * ctx, GLenum target, GLint level,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonGetTexImage(GLcontext * ctx, GLenum target, GLint level,
+void radeonGetTexImage(struct gl_context * ctx, GLenum target, GLint level,
GLenum format, GLenum type, GLvoid * pixels,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonGetCompressedTexImage(GLcontext *ctx, GLenum target, GLint level,
+void radeonGetCompressedTexImage(struct gl_context *ctx, GLenum target, GLint level,
GLvoid *pixels,
struct gl_texture_object *texObj,
struct gl_texture_image *texImage);
-void radeonCopyTexImage2D(GLcontext *ctx, GLenum target, GLint level,
+void radeonCopyTexImage2D(struct gl_context *ctx, GLenum target, GLint level,
GLenum internalFormat,
GLint x, GLint y, GLsizei width, GLsizei height,
GLint border);
-void radeonCopyTexSubImage2D(GLcontext *ctx, GLenum target, GLint level,
+void radeonCopyTexSubImage2D(struct gl_context *ctx, GLenum target, GLint level,
GLint xoffset, GLint yoffset,
GLint x, GLint y,
GLsizei width, GLsizei height);