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-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c12
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c3
2 files changed, 15 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index ad4f29b729d..78779e841d7 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -321,6 +321,9 @@ void r700SetupVTXConstants(GLcontext * ctx,
unsigned int uSQ_VTX_CONSTANT_WORD3_0 = 0;
unsigned int uSQ_VTX_CONSTANT_WORD6_0 = 0;
+ if (!paos->bo)
+ return GL_FALSE;
+
if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV610) ||
(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV620) ||
(context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS780) ||
@@ -594,6 +597,9 @@ GLboolean r700SendPSState(context_t *context)
pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context));
+ if (!pbo)
+ return GL_FALSE;
+
r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
BEGIN_BATCH_NO_AUTOSTATE(3);
@@ -623,6 +629,9 @@ GLboolean r700SendVSState(context_t *context)
pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context));
+ if (!pbo)
+ return GL_FALSE;
+
r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
BEGIN_BATCH_NO_AUTOSTATE(3);
@@ -660,6 +669,9 @@ GLboolean r700SendFSState(context_t *context)
r700->fs.SQ_PGM_CF_OFFSET_FS.u32All = 0;
/* XXX */
+ if (!pbo)
+ return GL_FALSE;
+
r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit);
BEGIN_BATCH_NO_AUTOSTATE(3);
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index 5a1f04f87c2..2592d7df148 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -151,6 +151,9 @@ GLboolean r700SyncSurf(context_t *context,
BATCH_LOCALS(&context->radeon);
uint32_t cp_coher_size;
+ if (!pbo)
+ return GL_FALSE;
+
if (pbo->size == 0xffffffff)
cp_coher_size = 0xffffffff;
else