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-rw-r--r--src/mesa/drivers/dri/r300/r300_context.c4
-rw-r--r--src/mesa/drivers/dri/r300/r300_emit.c11
-rw-r--r--src/mesa/drivers/dri/r300/r300_fragprog.c4
-rw-r--r--src/mesa/drivers/dri/r300/r300_reg.h6
-rw-r--r--src/mesa/drivers/dri/r300/r300_state.c581
-rw-r--r--src/mesa/drivers/dri/r300/r300_swtcl.c75
-rw-r--r--src/mesa/drivers/dri/r300/r300_vertprog.c14
-rw-r--r--src/mesa/drivers/dri/r300/r500_fragprog.c4
-rw-r--r--src/mesa/drivers/dri/r300/radeon_nqssadce.c2
-rw-r--r--src/mesa/drivers/dri/r300/radeon_program_pair.c32
10 files changed, 344 insertions, 389 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 488fd44740c..5bae37e1b1e 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -82,7 +82,7 @@ int hw_tcl_on = 1;
#define need_GL_EXT_blend_equation_separate
#define need_GL_EXT_blend_func_separate
#define need_GL_EXT_blend_minmax
-//#define need_GL_EXT_fog_coord
+#define need_GL_EXT_fog_coord
#define need_GL_EXT_gpu_program_parameters
#define need_GL_EXT_secondary_color
#define need_GL_EXT_stencil_two_side
@@ -110,7 +110,7 @@ const struct dri_extension card_extensions[] = {
{"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
{"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
{"GL_EXT_blend_subtract", NULL},
-// {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
+ {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
{"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
{"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
{"GL_EXT_shadow_funcs", NULL},
diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index 1512e906e89..4bf0e7a1898 100644
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -177,14 +177,23 @@ GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten)
{
- GLuint i, ret = 0;
+ GLuint i, ret = 0, first_free_texcoord = 0;
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
if (OutputsWritten & (1 << (VERT_RESULT_TEX0 + i))) {
ret |= (4 << (3 * i));
+ ++first_free_texcoord;
}
}
+ if (OutputsWritten & (1 << VERT_RESULT_FOGC)) {
+ if (first_free_texcoord > 8) {
+ fprintf(stderr, "\tout of free texcoords to write fog coord\n");
+ _mesa_exit(-1);
+ }
+ ret |= 4 << (3 * first_free_texcoord);
+ }
+
return ret;
}
diff --git a/src/mesa/drivers/dri/r300/r300_fragprog.c b/src/mesa/drivers/dri/r300/r300_fragprog.c
index 8d030c63fb3..32182bb6674 100644
--- a/src/mesa/drivers/dri/r300/r300_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r300_fragprog.c
@@ -356,8 +356,8 @@ static void insert_WPOS_trailer(struct r300_fragment_program_compiler *compiler)
static void nqssadce_init(struct nqssadce_state* s)
{
- s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
- s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
+ s->Outputs[FRAG_RESULT_COLOR].Sourced = WRITEMASK_XYZW;
+ s->Outputs[FRAG_RESULT_DEPTH].Sourced = WRITEMASK_W;
}
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index 5f344be1163..ed552d09bbc 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -1224,6 +1224,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define R500_RS_INST_COL_ADDR_SHIFT 18
#define R500_RS_INST_TEX_ADJ (1 << 25)
#define R500_RS_INST_W_CN (1 << 26)
+#define R500_RS_INST_TEX_ID(x) ((x) << R500_RS_INST_TEX_ID_SHIFT)
+#define R500_RS_INST_TEX_ADDR(x) ((x) << R500_RS_INST_TEX_ADDR_SHIFT)
+#define R500_RS_INST_COL_ID(x) ((x) << R500_RS_INST_COL_ID_SHIFT)
+#define R500_RS_INST_COL_ADDR(x) ((x) << R500_RS_INST_COL_ADDR_SHIFT)
/* These DWORDs control how vertex data is routed into fragment program
* registers, after interpolators.
@@ -1239,9 +1243,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_RS_INST_TEX_ID(x) ((x) << 0)
# define R300_RS_INST_TEX_CN_WRITE (1 << 3)
# define R300_RS_INST_TEX_ADDR_SHIFT 6
+# define R300_RS_INST_TEX_ADDR(x) ((x) << R300_RS_INST_TEX_ADDR_SHIFT)
# define R300_RS_INST_COL_ID(x) ((x) << 11)
# define R300_RS_INST_COL_CN_WRITE (1 << 14)
# define R300_RS_INST_COL_ADDR_SHIFT 17
+# define R300_RS_INST_COL_ADDR(x) ((x) << R300_RS_INST_COL_ADDR_SHIFT)
# define R300_RS_INST_TEX_ADJ (1 << 22)
# define R300_RS_COL_BIAS_UNUSED_SHIFT 23
diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index 17e7b5227ab..f423029ee68 100644
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -728,134 +728,6 @@ static void r300ColorMask(GLcontext * ctx,
}
/* =============================================================
- * Fog
- */
-static void r300Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
-{
- r300ContextPtr r300 = R300_CONTEXT(ctx);
- union {
- int i;
- float f;
- } fogScale, fogStart;
-
- (void)param;
-
- fogScale.i = r300->hw.fogp.cmd[R300_FOGP_SCALE];
- fogStart.i = r300->hw.fogp.cmd[R300_FOGP_START];
-
- switch (pname) {
- case GL_FOG_MODE:
- switch (ctx->Fog.Mode) {
- case GL_LINEAR:
- R300_STATECHANGE(r300, fogs);
- r300->hw.fogs.cmd[R300_FOGS_STATE] =
- (r300->hw.fogs.
- cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
- R300_FG_FOG_BLEND_FN_LINEAR;
-
- if (ctx->Fog.Start == ctx->Fog.End) {
- fogScale.f = -1.0;
- fogStart.f = 1.0;
- } else {
- fogScale.f =
- 1.0 / (ctx->Fog.End - ctx->Fog.Start);
- fogStart.f =
- -ctx->Fog.Start / (ctx->Fog.End -
- ctx->Fog.Start);
- }
- break;
- case GL_EXP:
- R300_STATECHANGE(r300, fogs);
- r300->hw.fogs.cmd[R300_FOGS_STATE] =
- (r300->hw.fogs.
- cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
- R300_FG_FOG_BLEND_FN_EXP;
- fogScale.f = 0.0933 * ctx->Fog.Density;
- fogStart.f = 0.0;
- break;
- case GL_EXP2:
- R300_STATECHANGE(r300, fogs);
- r300->hw.fogs.cmd[R300_FOGS_STATE] =
- (r300->hw.fogs.
- cmd[R300_FOGS_STATE] & ~R300_FG_FOG_BLEND_FN_MASK) |
- R300_FG_FOG_BLEND_FN_EXP2;
- fogScale.f = 0.3 * ctx->Fog.Density;
- fogStart.f = 0.0;
- break;
- default:
- return;
- }
- break;
- case GL_FOG_DENSITY:
- switch (ctx->Fog.Mode) {
- case GL_EXP:
- fogScale.f = 0.0933 * ctx->Fog.Density;
- fogStart.f = 0.0;
- break;
- case GL_EXP2:
- fogScale.f = 0.3 * ctx->Fog.Density;
- fogStart.f = 0.0;
- default:
- break;
- }
- break;
- case GL_FOG_START:
- case GL_FOG_END:
- if (ctx->Fog.Mode == GL_LINEAR) {
- if (ctx->Fog.Start == ctx->Fog.End) {
- fogScale.f = -1.0;
- fogStart.f = 1.0;
- } else {
- fogScale.f =
- 1.0 / (ctx->Fog.End - ctx->Fog.Start);
- fogStart.f =
- -ctx->Fog.Start / (ctx->Fog.End -
- ctx->Fog.Start);
- }
- }
- break;
- case GL_FOG_COLOR:
- R300_STATECHANGE(r300, fogc);
- r300->hw.fogc.cmd[R300_FOGC_R] =
- (GLuint) (ctx->Fog.Color[0] * 1023.0F) & 0x3FF;
- r300->hw.fogc.cmd[R300_FOGC_G] =
- (GLuint) (ctx->Fog.Color[1] * 1023.0F) & 0x3FF;
- r300->hw.fogc.cmd[R300_FOGC_B] =
- (GLuint) (ctx->Fog.Color[2] * 1023.0F) & 0x3FF;
- break;
- case GL_FOG_COORD_SRC:
- break;
- default:
- return;
- }
-
- if (fogScale.i != r300->hw.fogp.cmd[R300_FOGP_SCALE] ||
- fogStart.i != r300->hw.fogp.cmd[R300_FOGP_START]) {
- R300_STATECHANGE(r300, fogp);
- r300->hw.fogp.cmd[R300_FOGP_SCALE] = fogScale.i;
- r300->hw.fogp.cmd[R300_FOGP_START] = fogStart.i;
- }
-}
-
-static void r300SetFogState(GLcontext * ctx, GLboolean state)
-{
- r300ContextPtr r300 = R300_CONTEXT(ctx);
-
- R300_STATECHANGE(r300, fogs);
- if (state) {
- r300->hw.fogs.cmd[R300_FOGS_STATE] |= R300_FG_FOG_BLEND_ENABLE;
-
- r300Fogfv(ctx, GL_FOG_MODE, NULL);
- r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density);
- r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start);
- r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End);
- r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color);
- } else {
- r300->hw.fogs.cmd[R300_FOGS_STATE] &= ~R300_FG_FOG_BLEND_ENABLE;
- }
-}
-
-/* =============================================================
* Point state
*/
static void r300PointSize(GLcontext * ctx, GLfloat size)
@@ -1140,7 +1012,7 @@ r300FetchStateParameter(GLcontext * ctx,
case STATE_R300_TEXRECT_FACTOR:{
struct gl_texture_object *t =
- ctx->Texture.Unit[state[2]].CurrentRect;
+ ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
if (t && t->Image[0][t->BaseLevel]) {
struct gl_texture_image *image =
@@ -1531,18 +1403,14 @@ union r300_outputs_written {
static void r300SetupRSUnit(GLcontext * ctx)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
- /* I'm still unsure if these are needed */
- GLuint interp_col[8];
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
union r300_outputs_written OutputsWritten;
GLuint InputsRead;
int fp_reg, high_rr;
- int col_interp_nr;
- int rs_tex_count = 0, rs_col_count = 0;
- int i, count;
-
- memset(interp_col, 0, sizeof(interp_col));
+ int col_ip, tex_ip;
+ int rs_tex_count = 0;
+ int i, count, col_fmt;
if (hw_tcl_on)
OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
@@ -1560,51 +1428,66 @@ static void r300SetupRSUnit(GLcontext * ctx)
R300_STATECHANGE(r300, rc);
R300_STATECHANGE(r300, rr);
- fp_reg = col_interp_nr = high_rr = 0;
+ fp_reg = col_ip = tex_ip = col_fmt = 0;
- r300->hw.rr.cmd[R300_RR_INST_1] = 0;
-
- if (InputsRead & FRAG_BIT_WPOS) {
- for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
- if (!(InputsRead & (FRAG_BIT_TEX0 << i)))
- break;
+ r300->hw.rc.cmd[1] = 0;
+ r300->hw.rc.cmd[2] = 0;
+ for (i=0; i<R300_RR_CMDSIZE-1; ++i)
+ r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
- if (i == ctx->Const.MaxTextureUnits) {
- fprintf(stderr, "\tno free texcoord found...\n");
- _mesa_exit(-1);
- }
+ for (i=0; i<R300_RI_CMDSIZE-1; ++i)
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
- InputsRead |= (FRAG_BIT_TEX0 << i);
- InputsRead &= ~FRAG_BIT_WPOS;
- }
if (InputsRead & FRAG_BIT_COL0) {
- count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
- interp_col[0] |= R300_RS_COL_PTR(rs_col_count);
- if (count == 3)
- interp_col[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB1);
- rs_col_count += count;
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
+ count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
+ if (count == 4)
+ col_fmt = R300_RS_COL_FMT_RGBA;
+ else if (count == 3)
+ col_fmt = R300_RS_COL_FMT_RGB1;
+ else
+ col_fmt = R300_RS_COL_FMT_0001;
+
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
+ r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_COL0;
+ ++col_ip;
+ ++fp_reg;
+ } else {
+ WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
+ }
}
- else
- interp_col[0] = R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
if (InputsRead & FRAG_BIT_COL1) {
- count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
- if (count == 3)
- interp_col[1] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB0);
- interp_col[1] |= R300_RS_COL_PTR(1);
- rs_col_count += count;
- }
-
- if (InputsRead & FRAG_BIT_FOGC) {
- /* XXX FIX THIS
- * Just turn off the bit for now.
- * Need to do something similar to the color/texcoord inputs.
- */
- InputsRead &= ~FRAG_BIT_FOGC;
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
+ count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
+ if (count == 4)
+ col_fmt = R300_RS_COL_FMT_RGBA;
+ else if (count == 3)
+ col_fmt = R300_RS_COL_FMT_RGB1;
+ else
+ col_fmt = R300_RS_COL_FMT_0001;
+
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
+ r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_COL1;
+ ++col_ip;
+ ++fp_reg;
+ } else {
+ WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
+ }
}
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
+ if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
+ continue;
+
+ if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
+ WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
+ continue;
+ }
+
int swiz;
/* with TCL we always seem to route 4 components */
@@ -1613,7 +1496,6 @@ static void r300SetupRSUnit(GLcontext * ctx)
else
count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
- r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | rs_tex_count;
switch(count) {
case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
@@ -1622,63 +1504,48 @@ static void r300SetupRSUnit(GLcontext * ctx)
case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
};
- r300->hw.ri.cmd[R300_RI_INTERP_0 + i] |= swiz;
-
- r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0;
- if (InputsRead & (FRAG_BIT_TEX0 << i)) {
-
- rs_tex_count += count;
-
- //assert(r300->state.texture.tc_count != 0);
- r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R300_RS_INST_TEX_CN_WRITE | i /* source INTERP */
- | (fp_reg << R300_RS_INST_TEX_ADDR_SHIFT);
- high_rr = fp_reg;
-
- /* Passing invalid data here can lock the GPU. */
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
- InputsRead &= ~(FRAG_BIT_TEX0 << i);
- fp_reg++;
- } else {
- WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
- }
- }
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz | R300_RS_TEX_PTR(rs_tex_count);
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~(FRAG_BIT_TEX0 << i);
+ rs_tex_count += count;
+ ++tex_ip;
+ ++fp_reg;
}
- if (InputsRead & FRAG_BIT_COL0) {
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
- r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
- InputsRead &= ~FRAG_BIT_COL0;
- col_interp_nr++;
+ if (InputsRead & FRAG_BIT_FOGC) {
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_FOGC;
+ rs_tex_count += 4;
+ ++tex_ip;
+ ++fp_reg;
} else {
- WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
+ WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
}
}
- if (InputsRead & FRAG_BIT_COL1) {
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
- r300->hw.rr.cmd[R300_RR_INST_1] |= R300_RS_INST_COL_ID(1) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
- InputsRead &= ~FRAG_BIT_COL1;
- if (high_rr < 1)
- high_rr = 1;
- col_interp_nr++;
- } else {
- WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
- }
+ if (InputsRead & FRAG_BIT_WPOS) {
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_WPOS;
+ rs_tex_count += 4;
+ ++tex_ip;
+ ++fp_reg;
}
+ InputsRead &= ~FRAG_BIT_WPOS;
- /* Need at least one. This might still lock as the values are undefined... */
- if (rs_tex_count == 0 && col_interp_nr == 0) {
- r300->hw.rr.cmd[R300_RR_INST_0] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | (fp_reg++ << R300_RS_INST_COL_ADDR_SHIFT);
- col_interp_nr++;
+ /* Setup default color if no color or tex was set */
+ if (rs_tex_count == 0 && col_ip == 0) {
+ r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ ++col_ip;
}
- r300->hw.rc.cmd[1] = 0 | (rs_tex_count << R300_IT_COUNT_SHIFT)
- | (col_interp_nr << R300_IC_COUNT_SHIFT)
- | R300_HIRES_EN;
+ high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
+ r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
+ r300->hw.rc.cmd[2] |= high_rr - 1;
- assert(high_rr >= 0);
- r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, high_rr + 1);
- r300->hw.rc.cmd[2] = high_rr;
+ r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, high_rr);
if (InputsRead)
WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
@@ -1687,18 +1554,15 @@ static void r300SetupRSUnit(GLcontext * ctx)
static void r500SetupRSUnit(GLcontext * ctx)
{
r300ContextPtr r300 = R300_CONTEXT(ctx);
- /* I'm still unsure if these are needed */
- GLuint interp_col[8];
- union r300_outputs_written OutputsWritten;
TNLcontext *tnl = TNL_CONTEXT(ctx);
struct vertex_buffer *VB = &tnl->vb;
+ union r300_outputs_written OutputsWritten;
GLuint InputsRead;
int fp_reg, high_rr;
- int rs_col_count = 0;
- int in_texcoords, col_interp_nr;
- int i, count;
+ int col_ip, tex_ip;
+ int rs_tex_count = 0;
+ int i, count, col_fmt;
- memset(interp_col, 0, sizeof(interp_col));
if (hw_tcl_on)
OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
else
@@ -1715,130 +1579,151 @@ static void r500SetupRSUnit(GLcontext * ctx)
R300_STATECHANGE(r300, rc);
R300_STATECHANGE(r300, rr);
- fp_reg = col_interp_nr = high_rr = in_texcoords = 0;
-
- r300->hw.rr.cmd[R300_RR_INST_1] = 0;
+ fp_reg = col_ip = tex_ip = col_fmt = 0;
- if (InputsRead & FRAG_BIT_WPOS) {
- for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
- if (!(InputsRead & (FRAG_BIT_TEX0 << i)))
- break;
+ r300->hw.rc.cmd[1] = 0;
+ r300->hw.rc.cmd[2] = 0;
+ for (i=0; i<R300_RR_CMDSIZE-1; ++i)
+ r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
- if (i == ctx->Const.MaxTextureUnits) {
- fprintf(stderr, "\tno free texcoord found...\n");
- _mesa_exit(-1);
- }
+ for (i=0; i<R500_RI_CMDSIZE-1; ++i)
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
- InputsRead |= (FRAG_BIT_TEX0 << i);
- InputsRead &= ~FRAG_BIT_WPOS;
- }
if (InputsRead & FRAG_BIT_COL0) {
- count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
- interp_col[0] |= R500_RS_COL_PTR(rs_col_count);
- if (count == 3)
- interp_col[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB1);
- rs_col_count += count;
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
+ count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
+ if (count == 4)
+ col_fmt = R300_RS_COL_FMT_RGBA;
+ else if (count == 3)
+ col_fmt = R300_RS_COL_FMT_RGB1;
+ else
+ col_fmt = R300_RS_COL_FMT_0001;
+
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
+ r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_COL0;
+ ++col_ip;
+ ++fp_reg;
+ } else {
+ WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
+ }
}
- else
- interp_col[0] = R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
if (InputsRead & FRAG_BIT_COL1) {
- count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
- interp_col[1] |= R500_RS_COL_PTR(1);
- if (count == 3)
- interp_col[1] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB0);
- rs_col_count += count;
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
+ count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
+ if (count == 4)
+ col_fmt = R300_RS_COL_FMT_RGBA;
+ else if (count == 3)
+ col_fmt = R300_RS_COL_FMT_RGB1;
+ else
+ col_fmt = R300_RS_COL_FMT_0001;
+
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
+ r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_COL1;
+ ++col_ip;
+ ++fp_reg;
+ } else {
+ WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
+ }
}
+
for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
- GLuint swiz = 0;
+ if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
+ continue;
- /* with TCL we always seem to route 4 components */
- if (InputsRead & (FRAG_BIT_TEX0 << i)) {
-
- if (hw_tcl_on)
- count = 4;
- else
- count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
-
- /* always have on texcoord */
- swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_S_SHIFT;
- if (count >= 2)
- swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_T_SHIFT;
- else
- swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
-
- if (count >= 3)
- swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_R_SHIFT;
- else
- swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
-
- if (count == 4)
- swiz |= in_texcoords++ << R500_RS_IP_TEX_PTR_Q_SHIFT;
- else
- swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
-
- } else
- swiz = (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT) |
- (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
- (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
- (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
-
- r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = interp_col[i] | swiz;
-
- r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] = 0;
- if (InputsRead & (FRAG_BIT_TEX0 << i)) {
- //assert(r300->state.texture.tc_count != 0);
- r300->hw.rr.cmd[R300_RR_INST_0 + fp_reg] |= R500_RS_INST_TEX_CN_WRITE | i /* source INTERP */
- | (fp_reg << R500_RS_INST_TEX_ADDR_SHIFT);
- high_rr = fp_reg;
-
- /* Passing invalid data here can lock the GPU. */
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
- InputsRead &= ~(FRAG_BIT_TEX0 << i);
- fp_reg++;
- } else {
- WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
- }
+ if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
+ WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
+ continue;
}
- }
- if (InputsRead & FRAG_BIT_COL0) {
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
- r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
- InputsRead &= ~FRAG_BIT_COL0;
- col_interp_nr++;
+ int swiz = 0;
+
+ /* with TCL we always seem to route 4 components */
+ if (hw_tcl_on)
+ count = 4;
+ else
+ count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
+
+ if (count == 4) {
+ swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
+ swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
+ swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
+ swiz |= (rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT;
+ } else if (count == 3) {
+ swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
+ swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
+ swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
+ swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
+ } else if (count == 2) {
+ swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
+ swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
+ swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
+ } else if (count == 1) {
+ swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
+ swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
} else {
- WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT;
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
+ swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
+ swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
}
+
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz;
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~(FRAG_BIT_TEX0 << i);
+ rs_tex_count += count;
+ ++tex_ip;
+ ++fp_reg;
}
- if (InputsRead & FRAG_BIT_COL1) {
- if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
- r300->hw.rr.cmd[R300_RR_INST_1] |= (1 << 12) | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
- InputsRead &= ~FRAG_BIT_COL1;
- if (high_rr < 1)
- high_rr = 1;
- col_interp_nr++;
+ if (InputsRead & FRAG_BIT_FOGC) {
+ if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
+ ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
+ ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
+ ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
+
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_FOGC;
+ rs_tex_count += 4;
+ ++tex_ip;
+ ++fp_reg;
} else {
- WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
+ WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
}
}
- /* Need at least one. This might still lock as the values are undefined... */
- if (in_texcoords == 0 && col_interp_nr == 0) {
- r300->hw.rr.cmd[R300_RR_INST_0] |= 0 | R500_RS_INST_COL_CN_WRITE | (fp_reg++ << R500_RS_INST_COL_ADDR_SHIFT);
- col_interp_nr++;
+ if (InputsRead & FRAG_BIT_WPOS) {
+ r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
+ ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
+ ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
+ ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
+
+ r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
+ InputsRead &= ~FRAG_BIT_WPOS;
+ rs_tex_count += 4;
+ ++tex_ip;
+ ++fp_reg;
}
- r300->hw.rc.cmd[1] = 0 | (in_texcoords << R300_IT_COUNT_SHIFT)
- | (col_interp_nr << R300_IC_COUNT_SHIFT)
- | R300_HIRES_EN;
+ /* Setup default color if no color or tex was set */
+ if (rs_tex_count == 0 && col_ip == 0) {
+ r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
+ ++col_ip;
+ }
+
+ high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
+ r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
+ r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
- assert(high_rr >= 0);
- r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, high_rr + 1);
- r300->hw.rc.cmd[2] = 0xC0 | high_rr;
+ r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, high_rr);
if (InputsRead)
WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
@@ -2078,7 +1963,7 @@ static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
/* empty */
break;
case GL_FOG:
- r300SetFogState(ctx, state);
+ /* empty */
break;
case GL_ALPHA_TEST:
r300SetAlphaState(ctx);
@@ -2149,7 +2034,7 @@ static void r300ResetHwState(r300ContextPtr r300)
r300DepthFunc(ctx, ctx->Depth.Func);
/* stencil */
- r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
+ r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
@@ -2236,11 +2121,9 @@ static void r300ResetHwState(r300ContextPtr r300)
break;
}
- /* XXX: set to 0 when fog is disabled? */
- r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = R300_GB_FOG_SELECT_1_1_W;
-
/* XXX: Enable anti-aliasing? */
r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
+ r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
@@ -2289,17 +2172,11 @@ static void r300ResetHwState(r300ContextPtr r300)
R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
- r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W24;
+ r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
- r300Enable(ctx, GL_FOG, ctx->Fog.Enabled);
- r300Fogfv(ctx, GL_FOG_MODE, NULL);
- r300Fogfv(ctx, GL_FOG_DENSITY, &ctx->Fog.Density);
- r300Fogfv(ctx, GL_FOG_START, &ctx->Fog.Start);
- r300Fogfv(ctx, GL_FOG_END, &ctx->Fog.End);
- r300Fogfv(ctx, GL_FOG_COLOR, ctx->Fog.Color);
- r300Fogfv(ctx, GL_FOG_COORDINATE_SOURCE_EXT, NULL);
-
- r300->hw.fg_depth_src.cmd[1] = 0;
+ /* disable fog unit */
+ r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
+ r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
r300->hw.rb3d_cctl.cmd[1] = 0;
@@ -2524,16 +2401,6 @@ static void r500SetupPixelShader(r300ContextPtr rmesa)
}
code = &fp->code;
- if (fp->mesa_program.FogOption != GL_NONE) {
- /* Enable HW fog. Try not to squish GL context.
- * (Anybody sane remembered to set glFog() opts first!) */
- r300SetFogState(ctx, GL_TRUE);
- ctx->Fog.Mode = fp->mesa_program.FogOption;
- r300Fogfv(ctx, GL_FOG_MODE, NULL);
- } else
- /* Make sure HW is matching GL context. */
- r300SetFogState(ctx, ctx->Fog.Enabled);
-
r300SetupTextures(ctx);
R300_STATECHANGE(rmesa, fp);
@@ -2581,9 +2448,22 @@ void r300UpdateShaderStates(r300ContextPtr rmesa)
r300SetEarlyZState(ctx);
- GLuint fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
- if (current_fragment_program_writes_depth(ctx))
+ /* w_fmt value is set to get best performance
+ * see p.130 R5xx 3D acceleration guide v1.3 */
+ GLuint w_fmt, fgdepthsrc;
+ if (current_fragment_program_writes_depth(ctx)) {
fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
+ w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
+ } else {
+ fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
+ w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
+ }
+
+ if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) {
+ R300_STATECHANGE(rmesa, us_out_fmt);
+ rmesa->hw.us_out_fmt.cmd[5] = w_fmt;
+ }
+
if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
R300_STATECHANGE(rmesa, fg_depth_src);
rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
@@ -2690,7 +2570,6 @@ void r300InitStateFuncs(struct dd_function_table *functions)
functions->DepthFunc = r300DepthFunc;
functions->DepthMask = r300DepthMask;
functions->CullFace = r300CullFace;
- functions->Fogfv = r300Fogfv;
functions->FrontFace = r300FrontFace;
functions->ShadeModel = r300ShadeModel;
functions->LogicOpcode = r300LogicOpcode;
diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c
index 153582ce489..f57516acf41 100644
--- a/src/mesa/drivers/dri/r300/r300_swtcl.c
+++ b/src/mesa/drivers/dri/r300/r300_swtcl.c
@@ -82,14 +82,15 @@ static void r300SetVertexFormat( GLcontext *ctx )
struct vertex_buffer *VB = &tnl->vb;
DECLARE_RENDERINPUTS(index_bitset);
GLuint InputsRead = 0, OutputsWritten = 0;
- int vap_fmt_0 = 0;
+ int vap_fmt_1 = 0;
int offset = 0;
int vte = 0;
+ int fog_id;
GLint inputs[VERT_ATTRIB_MAX];
GLint tab[VERT_ATTRIB_MAX];
int swizzle[VERT_ATTRIB_MAX][4];
GLuint i, nr;
- GLuint sz, vap_fmt_1 = 0;
+ GLuint sz;
DECLARE_RENDERINPUTS(render_inputs_bitset);
RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset);
@@ -125,13 +126,12 @@ static void r300SetVertexFormat( GLcontext *ctx )
offset = 4;
EMIT_PAD(4 * sizeof(float));
}
-
+/*
if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POINTSIZE )) {
EMIT_ATTR( _TNL_ATTRIB_POINTSIZE, EMIT_1F );
- vap_fmt_0 |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
offset += 1;
}
-
+*/
if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_COLOR0)) {
sz = VB->AttribPtr[VERT_ATTRIB_COLOR0]->size;
rmesa->swtcl.coloroffset = offset;
@@ -150,6 +150,33 @@ static void r300SetVertexFormat( GLcontext *ctx )
OutputsWritten |= 1 << VERT_RESULT_COL1;
}
+ fog_id = -1;
+ if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_FOG)) {
+ /* find first free tex coord slot */
+ if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
+ int i;
+ for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
+ if (!RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
+ fog_id = i;
+ break;
+ }
+ }
+ } else {
+ fog_id = 0;
+ }
+
+ if (fog_id == -1) {
+ fprintf(stderr, "\tout of free texcoords to do fog\n");
+ _mesa_exit(-1);
+ }
+
+ sz = VB->AttribPtr[VERT_ATTRIB_FOG]->size;
+ EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1F + sz - 1);
+ InputsRead |= 1 << VERT_ATTRIB_FOG;
+ OutputsWritten |= 1 << VERT_RESULT_FOGC;
+ vap_fmt_1 |= sz << (3 * fog_id);
+ }
+
if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
int i;
@@ -164,6 +191,37 @@ static void r300SetVertexFormat( GLcontext *ctx )
}
}
+ /* RS can't put fragment position on the pixel stack, so stuff it in texcoord if needed */
+ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_POS) && (ctx->FragmentProgram._Current->Base.InputsRead & FRAG_BIT_WPOS)) {
+ int first_free_tex = -1;
+ if (fog_id >= 0) {
+ first_free_tex = fog_id+1;
+ } else {
+ if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
+ int i;
+ for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
+ if (!RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
+ first_free_tex = i;
+ break;
+ }
+ }
+ } else {
+ first_free_tex = 0;
+ }
+ }
+
+ if (first_free_tex == -1) {
+ fprintf(stderr, "\tout of free texcoords to write w pos\n");
+ _mesa_exit(-1);
+ }
+
+ sz = VB->AttribPtr[VERT_ATTRIB_POS]->size;
+ InputsRead |= 1 << (VERT_ATTRIB_TEX0 + first_free_tex);
+ OutputsWritten |= 1 << (VERT_RESULT_TEX0 + first_free_tex);
+ EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_1F + sz - 1 );
+ vap_fmt_1 |= sz << (3 * first_free_tex);
+ }
+
for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) {
if (InputsRead & (1 << i)) {
inputs[i] = nr++;
@@ -179,6 +237,8 @@ static void r300SetVertexFormat( GLcontext *ctx )
inputs[VERT_ATTRIB_COLOR0] = 2;
if (InputsRead & (1 << VERT_ATTRIB_COLOR1))
inputs[VERT_ATTRIB_COLOR1] = 3;
+ if (InputsRead & (1 << VERT_ATTRIB_FOG))
+ inputs[VERT_ATTRIB_FOG] = 6 + fog_id;
for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++)
if (InputsRead & (1 << i))
inputs[i] = 6 + (i - VERT_ATTRIB_TEX0);
@@ -224,6 +284,7 @@ static void r300SetVertexFormat( GLcontext *ctx )
r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
nr);
}
+
R300_STATECHANGE(rmesa, vic);
rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead);
rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead);
@@ -520,9 +581,12 @@ static void r300RenderStart(GLcontext *ctx)
r300UpdateShaderStates(rmesa);
r300EmitCacheFlush(rmesa);
+
+ /* investigate if we can put back flush optimisation if needed */
if (rmesa->radeon.dma.flush != NULL) {
rmesa->radeon.dma.flush(ctx);
}
+
}
static void r300RenderFinish(GLcontext *ctx)
@@ -652,5 +716,4 @@ void r300_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
rmesa->radeon.swtcl.numverts);
r300EmitCacheFlush(rmesa);
COMMIT_BATCH();
-
}
diff --git a/src/mesa/drivers/dri/r300/r300_vertprog.c b/src/mesa/drivers/dri/r300/r300_vertprog.c
index c4e325e6a76..50806575ced 100644
--- a/src/mesa/drivers/dri/r300/r300_vertprog.c
+++ b/src/mesa/drivers/dri/r300/r300_vertprog.c
@@ -126,7 +126,7 @@ static unsigned long t_dst_mask(GLuint mask)
return mask & VSF_FLAG_ALL;
}
-static unsigned long t_dst_class(enum register_file file)
+static unsigned long t_dst_class(gl_register_file file)
{
switch (file) {
@@ -161,7 +161,7 @@ static unsigned long t_dst_index(struct r300_vertex_program *vp,
return dst->Index;
}
-static unsigned long t_src_class(enum register_file file)
+static unsigned long t_src_class(gl_register_file file)
{
switch (file) {
case PROGRAM_TEMPORARY:
@@ -993,17 +993,16 @@ static void t_inputs_outputs(struct r300_vertex_program *vp)
vp->outputs[VERT_RESULT_COL0] + 3;
cur_reg = vp->outputs[VERT_RESULT_BFC1] + 1;
}
-#if 0
- if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) {
- vp->outputs[VERT_RESULT_FOGC] = cur_reg++;
- }
-#endif
for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++) {
if (vp->key.OutputsWritten & (1 << i)) {
vp->outputs[i] = cur_reg++;
}
}
+
+ if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) {
+ vp->outputs[VERT_RESULT_FOGC] = cur_reg++;
+ }
}
static void r300TranslateVertexShader(struct r300_vertex_program *vp,
@@ -1271,7 +1270,6 @@ static void position_invariant(struct gl_program *prog)
else
vpi[i].Opcode = OPCODE_MAD;
- vpi[i].StringPos = 0;
vpi[i].Data = 0;
if (i == 3)
diff --git a/src/mesa/drivers/dri/r300/r500_fragprog.c b/src/mesa/drivers/dri/r300/r500_fragprog.c
index 926ddd59644..07a2a7b17ce 100644
--- a/src/mesa/drivers/dri/r300/r500_fragprog.c
+++ b/src/mesa/drivers/dri/r300/r500_fragprog.c
@@ -298,8 +298,8 @@ static void insert_WPOS_trailer(struct r500_fragment_program_compiler *compiler)
static void nqssadce_init(struct nqssadce_state* s)
{
- s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
- s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
+ s->Outputs[FRAG_RESULT_COLOR].Sourced = WRITEMASK_XYZW;
+ s->Outputs[FRAG_RESULT_DEPTH].Sourced = WRITEMASK_W;
}
static GLboolean is_native_swizzle(GLuint opcode, struct prog_src_register reg)
diff --git a/src/mesa/drivers/dri/r300/radeon_nqssadce.c b/src/mesa/drivers/dri/r300/radeon_nqssadce.c
index 97ce016c99c..a083c3d2436 100644
--- a/src/mesa/drivers/dri/r300/radeon_nqssadce.c
+++ b/src/mesa/drivers/dri/r300/radeon_nqssadce.c
@@ -191,7 +191,7 @@ static void process_instruction(struct nqssadce_state* s)
if (inst->Opcode != OPCODE_KIL) {
if (s->Descr->RewriteDepthOut) {
- if (inst->DstReg.File == PROGRAM_OUTPUT && inst->DstReg.Index == FRAG_RESULT_DEPR)
+ if (inst->DstReg.File == PROGRAM_OUTPUT && inst->DstReg.Index == FRAG_RESULT_DEPTH)
rewrite_depth_out(inst);
}
diff --git a/src/mesa/drivers/dri/r300/radeon_program_pair.c b/src/mesa/drivers/dri/r300/radeon_program_pair.c
index 8a945d8537c..49aa90dd94a 100644
--- a/src/mesa/drivers/dri/r300/radeon_program_pair.c
+++ b/src/mesa/drivers/dri/r300/radeon_program_pair.c
@@ -451,19 +451,7 @@ static void allocate_input_registers(struct pair_state *s)
int i;
GLuint hwindex = 0;
- /* Texcoords come first */
- for (i = 0; i < s->Ctx->Const.MaxTextureUnits; i++) {
- if (InputsRead & (FRAG_BIT_TEX0 << i))
- alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_TEX0+i, hwindex++);
- }
- InputsRead &= ~FRAG_BITS_TEX_ANY;
-
- /* fragment position treated as a texcoord */
- if (InputsRead & FRAG_BIT_WPOS)
- alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, hwindex++);
- InputsRead &= ~FRAG_BIT_WPOS;
-
- /* Then primary colour */
+ /* Primary colour */
if (InputsRead & FRAG_BIT_COL0)
alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL0, hwindex++);
InputsRead &= ~FRAG_BIT_COL0;
@@ -473,11 +461,23 @@ static void allocate_input_registers(struct pair_state *s)
alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_COL1, hwindex++);
InputsRead &= ~FRAG_BIT_COL1;
- /* Fog coordinate */
+ /* Texcoords */
+ for (i = 0; i < s->Ctx->Const.MaxTextureUnits; i++) {
+ if (InputsRead & (FRAG_BIT_TEX0 << i))
+ alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_TEX0+i, hwindex++);
+ }
+ InputsRead &= ~FRAG_BITS_TEX_ANY;
+
+ /* Fogcoords treated as a texcoord */
if (InputsRead & FRAG_BIT_FOGC)
alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_FOGC, hwindex++);
InputsRead &= ~FRAG_BIT_FOGC;
+ /* fragment position treated as a texcoord */
+ if (InputsRead & FRAG_BIT_WPOS)
+ alloc_hw_reg(s, PROGRAM_INPUT, FRAG_ATTRIB_WPOS, hwindex++);
+ InputsRead &= ~FRAG_BIT_WPOS;
+
/* Anything else */
if (InputsRead)
error("Don't know how to handle inputs 0x%x\n", InputsRead);
@@ -778,10 +778,10 @@ static void fill_dest_into_pair(struct pair_state *s, struct radeon_pair_instruc
struct prog_instruction *inst = s->Program->Instructions + ip;
if (inst->DstReg.File == PROGRAM_OUTPUT) {
- if (inst->DstReg.Index == FRAG_RESULT_COLR) {
+ if (inst->DstReg.Index == FRAG_RESULT_COLOR) {
pair->RGB.OutputWriteMask |= inst->DstReg.WriteMask & WRITEMASK_XYZ;
pair->Alpha.OutputWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
- } else if (inst->DstReg.Index == FRAG_RESULT_DEPR) {
+ } else if (inst->DstReg.Index == FRAG_RESULT_DEPTH) {
pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
}
} else {
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-01 23:01:50 +0000