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-rw-r--r--src/mesa/drivers/dri/r200/r200_blit.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_cmdbuf.c10
-rw-r--r--src/mesa/drivers/dri/r200/r200_ioctl.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_sanity.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.c22
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.h2
-rw-r--r--src/mesa/drivers/dri/r200/r200_swtcl.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_tcl.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_tex.c14
-rw-r--r--src/mesa/drivers/dri/r200/r200_texstate.c6
-rw-r--r--src/mesa/drivers/dri/r200/r200_vertprog.c16
11 files changed, 41 insertions, 41 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index a33f338990f..3adc69423cd 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -527,7 +527,7 @@ unsigned r200_blit(struct gl_context *ctx,
/* Flush is needed to make sure that source buffer has correct data */
radeonFlush(&r200->radeon.glCtx);
- rcommonEnsureCmdBufSpace(&r200->radeon, 102, __FUNCTION__);
+ rcommonEnsureCmdBufSpace(&r200->radeon, 102, __func__);
if (!validate_buffers(r200, src_bo, dst_bo))
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 13ac5af300d..83846d6ac07 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -124,7 +124,7 @@ void r200EmitVbufPrim( r200ContextPtr rmesa,
radeonEmitState(&rmesa->radeon);
radeon_print(RADEON_RENDER|RADEON_SWRENDER,RADEON_VERBOSE,
- "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
+ "%s cmd_used/4: %d prim %x nr %d\n", __func__,
rmesa->store.cmd_used/4, primitive, vertex_nr);
BEGIN_BATCH(3);
@@ -162,7 +162,7 @@ void r200FlushElts(struct gl_context *ctx)
r200ContextPtr rmesa = R200_CONTEXT(ctx);
int nr, elt_used = rmesa->tcl.elt_used;
- radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %x %d\n", __FUNCTION__, rmesa->tcl.hw_primitive, elt_used);
+ radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %x %d\n", __func__, rmesa->tcl.hw_primitive, elt_used);
assert( rmesa->radeon.dma.flush == r200FlushElts );
rmesa->radeon.dma.flush = NULL;
@@ -187,7 +187,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
{
GLushort *retval;
- radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %d prim %x\n", __FUNCTION__, min_nr, primitive);
+ radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s %d prim %x\n", __func__, min_nr, primitive);
assert((primitive & R200_VF_PRIM_WALK_IND));
@@ -225,7 +225,7 @@ void r200EmitVertexAOS( r200ContextPtr rmesa,
BATCH_LOCALS(&rmesa->radeon);
radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s: vertex_size 0x%x offset 0x%x \n",
- __FUNCTION__, vertex_size, offset);
+ __func__, vertex_size, offset);
BEGIN_BATCH(7);
@@ -245,7 +245,7 @@ void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset)
radeon_print(RADEON_RENDER, RADEON_VERBOSE,
"%s: nr=%d, ofs=0x%08x\n",
- __FUNCTION__, nr, offset);
+ __func__, nr, offset);
BEGIN_BATCH(sz+2+ (nr*2));
OUT_BATCH_PACKET3(R200_CP_CMD_3D_LOAD_VBPNTR, sz - 1);
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index d665c8b21ae..90232d45e9e 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -68,7 +68,7 @@ static void r200Clear( struct gl_context *ctx, GLbitfield mask )
if ( swmask ) {
if (R200_DEBUG & RADEON_FALLBACKS)
- fprintf(stderr, "%s: swrast clear, mask: %x\n", __FUNCTION__, swmask);
+ fprintf(stderr, "%s: swrast clear, mask: %x\n", __func__, swmask);
_swrast_Clear( ctx, swmask );
}
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c
index ab922e5dbfc..6628674431c 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.c
+++ b/src/mesa/drivers/dri/r200/r200_sanity.c
@@ -1447,7 +1447,7 @@ int r200SanityCmdBuffer( r200ContextPtr rmesa,
}
}
- fprintf(stderr, "leaving %s\n\n\n", __FUNCTION__);
+ fprintf(stderr, "leaving %s\n\n\n", __func__);
return 0;
}
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index e4f07b33599..b0a6bd573b6 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -261,7 +261,7 @@ static void r200_set_blend_state( struct gl_context * ctx )
default:
fprintf( stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationRGB );
+ __func__, __LINE__, ctx->Color.Blend[0].EquationRGB );
return;
}
@@ -295,7 +295,7 @@ static void r200_set_blend_state( struct gl_context * ctx )
default:
fprintf( stderr, "[%s:%u] Invalid A blend equation (0x%04x).\n",
- __FUNCTION__, __LINE__, ctx->Color.Blend[0].EquationA );
+ __func__, __LINE__, ctx->Color.Blend[0].EquationA );
return;
}
@@ -723,7 +723,7 @@ static void r200PolygonOffset( struct gl_context *ctx,
/* factor *= 2; */
/* constant *= 2; */
-/* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
+/* fprintf(stderr, "%s f:%f u:%f\n", __func__, factor, constant); */
R200_STATECHANGE( rmesa, zbs );
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_FACTOR] = factoru.ui32;
@@ -867,7 +867,7 @@ static void update_light_colors( struct gl_context *ctx, GLuint p )
{
struct gl_light *l = &ctx->Light.Light[p];
-/* fprintf(stderr, "%s\n", __FUNCTION__); */
+/* fprintf(stderr, "%s\n", __func__); */
if (l->Enabled) {
r200ContextPtr rmesa = R200_CONTEXT(ctx);
@@ -996,7 +996,7 @@ void r200UpdateMaterial( struct gl_context *ctx )
mask &= ~ctx->Light._ColorMaterialBitmask;
if (R200_DEBUG & RADEON_STATE)
- fprintf(stderr, "%s\n", __FUNCTION__);
+ fprintf(stderr, "%s\n", __func__);
if (mask & MAT_BIT_FRONT_EMISSION) {
fcmd[MTL_EMMISSIVE_RED] = mat[MAT_ATTRIB_FRONT_EMISSION][0];
@@ -1668,7 +1668,7 @@ static void r200Enable( struct gl_context *ctx, GLenum cap, GLboolean state )
GLuint p, flag;
if ( R200_DEBUG & RADEON_STATE )
- fprintf( stderr, "%s( %s = %s )\n", __FUNCTION__,
+ fprintf( stderr, "%s( %s = %s )\n", __func__,
_mesa_lookup_enum_by_nr( cap ),
state ? "GL_TRUE" : "GL_FALSE" );
@@ -2050,7 +2050,7 @@ void r200LightingSpaceChange( struct gl_context *ctx )
GLboolean tmp;
if (R200_DEBUG & RADEON_STATE)
- fprintf(stderr, "%s %d BEFORE %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
+ fprintf(stderr, "%s %d BEFORE %x\n", __func__, ctx->_NeedEyeCoords,
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0]);
if (ctx->_NeedEyeCoords)
@@ -2066,7 +2066,7 @@ void r200LightingSpaceChange( struct gl_context *ctx )
}
if (R200_DEBUG & RADEON_STATE)
- fprintf(stderr, "%s %d AFTER %x\n", __FUNCTION__, ctx->_NeedEyeCoords,
+ fprintf(stderr, "%s %d AFTER %x\n", __func__, ctx->_NeedEyeCoords,
rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL_0]);
}
@@ -2109,7 +2109,7 @@ static void update_texturematrix( struct gl_context *ctx )
int unit;
if (R200_DEBUG & RADEON_STATE)
- fprintf(stderr, "%s before COMPSEL: %x\n", __FUNCTION__,
+ fprintf(stderr, "%s before COMPSEL: %x\n", __func__,
rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_COMPSEL]);
rmesa->TexMatEnabled = 0;
@@ -2167,7 +2167,7 @@ GLboolean r200ValidateBuffers(struct gl_context *ctx)
int i, ret;
if (RADEON_DEBUG & RADEON_IOCTL)
- fprintf(stderr, "%s\n", __FUNCTION__);
+ fprintf(stderr, "%s\n", __func__);
radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
rrb = radeon_get_colorbuffer(&rmesa->radeon);
@@ -2317,7 +2317,7 @@ static void r200WrapRunPipeline( struct gl_context *ctx )
GLboolean has_material;
if (0)
- fprintf(stderr, "%s, newstate: %x\n", __FUNCTION__, rmesa->radeon.NewGLState);
+ fprintf(stderr, "%s, newstate: %x\n", __func__, rmesa->radeon.NewGLState);
/* Validate state:
*/
diff --git a/src/mesa/drivers/dri/r200/r200_state.h b/src/mesa/drivers/dri/r200/r200_state.h
index 91119814f6e..3b719b52a73 100644
--- a/src/mesa/drivers/dri/r200/r200_state.h
+++ b/src/mesa/drivers/dri/r200/r200_state.h
@@ -54,7 +54,7 @@ extern void r200_vtbl_update_scissor( struct gl_context *ctx );
extern void r200Fallback( struct gl_context *ctx, GLuint bit, GLboolean mode );
#define FALLBACK( rmesa, bit, mode ) do { \
if ( 0 ) fprintf( stderr, "FALLBACK in %s: #%d=%d\n", \
- __FUNCTION__, bit, mode ); \
+ __func__, bit, mode ); \
r200Fallback( &rmesa->radeon.glCtx, bit, mode ); \
} while (0)
diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c
index e8a06c89c2b..c39b71dece1 100644
--- a/src/mesa/drivers/dri/r200/r200_swtcl.c
+++ b/src/mesa/drivers/dri/r200/r200_swtcl.c
@@ -210,7 +210,7 @@ static void r200_predict_emit_size( r200ContextPtr rmesa )
if (rcommonEnsureCmdBufSpace(&rmesa->radeon,
state_size +
vertex_array_size + prim_size,
- __FUNCTION__))
+ __func__))
rmesa->radeon.swtcl.emit_prediction = radeonCountStateEmitSize(&rmesa->radeon);
else
rmesa->radeon.swtcl.emit_prediction = state_size;
diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c
index ccc8f429033..3eccaa7b7ad 100644
--- a/src/mesa/drivers/dri/r200/r200_tcl.c
+++ b/src/mesa/drivers/dri/r200/r200_tcl.c
@@ -340,7 +340,7 @@ static GLuint r200EnsureEmitSize( struct gl_context * ctx , GLubyte* vimap_rev )
"%s space %u, aos %d\n",
__func__, space_required, AOS_BUFSZ(nr_aos) );
/* flush the buffer in case we need more than is left. */
- if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required + state_size, __FUNCTION__))
+ if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required + state_size, __func__))
return space_required + radeonCountStateEmitSize( &rmesa->radeon );
else
return space_required + state_size;
@@ -374,7 +374,7 @@ static GLboolean r200_run_tcl_render( struct gl_context *ctx,
if (rmesa->radeon.TclFallback)
return GL_TRUE; /* fallback to software t&l */
- radeon_print(RADEON_RENDER, RADEON_NORMAL, "%s\n", __FUNCTION__);
+ radeon_print(RADEON_RENDER, RADEON_NORMAL, "%s\n", __func__);
if (VB->Count == 0)
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c
index 17ae7b9c25b..083a1840d9e 100644
--- a/src/mesa/drivers/dri/r200/r200_tex.c
+++ b/src/mesa/drivers/dri/r200/r200_tex.c
@@ -104,7 +104,7 @@ static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenu
is_clamp_to_border = GL_TRUE;
break;
default:
- _mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
+ _mesa_problem(NULL, "bad S wrap mode in %s", __func__);
}
if (tObj->Target != GL_TEXTURE_1D) {
@@ -138,7 +138,7 @@ static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenu
is_clamp_to_border = GL_TRUE;
break;
default:
- _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
+ _mesa_problem(NULL, "bad T wrap mode in %s", __func__);
}
}
@@ -174,7 +174,7 @@ static void r200SetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap, GLenu
is_clamp_to_border = GL_TRUE;
break;
default:
- _mesa_problem(NULL, "bad R wrap mode in %s", __FUNCTION__);
+ _mesa_problem(NULL, "bad R wrap mode in %s", __func__);
}
if ( is_clamp_to_border ) {
@@ -302,7 +302,7 @@ static void r200TexEnv( struct gl_context *ctx, GLenum target,
struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE, "%s( %s )\n",
- __FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
+ __func__, _mesa_lookup_enum_by_nr( pname ) );
/* This is incorrect: Need to maintain this data for each of
* GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch
@@ -383,7 +383,7 @@ static void r200TexParameter( struct gl_context *ctx,
radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_VERBOSE,
"%s(%p, tex %p) pname %s\n",
- __FUNCTION__, ctx, texObj,
+ __func__, ctx, texObj,
_mesa_lookup_enum_by_nr( pname ) );
switch ( pname ) {
@@ -413,7 +413,7 @@ static void r200DeleteTexture(struct gl_context * ctx, struct gl_texture_object
radeonTexObj* t = radeon_tex_obj(texObj);
radeon_print(RADEON_TEXTURE | RADEON_STATE, RADEON_NORMAL,
- "%s( %p (target = %s) )\n", __FUNCTION__,
+ "%s( %p (target = %s) )\n", __func__,
(void *)texObj,
_mesa_lookup_enum_by_nr(texObj->Target));
@@ -472,7 +472,7 @@ static struct gl_texture_object *r200NewTextureObject(struct gl_context * ctx,
radeon_print(RADEON_STATE | RADEON_TEXTURE, RADEON_NORMAL,
"%s(%p) target %s, new texture %p.\n",
- __FUNCTION__, ctx,
+ __func__, ctx,
_mesa_lookup_enum_by_nr(target), t);
_mesa_initialize_texture_object(ctx, &t->base, name, target);
diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
index 43ecdb999db..cc13ccb4d65 100644
--- a/src/mesa/drivers/dri/r200/r200_texstate.c
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c
@@ -297,7 +297,7 @@ static GLboolean r200UpdateTextureEnv( struct gl_context *ctx, int unit, int slo
R200_TXA_TFACTOR_SEL_MASK | R200_TXA_TFACTOR1_SEL_MASK);
if ( R200_DEBUG & RADEON_TEXTURE ) {
- fprintf( stderr, "%s( %p, %d )\n", __FUNCTION__, (void *)ctx, unit );
+ fprintf( stderr, "%s( %p, %d )\n", __func__, (void *)ctx, unit );
}
/* Set the texture environment state. Isn't this nice and clean?
@@ -1182,7 +1182,7 @@ static GLboolean r200_validate_texgen( struct gl_context *ctx, GLuint unit )
(unit * 4));
if (0)
- fprintf(stderr, "%s unit %d\n", __FUNCTION__, unit);
+ fprintf(stderr, "%s unit %d\n", __func__, unit);
if (texUnit->TexGenEnabled & S_BIT) {
mode = texUnit->GenS.Mode;
@@ -1392,7 +1392,7 @@ static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
} else {
_mesa_problem(NULL, "unexpected texture format in %s",
- __FUNCTION__);
+ __func__);
return;
}
}
diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c
index fdfd27e2e47..d43eaf977fc 100644
--- a/src/mesa/drivers/dri/r200/r200_vertprog.c
+++ b/src/mesa/drivers/dri/r200/r200_vertprog.c
@@ -115,7 +115,7 @@ static GLboolean r200VertexProgUpdateParams(struct gl_context *ctx, struct r200_
paramList = mesa_vp->Base.Parameters;
if(paramList->NumParameters > R200_VSF_MAX_PARAM){
- fprintf(stderr, "%s:Params exhausted\n", __FUNCTION__);
+ fprintf(stderr, "%s:Params exhausted\n", __func__);
return GL_FALSE;
}
@@ -130,7 +130,7 @@ static GLboolean r200VertexProgUpdateParams(struct gl_context *ctx, struct r200_
*fcmd++ = paramList->ParameterValues[pi][3].f;
break;
default:
- _mesa_problem(NULL, "Bad param type in %s", __FUNCTION__);
+ _mesa_problem(NULL, "Bad param type in %s", __func__);
break;
}
if (pi == 95) {
@@ -186,7 +186,7 @@ static unsigned long t_dst(struct prog_dst_register *dst)
case VARYING_SLOT_PSIZ:
return R200_VSF_OUT_CLASS_RESULT_POINTSIZE;
default:
- fprintf(stderr, "problem in %s, unknown dst output reg %d\n", __FUNCTION__, dst->Index);
+ fprintf(stderr, "problem in %s, unknown dst output reg %d\n", __func__, dst->Index);
exit(0);
return 0;
}
@@ -194,7 +194,7 @@ static unsigned long t_dst(struct prog_dst_register *dst)
assert (dst->Index == 0);
return R200_VSF_OUT_CLASS_ADDR;
default:
- fprintf(stderr, "problem in %s, unknown register type %d\n", __FUNCTION__, dst->File);
+ fprintf(stderr, "problem in %s, unknown register type %d\n", __func__, dst->File);
exit(0);
return 0;
}
@@ -218,7 +218,7 @@ static unsigned long t_src_class(gl_register_file file)
case PROGRAM_ADDRESS:
*/
default:
- fprintf(stderr, "problem in %s", __FUNCTION__);
+ fprintf(stderr, "problem in %s", __func__);
exit(0);
}
}
@@ -235,7 +235,7 @@ static void vp_dump_inputs(struct r200_vertex_program *vp, char *caller)
int i;
if(vp == NULL){
- fprintf(stderr, "vp null in call to %s from %s\n", __FUNCTION__, caller);
+ fprintf(stderr, "vp null in call to %s from %s\n", __func__, caller);
return ;
}
@@ -263,7 +263,7 @@ static unsigned long t_src_index(struct r200_vertex_program *vp, struct prog_src
vp->inputs[src->Index] = max_reg+1;*/
- //vp_dump_inputs(vp, __FUNCTION__);
+ //vp_dump_inputs(vp, __func__);
assert(vp->inputs[src->Index] != -1);
return vp->inputs[src->Index];
} else {
@@ -325,7 +325,7 @@ static unsigned long t_opcode(enum prog_opcode opcode)
case OPCODE_SLT: return R200_VPI_OUT_OP_SLT;
default:
- fprintf(stderr, "%s: Should not be called with opcode %d!", __FUNCTION__, opcode);
+ fprintf(stderr, "%s: Should not be called with opcode %d!", __func__, opcode);
}
exit(-1);
return 0;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-16 01:21:21 +0000