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-rw-r--r--src/mesa/drivers/dri/r200/r200_blit.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_blit.h2
-rw-r--r--src/mesa/drivers/dri/r200/r200_context.c1
3 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c
index 56b08a21bd5..b56327dad5f 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.c
+++ b/src/mesa/drivers/dri/r200/r200_blit.c
@@ -38,7 +38,7 @@ static inline uint32_t cmdpacket0(struct radeon_screen *rscrn,
}
/* common formats supported as both textures and render targets */
-static unsigned is_blit_supported(gl_format mesa_format)
+unsigned r200_check_blit(gl_format mesa_format)
{
/* XXX others? BE/LE? */
switch (mesa_format) {
@@ -337,7 +337,7 @@ unsigned r200_blit(GLcontext *ctx,
{
struct r200_context *r200 = R200_CONTEXT(ctx);
- if (!is_blit_supported(dst_mesaformat))
+ if (!r200_check_blit(dst_mesaformat))
return GL_FALSE;
/* Make sure that colorbuffer has even width - hw limitation */
diff --git a/src/mesa/drivers/dri/r200/r200_blit.h b/src/mesa/drivers/dri/r200/r200_blit.h
index 38487266ae1..53206f0b471 100644
--- a/src/mesa/drivers/dri/r200/r200_blit.h
+++ b/src/mesa/drivers/dri/r200/r200_blit.h
@@ -30,6 +30,8 @@
void r200_blit_init(struct r200_context *r200);
+unsigned r200_check_blit(gl_format mesa_format);
+
unsigned r200_blit(GLcontext *ctx,
struct radeon_bo *src_bo,
intptr_t src_offset,
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 6ecd46ecd9e..dad2580e08b 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -264,6 +264,7 @@ static void r200_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.fallback = r200Fallback;
radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
radeon->vtbl.emit_query_finish = r200_emit_query_finish;
+ radeon->vtbl.check_blit = r200_check_blit;
radeon->vtbl.blit = r200_blit;
}