diff options
Diffstat (limited to 'src/mesa/drivers/dri/intel')
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_blit.c | 1 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_buffers.c | 297 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_buffers.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_context.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_decode.c | 485 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 39 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.h | 28 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.h | 4 |
9 files changed, 524 insertions, 342 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 2f1639d4a4c..208f90c0abb 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -544,7 +544,6 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) _mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n", buf, irb->Base.Name); */ - intel_wait_flips(intel); assert(b.x1 < b.x2); assert(b.y1 < b.y2); diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c index 4d036dee42e..0fd2f16a8fb 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.c +++ b/src/mesa/drivers/dri/intel/intel_buffers.c @@ -43,22 +43,6 @@ #include "vblank.h" #include "i915_drm.h" -/* This block can be removed when libdrm >= 2.3.1 is required */ - -#ifndef DRM_IOCTL_I915_FLIP - -#define DRM_VBLANK_FLIP 0x8000000 - -typedef struct drm_i915_flip { - int pipes; -} drm_i915_flip_t; - -#undef DRM_IOCTL_I915_FLIP -#define DRM_IOCTL_I915_FLIP DRM_IOW(DRM_COMMAND_BASE + DRM_I915_FLIP, \ - drm_i915_flip_t) - -#endif - #define FILE_DEBUG_FLAG DEBUG_BLIT /** @@ -143,8 +127,7 @@ intel_get_cliprects(struct intel_context *intel, *num_cliprects = 1; *x_off = 0; *y_off = 0; - } else if (intel->front_cliprects || - intel_fb->pf_active || dPriv->numBackClipRects == 0) { + } else if (intel->front_cliprects || dPriv->numBackClipRects == 0) { /* use the front clip rects */ *cliprects = dPriv->pClipRects; *num_cliprects = dPriv->numClipRects; @@ -160,76 +143,6 @@ intel_get_cliprects(struct intel_context *intel, } } -static void -intelUpdatePageFlipping(struct intel_context *intel, - GLint areaA, GLint areaB) -{ - __DRIdrawablePrivate *dPriv = intel->driDrawable; - struct intel_framebuffer *intel_fb = dPriv->driverPrivate; - GLboolean pf_active; - GLint pf_planes; - - /* Update page flipping info */ - pf_planes = 0; - - if (areaA > 0) - pf_planes |= 1; - - if (areaB > 0) - pf_planes |= 2; - - intel_fb->pf_current_page = (intel->sarea->pf_current_page >> - (intel_fb->pf_planes & 0x2)) & 0x3; - - intel_fb->pf_num_pages = 2; - - pf_active = pf_planes && (pf_planes & intel->sarea->pf_active) == pf_planes; - - if (INTEL_DEBUG & DEBUG_LOCK) - if (pf_active != intel_fb->pf_active) - _mesa_printf("%s - Page flipping %sactive\n", __progname, - pf_active ? "" : "in"); - - if (pf_active) { - /* Sync pages between planes if flipping on both at the same time */ - if (pf_planes == 0x3 && pf_planes != intel_fb->pf_planes && - (intel->sarea->pf_current_page & 0x3) != - (((intel->sarea->pf_current_page) >> 2) & 0x3)) { - drm_i915_flip_t flip; - - if (intel_fb->pf_current_page == - (intel->sarea->pf_current_page & 0x3)) { - /* XXX: This is ugly, but emitting two flips 'in a row' can cause - * lockups for unknown reasons. - */ - intel->sarea->pf_current_page = - intel->sarea->pf_current_page & 0x3; - intel->sarea->pf_current_page |= - ((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) % - intel_fb->pf_num_pages) << 2; - - flip.pipes = 0x2; - } else { - intel->sarea->pf_current_page = - intel->sarea->pf_current_page & (0x3 << 2); - intel->sarea->pf_current_page |= - (intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) % - intel_fb->pf_num_pages; - - flip.pipes = 0x1; - } - - drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip)); - } - - intel_fb->pf_planes = pf_planes; - } - - intel_fb->pf_active = pf_active; - intel_flip_renderbuffers(intel_fb); - intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); -} - /** * This will be called whenever the currently bound window is moved/resized. * XXX: actually, it seems to NOT be called when the window is only moved (BP). @@ -243,7 +156,7 @@ intelWindowMoved(struct intel_context *intel) if (!intel->intelScreen->driScrnPriv->dri2.enabled && intel->intelScreen->driScrnPriv->ddx_version.minor >= 7) { - volatile struct drm_i915_sarea *sarea = intel->sarea; + volatile drm_i915_sarea_t *sarea = intel->sarea; drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w, .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h }; drm_clip_rect_t planeA_rect = { .x1 = sarea->planeA_x, .y1 = sarea->planeA_y, @@ -256,8 +169,6 @@ intelWindowMoved(struct intel_context *intel) GLint areaB = driIntersectArea( drw_rect, planeB_rect ); GLuint flags = dPriv->vblFlags; - intelUpdatePageFlipping(intel, areaA, areaB); - /* Update vblank info */ if (areaB > areaA || (areaA == areaB && areaB > 0)) { @@ -282,7 +193,7 @@ intelWindowMoved(struct intel_context *intel) vbl.request.type |= DRM_VBLANK_SECONDARY; } - for (i = 0; i < intel_fb->pf_num_pages; i++) { + for (i = 0; i < 2; i++) { if (!intel_fb->color_rb[i] || (intel_fb->vbl_waited - intel_fb->color_rb[i]->vbl_pending) <= (1<<23)) @@ -306,7 +217,7 @@ intelWindowMoved(struct intel_context *intel) intel_fb->vbl_waited = dPriv->vblSeq; - for (i = 0; i < intel_fb->pf_num_pages; i++) { + for (i = 0; i < 2; i++) { if (intel_fb->color_rb[i]) intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_waited; } @@ -545,176 +456,6 @@ intelClear(GLcontext *ctx, GLbitfield mask) } } - -/* Emit wait for pending flips */ -void -intel_wait_flips(struct intel_context *intel) -{ - struct intel_framebuffer *intel_fb = - (struct intel_framebuffer *) intel->ctx.DrawBuffer; - struct intel_renderbuffer *intel_rb = - intel_get_renderbuffer(&intel_fb->Base, - intel_fb->Base._ColorDrawBufferIndexes[0] == - BUFFER_FRONT_LEFT ? BUFFER_FRONT_LEFT : - BUFFER_BACK_LEFT); - - if (intel->intelScreen->driScrnPriv->dri2.enabled) - return; - - if (intel_fb->Base.Name == 0 && intel_rb && - intel_rb->pf_pending == intel_fb->pf_seq) { - GLint pf_planes = intel_fb->pf_planes; - BATCH_LOCALS; - - /* Wait for pending flips to take effect */ - BEGIN_BATCH(2, NO_LOOP_CLIPRECTS); - OUT_BATCH(pf_planes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP) - : 0); - OUT_BATCH(pf_planes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP) - : 0); - ADVANCE_BATCH(); - - intel_rb->pf_pending--; - } -} - - -/* Flip the front & back buffers - */ -static GLboolean -intelPageFlip(const __DRIdrawablePrivate * dPriv) -{ - struct intel_context *intel; - int ret; - struct intel_framebuffer *intel_fb = dPriv->driverPrivate; - - if (INTEL_DEBUG & DEBUG_IOCTL) - fprintf(stderr, "%s\n", __FUNCTION__); - - assert(dPriv); - assert(dPriv->driContextPriv); - assert(dPriv->driContextPriv->driverPrivate); - - intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate; - - if (intel->intelScreen->drmMinor < 9) - return GL_FALSE; - - intelFlush(&intel->ctx); - - ret = 0; - - LOCK_HARDWARE(intel); - - if (dPriv->numClipRects && intel_fb->pf_active) { - drm_i915_flip_t flip; - - flip.pipes = intel_fb->pf_planes; - - ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip)); - } - - UNLOCK_HARDWARE(intel); - - if (ret || !intel_fb->pf_active) - return GL_FALSE; - - if (!dPriv->numClipRects) { - usleep(10000); /* throttle invisible client 10ms */ - } - - intel_fb->pf_current_page = (intel->sarea->pf_current_page >> - (intel_fb->pf_planes & 0x2)) & 0x3; - - if (dPriv->numClipRects != 0) { - intel_get_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT)->pf_pending = - intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->pf_pending = - ++intel_fb->pf_seq; - } - - intel_flip_renderbuffers(intel_fb); - intel_draw_buffer(&intel->ctx, &intel_fb->Base); - - return GL_TRUE; -} - -static GLboolean -intelScheduleSwap(__DRIdrawablePrivate * dPriv, GLboolean *missed_target) -{ - struct intel_framebuffer *intel_fb = dPriv->driverPrivate; - unsigned int interval; - struct intel_context *intel = - intelScreenContext(dPriv->driScreenPriv->private); - const intelScreenPrivate *intelScreen = intel->intelScreen; - unsigned int target; - drm_i915_vblank_swap_t swap; - GLboolean ret; - - if (!dPriv->vblFlags || - (dPriv->vblFlags & VBLANK_FLAG_NO_IRQ) || - intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6)) - return GL_FALSE; - - interval = driGetVBlankInterval(dPriv); - - swap.seqtype = DRM_VBLANK_ABSOLUTE; - - if (dPriv->vblFlags & VBLANK_FLAG_SYNC) { - swap.seqtype |= DRM_VBLANK_NEXTONMISS; - } else if (interval == 0) - return GL_FALSE; - - swap.drawable = dPriv->hHWDrawable; - target = swap.sequence = dPriv->vblSeq + interval; - - if ( dPriv->vblFlags & VBLANK_FLAG_SECONDARY ) { - swap.seqtype |= DRM_VBLANK_SECONDARY; - } - - LOCK_HARDWARE(intel); - - intel_batchbuffer_flush(intel->batch); - - if ( intel_fb->pf_active ) { - swap.seqtype |= DRM_VBLANK_FLIP; - - intel_fb->pf_current_page = (((intel->sarea->pf_current_page >> - (intel_fb->pf_planes & 0x2)) & 0x3) + 1) % - intel_fb->pf_num_pages; - } - - if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap, - sizeof(swap))) { - dPriv->vblSeq = swap.sequence; - swap.sequence -= target; - *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23); - - intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->vbl_pending = - intel_get_renderbuffer(&intel_fb->Base, - BUFFER_FRONT_LEFT)->vbl_pending = - dPriv->vblSeq; - - if (swap.seqtype & DRM_VBLANK_FLIP) { - intel_flip_renderbuffers(intel_fb); - intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer); - } - - ret = GL_TRUE; - } else { - if (swap.seqtype & DRM_VBLANK_FLIP) { - intel_fb->pf_current_page = ((intel->sarea->pf_current_page >> - (intel_fb->pf_planes & 0x2)) & 0x3) % - intel_fb->pf_num_pages; - } - - ret = GL_FALSE; - } - - UNLOCK_HARDWARE(intel); - - return ret; -} - void intelSwapBuffers(__DRIdrawablePrivate * dPriv) { @@ -736,22 +477,22 @@ intelSwapBuffers(__DRIdrawablePrivate * dPriv) _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */ - if (!intelScheduleSwap(dPriv, &missed_target)) { - driWaitForVBlank(dPriv, &missed_target); + /* + * The old swapping ioctl was incredibly racy, just wait for vblank + * and do the swap ourselves. + */ + driWaitForVBlank(dPriv, &missed_target); - /* - * Update each buffer's vbl_pending so we don't get too out of - * sync - */ - intel_get_renderbuffer(&intel_fb->Base, - BUFFER_BACK_LEFT)->vbl_pending = - intel_get_renderbuffer(&intel_fb->Base, - BUFFER_FRONT_LEFT)->vbl_pending = - dPriv->vblSeq; - if (!intelPageFlip(dPriv)) { - intelCopyBuffer(dPriv, NULL); - } - } + /* + * Update each buffer's vbl_pending so we don't get too out of + * sync + */ + intel_get_renderbuffer(&intel_fb->Base, + BUFFER_BACK_LEFT)->vbl_pending = dPriv->vblSeq; + intel_get_renderbuffer(&intel_fb->Base, + BUFFER_FRONT_LEFT)->vbl_pending = dPriv->vblSeq; + + intelCopyBuffer(dPriv, NULL); intel_fb->swap_count++; (*psp->systemTime->getUST) (&ust); diff --git a/src/mesa/drivers/dri/intel/intel_buffers.h b/src/mesa/drivers/dri/intel/intel_buffers.h index e5afb37dd1a..0be1cee0914 100644 --- a/src/mesa/drivers/dri/intel/intel_buffers.h +++ b/src/mesa/drivers/dri/intel/intel_buffers.h @@ -45,8 +45,6 @@ extern struct intel_region *intel_readbuf_region(struct intel_context *intel); extern struct intel_region *intel_drawbuf_region(struct intel_context *intel); -extern void intel_wait_flips(struct intel_context *intel); - extern void intelSwapBuffers(__DRIdrawablePrivate * dPriv); extern void intelWindowMoved(struct intel_context *intel); diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 7b7f7d8c145..c4a24d73972 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -886,7 +886,7 @@ intelContendedLock(struct intel_context *intel, GLuint flags) { __DRIdrawablePrivate *dPriv = intel->driDrawable; __DRIscreenPrivate *sPriv = intel->driScreen; - volatile struct drm_i915_sarea *sarea = intel->sarea; + volatile drm_i915_sarea_t *sarea = intel->sarea; int me = intel->hHWContext; drmGetLock(intel->driFd, intel->hHWContext, flags); diff --git a/src/mesa/drivers/dri/intel/intel_decode.c b/src/mesa/drivers/dri/intel/intel_decode.c index 0b8a287f6fe..5f90ca22ece 100644 --- a/src/mesa/drivers/dri/intel/intel_decode.c +++ b/src/mesa/drivers/dri/intel/intel_decode.c @@ -37,6 +37,7 @@ #include <stdio.h> #include <stdarg.h> +#include <string.h> #include <inttypes.h> #include "intel_decode.h" @@ -324,6 +325,474 @@ decode_3d_1c(uint32_t *data, int count, uint32_t hw_offset, int *failures) return 1; } +/** Sets the string dstname to describe the destination of the PS instruction */ +static void +i915_get_instruction_dst(uint32_t *data, int i, char *dstname, int do_mask) +{ + uint32_t a0 = data[i]; + int dst_nr = (a0 >> 14) & 0xf; + char dstmask[8]; + char *sat; + + if (do_mask) { + if (((a0 >> 10) & 0xf) == 0xf) { + dstmask[0] = 0; + } else { + int dstmask_index = 0; + + dstmask[dstmask_index++] = '.'; + if (a0 & (1 << 10)) + dstmask[dstmask_index++] = 'x'; + if (a0 & (1 << 11)) + dstmask[dstmask_index++] = 'y'; + if (a0 & (1 << 12)) + dstmask[dstmask_index++] = 'z'; + if (a0 & (1 << 13)) + dstmask[dstmask_index++] = 'w'; + dstmask[dstmask_index++] = 0; + } + + if (a0 & (1 << 22)) + sat = ".sat"; + else + sat = ""; + } else { + dstmask[0] = 0; + sat = ""; + } + + switch ((a0 >> 19) & 0x7) { + case 0: + if (dst_nr > 15) + fprintf(out, "bad destination reg R%d\n", dst_nr); + sprintf(dstname, "R%d%s%s", dst_nr, dstmask, sat); + break; + case 4: + if (dst_nr > 0) + fprintf(out, "bad destination reg oC%d\n", dst_nr); + sprintf(dstname, "oC%s%s", dstmask, sat); + break; + case 5: + if (dst_nr > 0) + fprintf(out, "bad destination reg oD%d\n", dst_nr); + sprintf(dstname, "oD%s%s", dstmask, sat); + break; + case 6: + if (dst_nr > 2) + fprintf(out, "bad destination reg U%d\n", dst_nr); + sprintf(dstname, "U%d%s%s", dst_nr, dstmask, sat); + break; + default: + sprintf(dstname, "RESERVED"); + break; + } +} + +static char * +i915_get_channel_swizzle(uint32_t select) +{ + switch (select & 0x7) { + case 0: + return (select & 8) ? "-x" : "x"; + case 1: + return (select & 8) ? "-y" : "y"; + case 2: + return (select & 8) ? "-z" : "z"; + case 3: + return (select & 8) ? "-w" : "w"; + case 4: + return (select & 8) ? "-0" : "0"; + case 5: + return (select & 8) ? "-1" : "1"; + default: + return (select & 8) ? "-bad" : "bad"; + } +} + +static void +i915_get_instruction_src_name(uint32_t src_type, uint32_t src_nr, char *name) +{ + switch (src_type) { + case 0: + sprintf(name, "R%d", src_nr); + if (src_nr > 15) + fprintf(out, "bad src reg %s\n", name); + break; + case 1: + if (src_nr < 8) + sprintf(name, "T%d", src_nr); + else if (src_nr == 8) + sprintf(name, "DIFFUSE"); + else if (src_nr == 9) + sprintf(name, "SPECULAR"); + else if (src_nr == 10) + sprintf(name, "FOG"); + else { + fprintf(out, "bad src reg T%d\n", src_nr); + sprintf(name, "RESERVED"); + } + break; + case 2: + sprintf(name, "C%d", src_nr); + if (src_nr > 31) + fprintf(out, "bad src reg %s\n", name); + break; + case 4: + sprintf(name, "oC"); + if (src_nr > 0) + fprintf(out, "bad src reg oC%d\n", src_nr); + break; + case 5: + sprintf(name, "oD"); + if (src_nr > 0) + fprintf(out, "bad src reg oD%d\n", src_nr); + break; + case 6: + sprintf(name, "U%d", src_nr); + if (src_nr > 2) + fprintf(out, "bad src reg %s\n", name); + break; + default: + fprintf(out, "bad src reg type %d\n", src_type); + sprintf(name, "RESERVED"); + break; + } +} + +static void +i915_get_instruction_src0(uint32_t *data, int i, char *srcname) +{ + uint32_t a0 = data[i]; + uint32_t a1 = data[i + 1]; + int src_nr = (a0 >> 2) & 0x1f; + char *swizzle_x = i915_get_channel_swizzle((a1 >> 28) & 0xf); + char *swizzle_y = i915_get_channel_swizzle((a1 >> 24) & 0xf); + char *swizzle_z = i915_get_channel_swizzle((a1 >> 20) & 0xf); + char *swizzle_w = i915_get_channel_swizzle((a1 >> 16) & 0xf); + char swizzle[100]; + + i915_get_instruction_src_name((a0 >> 7) & 0x7, src_nr, srcname); + sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); + if (strcmp(swizzle, ".xyzw") != 0) + strcat(srcname, swizzle); +} + +static void +i915_get_instruction_src1(uint32_t *data, int i, char *srcname) +{ + uint32_t a1 = data[i + 1]; + uint32_t a2 = data[i + 2]; + int src_nr = (a1 >> 8) & 0x1f; + char *swizzle_x = i915_get_channel_swizzle((a1 >> 4) & 0xf); + char *swizzle_y = i915_get_channel_swizzle((a1 >> 0) & 0xf); + char *swizzle_z = i915_get_channel_swizzle((a2 >> 28) & 0xf); + char *swizzle_w = i915_get_channel_swizzle((a2 >> 24) & 0xf); + char swizzle[100]; + + i915_get_instruction_src_name((a1 >> 13) & 0x7, src_nr, srcname); + sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); + if (strcmp(swizzle, ".xyzw") != 0) + strcat(srcname, swizzle); +} + +static void +i915_get_instruction_src2(uint32_t *data, int i, char *srcname) +{ + uint32_t a2 = data[i + 2]; + int src_nr = (a2 >> 16) & 0x1f; + char *swizzle_x = i915_get_channel_swizzle((a2 >> 12) & 0xf); + char *swizzle_y = i915_get_channel_swizzle((a2 >> 8) & 0xf); + char *swizzle_z = i915_get_channel_swizzle((a2 >> 4) & 0xf); + char *swizzle_w = i915_get_channel_swizzle((a2 >> 0) & 0xf); + char swizzle[100]; + + i915_get_instruction_src_name((a2 >> 21) & 0x7, src_nr, srcname); + sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); + if (strcmp(swizzle, ".xyzw") != 0) + strcat(srcname, swizzle); +} + +static void +i915_get_instruction_addr(uint32_t src_type, uint32_t src_nr, char *name) +{ + switch (src_type) { + case 0: + sprintf(name, "R%d", src_nr); + if (src_nr > 15) + fprintf(out, "bad src reg %s\n", name); + break; + case 1: + if (src_nr < 8) + sprintf(name, "T%d", src_nr); + else if (src_nr == 8) + sprintf(name, "DIFFUSE"); + else if (src_nr == 9) + sprintf(name, "SPECULAR"); + else if (src_nr == 10) + sprintf(name, "FOG"); + else { + fprintf(out, "bad src reg T%d\n", src_nr); + sprintf(name, "RESERVED"); + } + break; + case 4: + sprintf(name, "oC"); + if (src_nr > 0) + fprintf(out, "bad src reg oC%d\n", src_nr); + break; + case 5: + sprintf(name, "oD"); + if (src_nr > 0) + fprintf(out, "bad src reg oD%d\n", src_nr); + break; + default: + fprintf(out, "bad src reg type %d\n", src_type); + sprintf(name, "RESERVED"); + break; + } +} + +static void +i915_decode_alu1(uint32_t *data, uint32_t hw_offset, + int i, char *instr_prefix, char *op_name) +{ + char dst[100], src0[100]; + + i915_get_instruction_dst(data, i, dst, 1); + i915_get_instruction_src0(data, i, src0); + + instr_out(data, hw_offset, i++, "%s: %s %s, %s\n", instr_prefix, + op_name, dst, src0); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); +} + +static void +i915_decode_alu2(uint32_t *data, uint32_t hw_offset, + int i, char *instr_prefix, char *op_name) +{ + char dst[100], src0[100], src1[100]; + + i915_get_instruction_dst(data, i, dst, 1); + i915_get_instruction_src0(data, i, src0); + i915_get_instruction_src1(data, i, src1); + + instr_out(data, hw_offset, i++, "%s: %s %s, %s, %s\n", instr_prefix, + op_name, dst, src0, src1); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); +} + +static void +i915_decode_alu3(uint32_t *data, uint32_t hw_offset, + int i, char *instr_prefix, char *op_name) +{ + char dst[100], src0[100], src1[100], src2[100]; + + i915_get_instruction_dst(data, i, dst, 1); + i915_get_instruction_src0(data, i, src0); + i915_get_instruction_src1(data, i, src1); + i915_get_instruction_src2(data, i, src2); + + instr_out(data, hw_offset, i++, "%s: %s %s, %s, %s, %s\n", instr_prefix, + op_name, dst, src0, src1, src2); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); +} + +static void +i915_decode_tex(uint32_t *data, uint32_t hw_offset, int i, char *instr_prefix, + char *tex_name) +{ + uint32_t t0 = data[i]; + uint32_t t1 = data[i + 1]; + char dst_name[100]; + char addr_name[100]; + int sampler_nr; + + i915_get_instruction_dst(data, i, dst_name, 0); + i915_get_instruction_addr((t1 >> 24) & 0x7, + (t1 >> 17) & 0xf, + addr_name); + sampler_nr = t0 & 0xf; + + instr_out(data, hw_offset, i++, "%s: %s %s, S%d, %s\n", instr_prefix, + tex_name, dst_name, sampler_nr, addr_name); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); +} + +static void +i915_decode_dcl(uint32_t *data, uint32_t hw_offset, int i, char *instr_prefix) +{ + uint32_t d0 = data[i]; + char *sampletype; + int dcl_nr = (d0 >> 14) & 0xf; + char *dcl_x = d0 & (1 << 10) ? "x" : ""; + char *dcl_y = d0 & (1 << 11) ? "y" : ""; + char *dcl_z = d0 & (1 << 12) ? "z" : ""; + char *dcl_w = d0 & (1 << 13) ? "w" : ""; + char dcl_mask[10]; + + switch ((d0 >> 19) & 0x3) { + case 1: + sprintf(dcl_mask, ".%s%s%s%s", dcl_x, dcl_y, dcl_z, dcl_w); + if (strcmp(dcl_mask, ".") == 0) + fprintf(out, "bad (empty) dcl mask\n"); + + if (dcl_nr > 10) + fprintf(out, "bad T%d dcl register number\n", dcl_nr); + if (dcl_nr < 8) { + if (strcmp(dcl_mask, ".x") != 0 && + strcmp(dcl_mask, ".xy") != 0 && + strcmp(dcl_mask, ".xz") != 0 && + strcmp(dcl_mask, ".w") != 0 && + strcmp(dcl_mask, ".xyzw") != 0) { + fprintf(out, "bad T%d.%s dcl mask\n", dcl_nr, dcl_mask); + } + instr_out(data, hw_offset, i++, "%s: DCL T%d%s\n", instr_prefix, + dcl_nr, dcl_mask); + } else { + if (strcmp(dcl_mask, ".xz") == 0) + fprintf(out, "errataed bad dcl mask %s\n", dcl_mask); + else if (strcmp(dcl_mask, ".xw") == 0) + fprintf(out, "errataed bad dcl mask %s\n", dcl_mask); + else if (strcmp(dcl_mask, ".xzw") == 0) + fprintf(out, "errataed bad dcl mask %s\n", dcl_mask); + + if (dcl_nr == 8) { + instr_out(data, hw_offset, i++, "%s: DCL DIFFUSE%s\n", instr_prefix, + dcl_mask); + } else if (dcl_nr == 9) { + instr_out(data, hw_offset, i++, "%s: DCL SPECULAR%s\n", instr_prefix, + dcl_mask); + } else if (dcl_nr == 10) { + instr_out(data, hw_offset, i++, "%s: DCL FOG%s\n", instr_prefix, + dcl_mask); + } + } + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + break; + case 3: + switch ((d0 >> 22) & 0x3) { + case 0: + sampletype = "2D"; + break; + case 1: + sampletype = "CUBE"; + break; + case 2: + sampletype = "3D"; + break; + default: + sampletype = "RESERVED"; + break; + } + if (dcl_nr > 15) + fprintf(out, "bad S%d dcl register number\n", dcl_nr); + instr_out(data, hw_offset, i++, "%s: DCL S%d %s\n", instr_prefix, + dcl_nr, sampletype); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + break; + default: + instr_out(data, hw_offset, i++, "%s: DCL RESERVED%d\n", instr_prefix, dcl_nr); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + } +} + +static void +i915_decode_instruction(uint32_t *data, uint32_t hw_offset, + int i, char *instr_prefix) +{ + switch ((data[i] >> 24) & 0x1f) { + case 0x0: + instr_out(data, hw_offset, i++, "%s: NOP\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + break; + case 0x01: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "ADD"); + break; + case 0x02: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "MOV"); + break; + case 0x03: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "MUL"); + break; + case 0x04: + i915_decode_alu3(data, hw_offset, i, instr_prefix, "MAD"); + break; + case 0x05: + i915_decode_alu3(data, hw_offset, i, instr_prefix, "DP2ADD"); + break; + case 0x06: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "DP3"); + break; + case 0x07: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "DP4"); + break; + case 0x08: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "FRC"); + break; + case 0x09: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "RCP"); + break; + case 0x0a: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "RSQ"); + break; + case 0x0b: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "EXP"); + break; + case 0x0c: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "LOG"); + break; + case 0x0d: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "CMP"); + break; + case 0x0e: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "MIN"); + break; + case 0x0f: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "MAX"); + break; + case 0x10: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "FLR"); + break; + case 0x11: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "MOD"); + break; + case 0x12: + i915_decode_alu1(data, hw_offset, i, instr_prefix, "TRC"); + break; + case 0x13: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "SGE"); + break; + case 0x14: + i915_decode_alu2(data, hw_offset, i, instr_prefix, "SLT"); + break; + case 0x15: + i915_decode_tex(data, hw_offset, i, instr_prefix, "TEXLD"); + break; + case 0x16: + i915_decode_tex(data, hw_offset, i, instr_prefix, "TEXLDP"); + break; + case 0x17: + i915_decode_tex(data, hw_offset, i, instr_prefix, "TEXLDB"); + break; + case 0x19: + i915_decode_dcl(data, hw_offset, i, instr_prefix); + break; + default: + instr_out(data, hw_offset, i++, "%s: unknown\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + instr_out(data, hw_offset, i++, "%s\n", instr_prefix); + break; + } +} + static int decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i830) { @@ -441,8 +910,9 @@ decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i case 0x00: instr_out(data, hw_offset, 0, "3DSTATE_MAP_STATE\n"); len = (data[0] & 0x0000003f) + 2; + instr_out(data, hw_offset, 1, "mask\n"); - i = 1; + i = 2; for (map = 0; map <= 15; map++) { if (data[1] & (1 << map)) { if (i + 3 >= count) @@ -495,19 +965,22 @@ decode_3d_1d(uint32_t *data, int count, uint32_t hw_offset, int *failures, int i } i = 1; for (instr = 0; instr < (len - 1) / 3; instr++) { + char instr_prefix[10]; + if (i + 3 >= count) - BUFFER_FAIL(count, len, "3DSTATE_MAP_STATE"); - instr_out(data, hw_offset, i++, "PS%03x\n", instr); - instr_out(data, hw_offset, i++, "PS%03x\n", instr); - instr_out(data, hw_offset, i++, "PS%03x\n", instr); + BUFFER_FAIL(count, len, "3DSTATE_PIXEL_SHADER_PROGRAM"); + sprintf(instr_prefix, "PS%03d", instr); + i915_decode_instruction(data, hw_offset, i, instr_prefix); + i += 3; } return len; case 0x01: if (i830) break; instr_out(data, hw_offset, 0, "3DSTATE_SAMPLER_STATE\n"); + instr_out(data, hw_offset, 1, "mask\n"); len = (data[0] & 0x0000003f) + 2; - i = 1; + i = 2; for (sampler = 0; sampler <= 15; sampler++) { if (data[1] & (1 << sampler)) { if (i + 3 >= count) diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index 54f2fa5287b..7cf12619d6b 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -77,43 +77,6 @@ intel_get_renderbuffer(struct gl_framebuffer *fb, int attIndex) return NULL; } - -void -intel_flip_renderbuffers(struct intel_framebuffer *intel_fb) -{ - int current_page = intel_fb->pf_current_page; - int next_page = (current_page + 1) % intel_fb->pf_num_pages; - struct gl_renderbuffer *tmp_rb; - - /* Exchange renderbuffers if necessary but make sure their reference counts - * are preserved. - */ - if (intel_fb->color_rb[current_page] && - intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer != - &intel_fb->color_rb[current_page]->Base) { - tmp_rb = NULL; - _mesa_reference_renderbuffer(&tmp_rb, - intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer); - tmp_rb = &intel_fb->color_rb[current_page]->Base; - _mesa_reference_renderbuffer( - &intel_fb->Base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer, tmp_rb); - _mesa_reference_renderbuffer(&tmp_rb, NULL); - } - - if (intel_fb->color_rb[next_page] && - intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer != - &intel_fb->color_rb[next_page]->Base) { - tmp_rb = NULL; - _mesa_reference_renderbuffer(&tmp_rb, - intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer); - tmp_rb = &intel_fb->color_rb[next_page]->Base; - _mesa_reference_renderbuffer( - &intel_fb->Base.Attachment[BUFFER_BACK_LEFT].Renderbuffer, tmp_rb); - _mesa_reference_renderbuffer(&tmp_rb, NULL); - } -} - - struct intel_region * intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex) { @@ -351,7 +314,7 @@ intel_resize_buffers(GLcontext *ctx, struct gl_framebuffer *fb, } /* Make sure all window system renderbuffers are up to date */ - for (i = 0; i < 3; i++) { + for (i = 0; i < 2; i++) { struct gl_renderbuffer *rb = &intel_fb->color_rb[i]->Base; /* only resize if size is changing */ diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h index 9d15582d78c..b7e9280e8cc 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.h +++ b/src/mesa/drivers/dri/intel/intel_fbo.h @@ -39,14 +39,7 @@ struct intel_framebuffer { struct gl_framebuffer Base; - struct intel_renderbuffer *color_rb[3]; - - /* Drawable page flipping state */ - GLboolean pf_active; - GLuint pf_seq; - GLint pf_planes; - GLint pf_current_page; - GLint pf_num_pages; + struct intel_renderbuffer *color_rb[2]; /* VBI */ @@ -76,8 +69,6 @@ struct intel_renderbuffer GLuint PairedDepth; /**< only used if this is a depth renderbuffer */ GLuint PairedStencil; /**< only used if this is a stencil renderbuffer */ - GLuint pf_pending; /**< sequence number of pending flip */ - GLuint vbl_pending; /**< vblank sequence number of pending flip */ uint8_t *span_cache; @@ -111,5 +102,22 @@ extern struct intel_region *intel_get_rb_region(struct gl_framebuffer *fb, +/** + * Are we currently rendering into a texture? + */ +static INLINE GLboolean +intel_rendering_to_texture(const GLcontext *ctx) +{ + if (ctx->DrawBuffer->Name) { + /* User-created FBO */ + const struct intel_renderbuffer *irb = + intel_renderbuffer(ctx->DrawBuffer->_ColorDrawBuffers[0]); + return irb && irb->RenderToTexture; + } + else { + return GL_FALSE; + } +} + #endif /* INTEL_FBO_H */ diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index fc4e82b56c9..7042c255644 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -134,7 +134,7 @@ intelPrintDRIInfo(intelScreenPrivate * intelScreen, static void -intelPrintSAREA(const struct drm_i915_sarea * sarea) +intelPrintSAREA(const drm_i915_sarea_t * sarea) { fprintf(stderr, "SAREA: sarea width %d height %d\n", sarea->width, sarea->height); @@ -161,7 +161,7 @@ intelPrintSAREA(const struct drm_i915_sarea * sarea) */ void intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen, - struct drm_i915_sarea * sarea) + drm_i915_sarea_t * sarea) { intelScreen->width = sarea->width; intelScreen->height = sarea->height; @@ -244,7 +244,7 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv) { intelScreenPrivate *intelScreen; I830DRIPtr gDRIPriv = (I830DRIPtr) sPriv->pDevPriv; - struct drm_i915_sarea *sarea; + drm_i915_sarea_t *sarea; if (sPriv->devPrivSize != sizeof(I830DRIRec)) { fprintf(stderr, @@ -264,7 +264,7 @@ static GLboolean intelInitDriver(__DRIscreenPrivate *sPriv) intelScreen->driScrnPriv = sPriv; sPriv->private = (void *) intelScreen; - sarea = (struct drm_i915_sarea *) + sarea = (drm_i915_sarea_t *) (((GLubyte *) sPriv->pSAREA) + gDRIPriv->sarea_priv_offset); intelScreen->sarea = sarea; diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h index cf5359baaeb..fcd0d9c28c7 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.h +++ b/src/mesa/drivers/dri/intel/intel_screen.h @@ -68,7 +68,7 @@ typedef struct __DRIscreenPrivate *driScrnPriv; - volatile struct drm_i915_sarea *sarea; + volatile drm_i915_sarea_t *sarea; int drmMinor; @@ -94,7 +94,7 @@ extern void intelUnmapScreenRegions(intelScreenPrivate * intelScreen); extern void intelUpdateScreenFromSAREA(intelScreenPrivate * intelScreen, - struct drm_i915_sarea * sarea); + drm_i915_sarea_t * sarea); extern void intelDestroyContext(__DRIcontextPrivate * driContextPriv); |