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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp1
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.h8
-rw-r--r--src/mesa/drivers/dri/i965/gen7_blorp.cpp11
3 files changed, 0 insertions, 20 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 131e1558f38..b0de55d7f08 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -162,7 +162,6 @@ brw_blorp_params::brw_blorp_params()
y1(0),
depth_format(0),
hiz_op(GEN6_HIZ_OP_NONE),
- fast_clear_op(GEN7_FAST_CLEAR_OP_NONE),
use_wm_prog(false)
{
color_write_disable[0] = false;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index ff68000a294..59aecabf5bd 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -208,13 +208,6 @@ struct brw_blorp_prog_data
};
-enum gen7_fast_clear_op {
- GEN7_FAST_CLEAR_OP_NONE,
- GEN7_FAST_CLEAR_OP_FAST_CLEAR,
- GEN7_FAST_CLEAR_OP_RESOLVE,
-};
-
-
class brw_blorp_params
{
public:
@@ -232,7 +225,6 @@ public:
brw_blorp_surface_info src;
brw_blorp_surface_info dst;
enum gen6_hiz_op hiz_op;
- enum gen7_fast_clear_op fast_clear_op;
bool use_wm_prog;
brw_blorp_wm_push_constants wm_push_consts;
bool color_write_disable[4];
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index fb6a0dd52aa..8215fe9a0c4 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -529,17 +529,6 @@ gen7_blorp_emit_ps_config(struct brw_context *brw,
dw5 |= prog_data->first_curbe_grf << GEN7_PS_DISPATCH_START_GRF_SHIFT_0;
}
- switch (params->fast_clear_op) {
- case GEN7_FAST_CLEAR_OP_FAST_CLEAR:
- dw4 |= GEN7_PS_RENDER_TARGET_FAST_CLEAR_ENABLE;
- break;
- case GEN7_FAST_CLEAR_OP_RESOLVE:
- dw4 |= GEN7_PS_RENDER_TARGET_RESOLVE_ENABLE;
- break;
- default:
- break;
- }
-
BEGIN_BATCH(8);
OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2));
OUT_BATCH(params->use_wm_prog ? prog_offset : 0);