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-rw-r--r--src/mesa/drivers/dri/i965/brw_compute.c5
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h1
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c
index 044deae83c9..b3d6de51adc 100644
--- a/src/mesa/drivers/dri/i965/brw_compute.c
+++ b/src/mesa/drivers/dri/i965/brw_compute.c
@@ -74,6 +74,11 @@ brw_emit_gpgpu_walker(struct brw_context *brw, const GLuint *num_groups)
OUT_BATCH(right_mask); /* Right Execution Mask */
OUT_BATCH(0xffffffff); /* Bottom Execution Mask */
ADVANCE_BATCH();
+
+ BEGIN_BATCH(2);
+ OUT_BATCH(MEDIA_STATE_FLUSH << 16 | (2 - 2));
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
}
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 54179845771..4a4ff1d26d7 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2469,6 +2469,7 @@ enum brw_wm_barycentric_interp_mode {
# define MEDIA_VFE_STATE_CURBE_ALLOC_MASK INTEL_MASK(15, 0)
#define MEDIA_INTERFACE_DESCRIPTOR_LOAD 0x7002
+#define MEDIA_STATE_FLUSH 0x7004
#define GPGPU_WALKER 0x7105
/* GEN8+ DW2 */
# define GPGPU_WALKER_INDIRECT_LENGTH_SHIFT 0