diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965')
47 files changed, 310 insertions, 305 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h index 8fcf14e8efe..9185651470a 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.h +++ b/src/mesa/drivers/dri/i965/brw_clip.h @@ -108,7 +108,7 @@ struct brw_clip_compile { GLuint first_tmp; GLuint last_tmp; - GLboolean need_direction; + bool need_direction; struct brw_vue_map vue_map; }; @@ -150,14 +150,14 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c, struct brw_indirect v0_ptr, /* from */ struct brw_indirect v1_ptr, /* to */ struct brw_reg t0, - GLboolean force_edgeflag ); + bool force_edgeflag ); void brw_clip_init_planes( struct brw_clip_compile *c ); void brw_clip_emit_vue(struct brw_clip_compile *c, struct brw_indirect vert, - GLboolean allocate, - GLboolean eot, + bool allocate, + bool eot, GLuint header); void brw_clip_kill_thread(struct brw_clip_compile *c); diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c index 9e019c804d6..75c64c0af97 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_line.c +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c @@ -251,8 +251,8 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0)); brw_IF(p, BRW_EXECUTE_1); { - brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, GL_FALSE); - brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, GL_FALSE); + brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, false); + brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, false); brw_clip_emit_vue(c, newvtx0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START); brw_clip_emit_vue(c, newvtx1, 0, 1, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END); diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index 73b6d272bae..ffbfe944afd 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -296,7 +296,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtxPrev) ); brw_set_predicate_control(p, BRW_PREDICATE_NONE); - brw_clip_interp_vertex(c, vtxOut, vtxPrev, vtx, c->reg.t, GL_FALSE); + brw_clip_interp_vertex(c, vtxOut, vtxPrev, vtx, c->reg.t, false); /* *outlist_ptr++ = vtxOut; * nr_verts++; @@ -338,7 +338,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) brw_MOV(p, get_addr_reg(vtxOut), get_addr_reg(vtx) ); brw_set_predicate_control(p, BRW_PREDICATE_NONE); - brw_clip_interp_vertex(c, vtxOut, vtx, vtxPrev, c->reg.t, GL_TRUE); + brw_clip_interp_vertex(c, vtxOut, vtx, vtxPrev, c->reg.t, true); /* *outlist_ptr++ = vtxOut; * nr_verts++; diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c index 6ddb2d57890..ae84e197cbb 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c @@ -270,7 +270,7 @@ static void apply_one_offset( struct brw_clip_compile *c, * Output clipped polygon as an unfilled primitive: */ static void emit_lines(struct brw_clip_compile *c, - GLboolean do_offset) + bool do_offset) { struct brw_compile *p = &c->func; struct brw_instruction *loop; @@ -335,7 +335,7 @@ static void emit_lines(struct brw_clip_compile *c, static void emit_points(struct brw_clip_compile *c, - GLboolean do_offset ) + bool do_offset ) { struct brw_compile *p = &c->func; struct brw_instruction *loop; @@ -381,7 +381,7 @@ static void emit_points(struct brw_clip_compile *c, static void emit_primitives( struct brw_clip_compile *c, GLuint mode, - GLboolean do_offset ) + bool do_offset ) { switch (mode) { case CLIP_FILL: diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c index 15abe166848..bf8cc3ac815 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_util.c +++ b/src/mesa/drivers/dri/i965/brw_clip_util.c @@ -135,7 +135,7 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c, struct brw_indirect v0_ptr, /* from */ struct brw_indirect v1_ptr, /* to */ struct brw_reg t0, - GLboolean force_edgeflag) + bool force_edgeflag) { struct brw_compile *p = &c->func; struct brw_reg tmp = get_tmp(c); @@ -207,8 +207,8 @@ void brw_clip_interp_vertex( struct brw_clip_compile *c, void brw_clip_emit_vue(struct brw_clip_compile *c, struct brw_indirect vert, - GLboolean allocate, - GLboolean eot, + bool allocate, + bool eot, GLuint header) { struct brw_compile *p = &c->func; diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index dc91852753f..502b023a270 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -54,10 +54,11 @@ static void brwInitDriverFunctions( struct dd_function_table *functions ) brw_init_queryobj_functions(functions); } -GLboolean brwCreateContext( int api, - const struct gl_config *mesaVis, - __DRIcontext *driContextPriv, - void *sharedContextPrivate) +bool +brwCreateContext(int api, + const struct gl_config *mesaVis, + __DRIcontext *driContextPriv, + void *sharedContextPrivate) { struct dd_function_table functions; struct brw_context *brw = rzalloc(NULL, struct brw_context); @@ -67,7 +68,7 @@ GLboolean brwCreateContext( int api, if (!brw) { printf("%s: failed to alloc context\n", __FUNCTION__); - return GL_FALSE; + return false; } brwInitVtbl( brw ); @@ -77,7 +78,7 @@ GLboolean brwCreateContext( int api, sharedContextPrivate, &functions )) { printf("%s: failed to init intel context\n", __FUNCTION__); FREE(brw); - return GL_FALSE; + return false; } /* Initialize swrast, tnl driver tables: */ @@ -114,18 +115,18 @@ GLboolean brwCreateContext( int api, /* We want the GLSL compiler to emit code that uses condition codes */ for (i = 0; i <= MESA_SHADER_FRAGMENT; i++) { - ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE; - ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = GL_TRUE; - ctx->ShaderCompilerOptions[i].EmitNoNoise = GL_TRUE; - ctx->ShaderCompilerOptions[i].EmitNoMainReturn = GL_TRUE; - ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = GL_TRUE; - ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = GL_TRUE; + ctx->ShaderCompilerOptions[i].EmitCondCodes = true; + ctx->ShaderCompilerOptions[i].EmitNVTempInitialization = true; + ctx->ShaderCompilerOptions[i].EmitNoNoise = true; + ctx->ShaderCompilerOptions[i].EmitNoMainReturn = true; + ctx->ShaderCompilerOptions[i].EmitNoIndirectInput = true; + ctx->ShaderCompilerOptions[i].EmitNoIndirectOutput = true; ctx->ShaderCompilerOptions[i].EmitNoIndirectUniform = (i == MESA_SHADER_FRAGMENT); ctx->ShaderCompilerOptions[i].EmitNoIndirectTemp = (i == MESA_SHADER_FRAGMENT); - ctx->ShaderCompilerOptions[i].LowerClipDistance = GL_TRUE; + ctx->ShaderCompilerOptions[i].LowerClipDistance = true; } ctx->Const.VertexProgram.MaxNativeInstructions = (16 * 1024); @@ -169,16 +170,16 @@ GLboolean brwCreateContext( int api, that affect provoking vertex decision. Always use last vertex convention for quad primitive which works as expected for now. */ if (intel->gen >= 6) - ctx->Const.QuadsFollowProvokingVertexConvention = GL_FALSE; + ctx->Const.QuadsFollowProvokingVertexConvention = false; if (intel->is_g4x || intel->gen >= 5) { brw->CMD_VF_STATISTICS = GM45_3DSTATE_VF_STATISTICS; brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_GM45; - brw->has_surface_tile_offset = GL_TRUE; + brw->has_surface_tile_offset = true; if (intel->gen < 6) - brw->has_compr4 = GL_TRUE; - brw->has_aa_line_parameters = GL_TRUE; - brw->has_pln = GL_TRUE; + brw->has_compr4 = true; + brw->has_aa_line_parameters = true; + brw->has_pln = true; } else { brw->CMD_VF_STATISTICS = GEN4_3DSTATE_VF_STATISTICS; brw->CMD_PIPELINE_SELECT = CMD_PIPELINE_SELECT_965; @@ -229,7 +230,7 @@ GLboolean brwCreateContext( int api, brw->urb.size = 256; brw->vs_max_threads = 16; brw->wm_max_threads = 8 * 4; - brw->has_negative_rhw_bug = GL_TRUE; + brw->has_negative_rhw_bug = true; } if (INTEL_DEBUG & DEBUG_SINGLE_THREAD) { @@ -249,8 +250,8 @@ GLboolean brwCreateContext( int api, intel->batch.need_workaround_flush = true; - ctx->VertexProgram._MaintainTnlProgram = GL_TRUE; - ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE; + ctx->VertexProgram._MaintainTnlProgram = true; + ctx->FragmentProgram._MaintainTexEnvProgram = true; brw_draw_init( brw ); @@ -264,6 +265,6 @@ GLboolean brwCreateContext( int api, ctx->Const.UniformBooleanTrue = 1; } - return GL_TRUE; + return true; } diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index bdad9fbc2fb..7e2675acf8f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -219,7 +219,7 @@ enum state_struct_type { struct brw_vertex_program { struct gl_vertex_program program; GLuint id; - GLboolean use_const_buffer; + bool use_const_buffer; }; @@ -268,7 +268,7 @@ struct brw_wm_prog_data { GLuint nr_params; /**< number of float params/constants */ GLuint nr_pull_params; - GLboolean error; + bool error; int dispatch_width; uint32_t prog_offset_16; @@ -585,13 +585,13 @@ struct brw_context struct intel_context intel; /**< base class, must be first field */ GLuint primitive; /**< Hardware primitive, such as _3DPRIM_TRILIST. */ - GLboolean emit_state_always; - GLboolean has_surface_tile_offset; - GLboolean has_compr4; - GLboolean has_negative_rhw_bug; - GLboolean has_aa_line_parameters; - GLboolean has_pln; - GLboolean new_vs_backend; + bool emit_state_always; + bool has_surface_tile_offset; + bool has_compr4; + bool has_negative_rhw_bug; + bool has_aa_line_parameters; + bool has_pln; + bool new_vs_backend; struct { struct brw_state_flags dirty; @@ -676,7 +676,7 @@ struct brw_context GLuint csize; /* constant buffer size in urb registers */ GLuint sfsize; /* setup data size in urb registers */ - GLboolean constrained; + bool constrained; GLuint max_vs_entries; /* Maximum number of VS entries */ GLuint max_gs_entries; /* Maximum number of GS entries */ @@ -776,7 +776,7 @@ struct brw_context struct { struct brw_gs_prog_data *prog_data; - GLboolean prog_active; + bool prog_active; /** Offset in the program cache to the CLIP program pre-gen6 */ uint32_t prog_offset; uint32_t state_offset; @@ -880,7 +880,7 @@ struct brw_context struct brw_query_object *obj; drm_intel_bo *bo; int index; - GLboolean active; + bool active; } query; /* Used to give every program string a unique id */ @@ -906,7 +906,7 @@ struct brw_instruction_info { char *name; int nsrc; int ndst; - GLboolean is_arith; + bool is_arith; }; extern const struct brw_instruction_info brw_opcodes[128]; @@ -918,10 +918,10 @@ void brwInitVtbl( struct brw_context *brw ); /*====================================================================== * brw_context.c */ -GLboolean brwCreateContext( int api, - const struct gl_config *mesaVis, - __DRIcontext *driContextPriv, - void *sharedContextPrivate); +bool brwCreateContext(int api, + const struct gl_config *mesaVis, + __DRIcontext *driContextPriv, + void *sharedContextPrivate); /*====================================================================== * brw_queryobj.c @@ -1067,6 +1067,6 @@ brw_program_reloc(struct brw_context *brw, uint32_t state_offset, return brw->cache.bo->offset + prog_offset; } -GLboolean brw_do_cubemap_normalize(struct exec_list *instructions); +bool brw_do_cubemap_normalize(struct exec_list *instructions); #endif diff --git a/src/mesa/drivers/dri/i965/brw_cubemap_normalize.cpp b/src/mesa/drivers/dri/i965/brw_cubemap_normalize.cpp index ff9485c2224..37f6d11c9fc 100644 --- a/src/mesa/drivers/dri/i965/brw_cubemap_normalize.cpp +++ b/src/mesa/drivers/dri/i965/brw_cubemap_normalize.cpp @@ -97,7 +97,7 @@ brw_cubemap_normalize_visitor::visit_leave(ir_texture *ir) extern "C" { -GLboolean +bool brw_do_cubemap_normalize(exec_list *instructions) { brw_cubemap_normalize_visitor v; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index f58da557da1..c02b2bc7852 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -282,7 +282,7 @@ static void brw_merge_inputs( struct brw_context *brw, /* May fail if out of video memory for texture or vbo upload, or on * fallback conditions. */ -static GLboolean brw_try_draw_prims( struct gl_context *ctx, +static bool brw_try_draw_prims( struct gl_context *ctx, const struct gl_client_array *arrays[], const struct _mesa_prim *prim, GLuint nr_prims, @@ -292,8 +292,8 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx, { struct intel_context *intel = intel_context(ctx); struct brw_context *brw = brw_context(ctx); - GLboolean retval = GL_FALSE; - GLboolean warn = GL_FALSE; + bool retval = false; + bool warn = false; GLuint i; if (ctx->NewState) @@ -362,7 +362,7 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx, */ if (dri_bufmgr_check_aperture_space(brw->state.validated_bos, brw->state.validated_bo_count)) { - static GLboolean warned; + static bool warned; intel_batchbuffer_flush(intel); /* Validate the state after we flushed the batch (which would have @@ -375,12 +375,12 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx, if (!warned && dri_bufmgr_check_aperture_space(brw->state.validated_bos, brw->state.validated_bo_count)) { - warn = GL_TRUE; - warned = GL_TRUE; + warn = true; + warned = true; } } - intel->no_batch_wrap = GL_TRUE; + intel->no_batch_wrap = true; brw_upload_state(brw); } @@ -389,9 +389,9 @@ static GLboolean brw_try_draw_prims( struct gl_context *ctx, else brw_emit_prim(brw, &prim[i], brw->primitive); - intel->no_batch_wrap = GL_FALSE; + intel->no_batch_wrap = false; - retval = GL_TRUE; + retval = true; } if (intel->always_flush_batch) @@ -419,7 +419,7 @@ void brw_draw_prims( struct gl_context *ctx, GLuint min_index, GLuint max_index ) { - GLboolean retval; + bool retval; if (!_mesa_check_conditional_render(ctx)) return; diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 20325eba4fb..358f426e17c 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -168,7 +168,7 @@ static GLuint byte_types_scale[5] = { * Format will be GL_RGBA or possibly GL_BGRA for GLubyte[4] color arrays. */ static GLuint get_surface_type( GLenum type, GLuint size, - GLenum format, GLboolean normalized ) + GLenum format, bool normalized ) { if (unlikely(INTEL_DEBUG & DEBUG_VERTS)) printf("type %s size %d normalized %d\n", @@ -335,7 +335,7 @@ static void brw_prepare_vertices(struct brw_context *brw) * isn't an issue at this point. */ if (brw->vb.nr_enabled >= BRW_VEP_MAX) { - intel->Fallback = GL_TRUE; /* boolean, not bitfield */ + intel->Fallback = true; /* boolean, not bitfield */ return; } @@ -398,7 +398,7 @@ static void brw_prepare_vertices(struct brw_context *brw) /* Position array not properly enabled: */ if (input->attrib == VERT_ATTRIB_POS && glarray->StrideB == 0) { - intel->Fallback = GL_TRUE; /* boolean, not bitfield */ + intel->Fallback = true; /* boolean, not bitfield */ return; } diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index adc09f81630..18c2c2b5edc 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -116,7 +116,7 @@ struct brw_compile { struct brw_instruction *current; GLuint flag_value; - GLboolean single_program_flow; + bool single_program_flow; bool compressed; struct brw_context *brw; @@ -775,7 +775,7 @@ static INLINE struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset } /** Do two brw_regs refer to the same register? */ -static INLINE GLboolean +static INLINE bool brw_same_reg(struct brw_reg r1, struct brw_reg r2) { return r1.file == r2.file && r1.nr == r2.nr; @@ -880,7 +880,7 @@ void brw_set_dp_write_message(struct brw_compile *p, GLuint msg_control, GLuint msg_type, GLuint msg_length, - GLboolean header_present, + bool header_present, GLuint pixel_scoreboard_clear, GLuint response_length, GLuint end_of_thread, @@ -890,12 +890,12 @@ void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, - GLboolean allocate, - GLboolean used, + bool allocate, + bool used, GLuint msg_length, GLuint response_length, - GLboolean eot, - GLboolean writes_complete, + bool eot, + bool writes_complete, GLuint offset, GLuint swizzle); @@ -903,9 +903,9 @@ void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, - GLboolean allocate, + bool allocate, GLuint response_length, - GLboolean eot); + bool eot); void brw_fb_WRITE(struct brw_compile *p, int dispatch_width, @@ -914,8 +914,8 @@ void brw_fb_WRITE(struct brw_compile *p, GLuint binding_table_index, GLuint msg_length, GLuint response_length, - GLboolean eot, - GLboolean header_present); + bool eot, + bool header_present); void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, @@ -927,7 +927,7 @@ void brw_SAMPLE(struct brw_compile *p, GLuint msg_type, GLuint response_length, GLuint msg_length, - GLboolean eot, + bool eot, GLuint header_present, GLuint simd_mode); diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 5caebfc5a90..66649a745eb 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -376,8 +376,8 @@ static void brw_set_math_message( struct brw_compile *p, struct brw_instruction *insn, GLuint function, GLuint integer_type, - GLboolean low_precision, - GLboolean saturate, + bool low_precision, + bool saturate, GLuint dataType ) { struct brw_context *brw = p->brw; @@ -439,9 +439,9 @@ static void brw_set_math_message( struct brw_compile *p, static void brw_set_ff_sync_message(struct brw_compile *p, struct brw_instruction *insn, - GLboolean allocate, + bool allocate, GLuint response_length, - GLboolean end_of_thread) + bool end_of_thread) { struct brw_context *brw = p->brw; struct intel_context *intel = &brw->intel; @@ -467,12 +467,12 @@ static void brw_set_ff_sync_message(struct brw_compile *p, static void brw_set_urb_message( struct brw_compile *p, struct brw_instruction *insn, - GLboolean allocate, - GLboolean used, + bool allocate, + bool used, GLuint msg_length, GLuint response_length, - GLboolean end_of_thread, - GLboolean complete, + bool end_of_thread, + bool complete, GLuint offset, GLuint swizzle_control ) { @@ -535,7 +535,7 @@ brw_set_dp_write_message(struct brw_compile *p, GLuint msg_control, GLuint msg_type, GLuint msg_length, - GLboolean header_present, + bool header_present, GLuint pixel_scoreboard_clear, GLuint response_length, GLuint end_of_thread, @@ -679,7 +679,7 @@ static void brw_set_sampler_message(struct brw_compile *p, GLuint msg_type, GLuint response_length, GLuint msg_length, - GLboolean eot, + bool eot, GLuint header_present, GLuint simd_mode) { @@ -1763,7 +1763,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p, msg_control, msg_type, mlen, - GL_TRUE, /* header_present */ + true, /* header_present */ 0, /* pixel scoreboard */ send_commit_msg, /* response_length */ 0, /* eot */ @@ -2062,8 +2062,8 @@ void brw_fb_WRITE(struct brw_compile *p, GLuint binding_table_index, GLuint msg_length, GLuint response_length, - GLboolean eot, - GLboolean header_present) + bool eot, + bool header_present) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; @@ -2131,12 +2131,12 @@ void brw_SAMPLE(struct brw_compile *p, GLuint msg_type, GLuint response_length, GLuint msg_length, - GLboolean eot, + bool eot, GLuint header_present, GLuint simd_mode) { struct intel_context *intel = &p->brw->intel; - GLboolean need_stall = 0; + bool need_stall = 0; if (writemask == 0) { /*printf("%s: zero writemask??\n", __FUNCTION__); */ @@ -2174,13 +2174,13 @@ void brw_SAMPLE(struct brw_compile *p, /* printf("need stall %x %x\n", newmask , writemask); */ } else { - GLboolean dispatch_16 = GL_FALSE; + bool dispatch_16 = false; struct brw_reg m1 = brw_message_reg(msg_reg_nr); guess_execution_size(p, p->current, dest); if (p->current->header.execution_size == BRW_EXECUTE_16) - dispatch_16 = GL_TRUE; + dispatch_16 = true; newmask = ~newmask & WRITEMASK_XYZW; @@ -2253,12 +2253,12 @@ void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, - GLboolean allocate, - GLboolean used, + bool allocate, + bool used, GLuint msg_length, GLuint response_length, - GLboolean eot, - GLboolean writes_complete, + bool eot, + bool writes_complete, GLuint offset, GLuint swizzle) { @@ -2383,9 +2383,9 @@ void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, GLuint msg_reg_nr, struct brw_reg src0, - GLboolean allocate, + bool allocate, GLuint response_length, - GLboolean eot) + bool eot) { struct intel_context *intel = &p->brw->intel; struct brw_instruction *insn; diff --git a/src/mesa/drivers/dri/i965/brw_fallback.c b/src/mesa/drivers/dri/i965/brw_fallback.c index d0b0c22abf6..ae08cf56f50 100644 --- a/src/mesa/drivers/dri/i965/brw_fallback.c +++ b/src/mesa/drivers/dri/i965/brw_fallback.c @@ -39,21 +39,21 @@ #define FILE_DEBUG_FLAG DEBUG_FALLBACKS -static GLboolean do_check_fallback(struct brw_context *brw) +static bool do_check_fallback(struct brw_context *brw) { struct gl_context *ctx = &brw->intel.ctx; GLuint i; if (brw->intel.no_rast) { DBG("FALLBACK: rasterization disabled\n"); - return GL_TRUE; + return true; } /* _NEW_RENDERMODE */ if (ctx->RenderMode != GL_RENDER) { DBG("FALLBACK: render mode\n"); - return GL_TRUE; + return true; } /* _NEW_TEXTURE: @@ -65,12 +65,12 @@ static GLboolean do_check_fallback(struct brw_context *brw) struct gl_texture_image *texImage = tex_obj->Image[0][tex_obj->BaseLevel]; if (texImage->Border) { DBG("FALLBACK: texture border\n"); - return GL_TRUE; + return true; } } } - return GL_FALSE; + return false; } static void check_fallback(struct brw_context *brw) @@ -96,7 +96,7 @@ const struct brw_tracked_state brw_check_fallback = { * field is treated as a boolean, not a bitmask. It's only set in a * couple of places. */ -void intelFallback( struct intel_context *intel, GLuint bit, GLboolean mode ) +void intelFallback( struct intel_context *intel, GLuint bit, bool mode ) { } diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index f73166274d1..738610621b1 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1808,7 +1808,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c, fs_visitor v(c, prog, shader); if (!v.run()) { - prog->LinkStatus = GL_FALSE; + prog->LinkStatus = false; ralloc_strcat(&prog->InfoLog, v.fail_msg); return false; diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index 4035186af00..f344330db1d 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -603,6 +603,6 @@ public: int force_sechalf_stack; }; -GLboolean brw_do_channel_expressions(struct exec_list *instructions); -GLboolean brw_do_vector_splitting(struct exec_list *instructions); +bool brw_do_channel_expressions(struct exec_list *instructions); +bool brw_do_vector_splitting(struct exec_list *instructions); bool brw_fs_precompile(struct gl_context *ctx, struct gl_shader_program *prog); diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp index 2ba96e0064c..fc98bcd649e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp @@ -83,7 +83,7 @@ channel_expressions_predicate(ir_instruction *ir) return false; } -GLboolean +bool brw_do_channel_expressions(exec_list *instructions) { ir_channel_expressions_visitor v; diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 4c158fed11c..a0db8aa27ca 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -39,7 +39,7 @@ extern "C" { void fs_visitor::generate_fb_write(fs_inst *inst) { - GLboolean eot = inst->eot; + bool eot = inst->eot; struct brw_reg implied_header; /* Header is 2 regs, g0 and g1 are the contents. g0 will be implied diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 07ea84fe4c1..e523ae748bc 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1877,7 +1877,7 @@ void fs_visitor::emit_fb_writes() { this->current_annotation = "FB write header"; - GLboolean header_present = GL_TRUE; + bool header_present = true; int base_mrf = 2; int nr = base_mrf; int reg_width = c->dispatch_width / 8; diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 91cdb1e72e5..624fa1438bb 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -156,7 +156,7 @@ static void populate_key( struct brw_context *brw, /* Provide consistent primitive order with brw_set_prim's * optimization of single quads to trifans. */ - key->pv_first = GL_TRUE; + key->pv_first = true; } /* _NEW_TRANSFORM */ diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c index 3bb526b63af..47b99c1325b 100644 --- a/src/mesa/drivers/dri/i965/brw_gs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c @@ -67,12 +67,12 @@ static void brw_gs_alloc_regs( struct brw_gs_compile *c, static void brw_gs_emit_vue(struct brw_gs_compile *c, struct brw_reg vert, - GLboolean last, + bool last, GLuint header) { struct brw_compile *p = &c->func; struct intel_context *intel = &c->func.brw->intel; - GLboolean allocate = !last; + bool allocate = !last; struct brw_reg temp; if (intel->gen < 6) diff --git a/src/mesa/drivers/dri/i965/brw_optimize.c b/src/mesa/drivers/dri/i965/brw_optimize.c index cbed2bd5cb1..1e3f4d9cd4b 100644 --- a/src/mesa/drivers/dri/i965/brw_optimize.c +++ b/src/mesa/drivers/dri/i965/brw_optimize.c @@ -87,7 +87,7 @@ const struct brw_instruction_info brw_opcodes[128] = { }; static INLINE -GLboolean brw_is_arithmetic_inst(const struct brw_instruction *inst) +bool brw_is_arithmetic_inst(const struct brw_instruction *inst) { return brw_opcodes[inst->header.opcode].is_arith; } @@ -112,20 +112,20 @@ static const GLuint inst_type_size[8] = { [BRW_REGISTER_TYPE_F] = 4 }; -static INLINE GLboolean +static INLINE bool brw_is_grf_written(const struct brw_instruction *inst, int reg_index, int size, int gen) { if (brw_opcodes[inst->header.opcode].ndst == 0) - return GL_FALSE; + return false; if (inst->bits1.da1.dest_address_mode != BRW_ADDRESS_DIRECT) if (inst->bits1.ia1.dest_reg_file == BRW_GENERAL_REGISTER_FILE) - return GL_TRUE; + return true; if (inst->bits1.da1.dest_reg_file != BRW_GENERAL_REGISTER_FILE) - return GL_FALSE; + return false; const int reg_start = reg_index * REG_SIZE; const int reg_end = reg_start + size; @@ -156,18 +156,18 @@ brw_is_grf_written(const struct brw_instruction *inst, return left < right; } -static GLboolean +static bool brw_is_mrf_written_alu(const struct brw_instruction *inst, int reg_index, int size) { if (brw_opcodes[inst->header.opcode].ndst == 0) - return GL_FALSE; + return false; if (inst->bits1.da1.dest_reg_file != BRW_MESSAGE_REGISTER_FILE) - return GL_FALSE; + return false; if (inst->bits1.da1.dest_address_mode != BRW_ADDRESS_DIRECT) - return GL_TRUE; + return true; const int reg_start = reg_index * REG_SIZE; const int reg_end = reg_start + size; @@ -180,7 +180,7 @@ brw_is_mrf_written_alu(const struct brw_instruction *inst, * consider that we are writing the register. */ if (is_compr4 && inst->header.execution_size != BRW_EXECUTE_16) - return GL_TRUE; + return true; /* Here we write mrf_{i} and mrf_{i+4}. So we read two times 8 elements */ if (is_compr4) { @@ -203,7 +203,7 @@ brw_is_mrf_written_alu(const struct brw_instruction *inst, const int right1 = MIN2(write_end1, reg_end); if (left0 < right0 || left1 < right1) - return GL_TRUE; + return true; } else { int length; @@ -219,15 +219,16 @@ brw_is_mrf_written_alu(const struct brw_instruction *inst, const int right = MIN2(write_end, reg_end); if (left < right) - return GL_TRUE; + return true; } - return GL_FALSE; + return false; } /* SEND may perform an implicit mov to a mrf register */ -static GLboolean brw_is_mrf_written_send(const struct brw_instruction *inst, - int reg_index, int size) +static bool +brw_is_mrf_written_send(const struct brw_instruction *inst, + int reg_index, int size) { const int reg_start = reg_index * REG_SIZE; @@ -240,27 +241,27 @@ static GLboolean brw_is_mrf_written_send(const struct brw_instruction *inst, if (inst->header.opcode != BRW_OPCODE_SEND || inst->bits1.da1.src0_reg_file == 0) - return GL_FALSE; + return false; return left < right; } /* Specific path for message register since we need to handle the compr4 case */ -static INLINE GLboolean +static INLINE bool brw_is_mrf_written(const struct brw_instruction *inst, int reg_index, int size) { return (brw_is_mrf_written_alu(inst, reg_index, size) || brw_is_mrf_written_send(inst, reg_index, size)); } -static INLINE GLboolean +static INLINE bool brw_is_mrf_read(const struct brw_instruction *inst, int reg_index, int size, int gen) { if (inst->header.opcode != BRW_OPCODE_SEND) - return GL_FALSE; + return false; if (inst->bits2.da1.src0_address_mode != BRW_ADDRESS_DIRECT) - return GL_TRUE; + return true; const int reg_start = reg_index*REG_SIZE; const int reg_end = reg_start + size; @@ -289,12 +290,12 @@ brw_is_mrf_read(const struct brw_instruction *inst, return left < right; } -static INLINE GLboolean +static INLINE bool brw_is_grf_read(const struct brw_instruction *inst, int reg_index, int size) { int i, j; if (brw_opcodes[inst->header.opcode].nsrc == 0) - return GL_FALSE; + return false; /* Look at first source. We must take into account register regions to * monitor carefully the read. Note that we are a bit too conservative here @@ -305,9 +306,9 @@ brw_is_grf_read(const struct brw_instruction *inst, int reg_index, int size) if (inst->bits2.da1.src0_address_mode != BRW_ADDRESS_DIRECT) if (inst->bits1.ia1.src0_reg_file == BRW_GENERAL_REGISTER_FILE) - return GL_TRUE; + return true; if (inst->bits1.da1.src0_reg_file != BRW_GENERAL_REGISTER_FILE) - return GL_FALSE; + return false; const int reg_start = reg_index*REG_SIZE; const int reg_end = reg_start + size; @@ -328,7 +329,7 @@ brw_is_grf_read(const struct brw_instruction *inst, int reg_index, int size) const int left = write_start > reg_start ? write_start : reg_start; const int right = write_end < reg_end ? write_end : reg_end; if (left < right) - return GL_TRUE; + return true; write_start += hs; } row_start += vs; @@ -340,9 +341,9 @@ brw_is_grf_read(const struct brw_instruction *inst, int reg_index, int size) if (inst->bits3.da1.src1_address_mode != BRW_ADDRESS_DIRECT) if (inst->bits1.ia1.src1_reg_file == BRW_GENERAL_REGISTER_FILE) - return GL_TRUE; + return true; if (inst->bits1.da1.src1_reg_file != BRW_GENERAL_REGISTER_FILE) - return GL_FALSE; + return false; const int reg_start = reg_index*REG_SIZE; const int reg_end = reg_start + size; @@ -363,17 +364,17 @@ brw_is_grf_read(const struct brw_instruction *inst, int reg_index, int size) const int left = write_start > reg_start ? write_start : reg_start; const int right = write_end < reg_end ? write_end : reg_end; if (left < right) - return GL_TRUE; + return true; write_start += hs; } row_start += vs; } } - return GL_FALSE; + return false; } -static INLINE GLboolean +static INLINE bool brw_is_control_done(const struct brw_instruction *mov) { return mov->header.dependency_control != 0 || @@ -383,28 +384,28 @@ brw_is_control_done(const struct brw_instruction *mov) { mov->header.debug_control != 0; } -static INLINE GLboolean +static INLINE bool brw_is_predicated(const struct brw_instruction *mov) { return mov->header.predicate_control != 0; } -static INLINE GLboolean +static INLINE bool brw_is_grf_to_mrf_mov(const struct brw_instruction *mov, int *mrf_index, int *grf_index, - GLboolean *is_compr4) + bool *is_compr4) { if (brw_is_predicated(mov) || brw_is_control_done(mov) || mov->header.debug_control != 0) - return GL_FALSE; + return false; if (mov->bits1.da1.dest_address_mode != BRW_ADDRESS_DIRECT || mov->bits1.da1.dest_reg_file != BRW_MESSAGE_REGISTER_FILE || mov->bits1.da1.dest_reg_type != BRW_REGISTER_TYPE_F || mov->bits1.da1.dest_horiz_stride != BRW_HORIZONTAL_STRIDE_1 || mov->bits1.da1.dest_subreg_nr != 0) - return GL_FALSE; + return false; if (mov->bits2.da1.src0_address_mode != BRW_ADDRESS_DIRECT || mov->bits1.da1.src0_reg_file != BRW_GENERAL_REGISTER_FILE || @@ -415,20 +416,20 @@ brw_is_grf_to_mrf_mov(const struct brw_instruction *mov, mov->bits2.da1.src0_subreg_nr != 0 || mov->bits2.da1.src0_abs != 0 || mov->bits2.da1.src0_negate != 0) - return GL_FALSE; + return false; *grf_index = mov->bits2.da1.src0_reg_nr; *mrf_index = mov->bits1.da1.dest_reg_nr & 0x0f; *is_compr4 = (mov->bits1.da1.dest_reg_nr & BRW_MRF_COMPR4) != 0; - return GL_TRUE; + return true; } -static INLINE GLboolean +static INLINE bool brw_is_grf_straight_write(const struct brw_instruction *inst, int grf_index) { /* remark: no problem to predicate a SEL instruction */ if ((!brw_is_predicated(inst) || inst->header.opcode == BRW_OPCODE_SEL) && - brw_is_control_done(inst) == GL_FALSE && + brw_is_control_done(inst) == false && inst->header.execution_size == 4 && inst->header.access_mode == BRW_ALIGN_1 && inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT && @@ -438,12 +439,12 @@ brw_is_grf_straight_write(const struct brw_instruction *inst, int grf_index) inst->bits1.da1.dest_reg_nr == grf_index && inst->bits1.da1.dest_subreg_nr == 0 && brw_is_arithmetic_inst(inst)) - return GL_TRUE; + return true; - return GL_FALSE; + return false; } -static INLINE GLboolean +static INLINE bool brw_inst_are_equal(const struct brw_instruction *src0, const struct brw_instruction *src1) { @@ -467,7 +468,7 @@ brw_inst_copy(struct brw_instruction *dst, field_dst[3] = field_src[3]; } -static void brw_remove_inst(struct brw_compile *p, const GLboolean *removeInst) +static void brw_remove_inst(struct brw_compile *p, const bool *removeInst) { int i, nr_insn = 0, to = 0, from = 0; @@ -480,7 +481,7 @@ static void brw_remove_inst(struct brw_compile *p, const GLboolean *removeInst) } for (i = 0; i < p->nr_insn; ++i) - if (removeInst[i] == GL_FALSE) + if (removeInst[i] == false) nr_insn++; p->nr_insn = nr_insn; } @@ -496,14 +497,14 @@ void brw_remove_duplicate_mrf_moves(struct brw_compile *p) const int gen = p->brw->intel.gen; int i, j; - GLboolean *removeInst = calloc(sizeof(GLboolean), p->nr_insn); + bool *removeInst = calloc(sizeof(bool), p->nr_insn); for (i = 0; i < p->nr_insn; i++) { if (removeInst[i]) continue; const struct brw_instruction *mov = p->store + i; int mrf_index, grf_index; - GLboolean is_compr4; + bool is_compr4; /* Only consider _straight_ grf-to-mrf moves */ if (!brw_is_grf_to_mrf_mov(mov, &mrf_index, &grf_index, &is_compr4)) @@ -517,7 +518,7 @@ void brw_remove_duplicate_mrf_moves(struct brw_compile *p) const struct brw_instruction *inst = p->store + j; if (brw_inst_are_equal(mov, inst)) { - removeInst[j] = GL_TRUE; + removeInst[j] = true; continue; } @@ -542,7 +543,7 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) const int gen = brw->intel.gen; const int simd16_size = 2*REG_SIZE; - GLboolean *removeInst = calloc(sizeof(GLboolean), p->nr_insn); + bool *removeInst = calloc(sizeof(bool), p->nr_insn); assert(removeInst); for (i = 0; i < p->nr_insn; i++) { @@ -552,7 +553,7 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) struct brw_instruction *grf_inst = NULL; const struct brw_instruction *mov = p->store + i; int mrf_index, grf_index; - GLboolean is_compr4; + bool is_compr4; /* Only consider _straight_ grf-to-mrf moves */ if (!brw_is_grf_to_mrf_mov(mov, &mrf_index, &grf_index, &is_compr4)) @@ -564,22 +565,22 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) /* Look where the register has been set */ prev = i; - GLboolean potential_remove = GL_FALSE; + bool potential_remove = false; while (prev--) { /* If _one_ instruction writes the grf, we try to remove the mov */ struct brw_instruction *inst = p->store + prev; if (brw_is_grf_straight_write(inst, grf_index)) { - potential_remove = GL_TRUE; + potential_remove = true; grf_inst = inst; break; } } - if (potential_remove == GL_FALSE) + if (potential_remove == false) continue; - removeInst[i] = GL_TRUE; + removeInst[i] = true; /* Monitor first the section of code between the grf computation and the * mov. Here we cannot read or write both mrf and grf register @@ -594,7 +595,7 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) brw_is_mrf_written(inst, mrf_index1, REG_SIZE) || brw_is_mrf_read(inst, mrf_index0, REG_SIZE, gen) || brw_is_mrf_read(inst, mrf_index1, REG_SIZE, gen)) { - removeInst[i] = GL_FALSE; + removeInst[i] = false; break; } } @@ -608,7 +609,7 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) continue; if (brw_is_grf_read(inst, grf_index, simd16_size)) { - removeInst[i] = GL_FALSE; + removeInst[i] = false; break; } @@ -629,19 +630,19 @@ void brw_remove_grf_to_mrf_moves(struct brw_compile *p) free(removeInst); } -static GLboolean +static bool is_single_channel_dp4(struct brw_instruction *insn) { if (insn->header.opcode != BRW_OPCODE_DP4 || insn->header.execution_size != BRW_EXECUTE_8 || insn->header.access_mode != BRW_ALIGN_16 || insn->bits1.da1.dest_reg_file != BRW_GENERAL_REGISTER_FILE) - return GL_FALSE; + return false; if (!is_power_of_two(insn->bits1.da16.dest_writemask)) - return GL_FALSE; + return false; - return GL_TRUE; + return true; } /** diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 97bd2221a3c..0bf72d9b5c7 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -100,11 +100,12 @@ static void brwDeleteProgram( struct gl_context *ctx, } -static GLboolean brwIsProgramNative( struct gl_context *ctx, - GLenum target, - struct gl_program *prog ) +static GLboolean +brwIsProgramNative(struct gl_context *ctx, + GLenum target, + struct gl_program *prog) { - return GL_TRUE; + return true; } static void @@ -116,13 +117,14 @@ shader_error(struct gl_context *ctx, struct gl_program *prog, const char *msg) if (shader) { ralloc_strcat(&shader->InfoLog, msg); - shader->LinkStatus = GL_FALSE; + shader->LinkStatus = false; } } -static GLboolean brwProgramStringNotify( struct gl_context *ctx, - GLenum target, - struct gl_program *prog ) +static GLboolean +brwProgramStringNotify(struct gl_context *ctx, + GLenum target, + struct gl_program *prog) { struct brw_context *brw = brw_context(ctx); int i; @@ -144,7 +146,7 @@ static GLboolean brwProgramStringNotify( struct gl_context *ctx, shader_program = _mesa_lookup_shader_program(ctx, prog->Id); if (shader_program && shader_program->_LinkedShaders[MESA_SHADER_FRAGMENT]) { - return GL_TRUE; + return true; } } else if (target == GL_VERTEX_PROGRAM_ARB) { @@ -180,14 +182,14 @@ static GLboolean brwProgramStringNotify( struct gl_context *ctx, "i965 driver doesn't yet support uninlined function " "calls. Move to using a single return statement at " "the end of the function to work around it.\n"); - return GL_FALSE; + return false; } if (prog->Instructions[i].Opcode == OPCODE_RET) { shader_error(ctx, prog, "i965 driver doesn't yet support \"return\" " "from main().\n"); - return GL_FALSE; + return false; } for (r = 0; r < _mesa_num_inst_src_regs(inst->Opcode); r++) { @@ -195,7 +197,7 @@ static GLboolean brwProgramStringNotify( struct gl_context *ctx, prog->Instructions[i].SrcReg[r].File == PROGRAM_INPUT) { shader_error(ctx, prog, "Variable indexing of shader inputs unsupported\n"); - return GL_FALSE; + return false; } } @@ -204,7 +206,7 @@ static GLboolean brwProgramStringNotify( struct gl_context *ctx, prog->Instructions[i].DstReg.File == PROGRAM_OUTPUT) { shader_error(ctx, prog, "Variable indexing of FS outputs unsupported\n"); - return GL_FALSE; + return false; } if (target == GL_FRAGMENT_PROGRAM_ARB) { if ((prog->Instructions[i].DstReg.RelAddr && @@ -218,12 +220,12 @@ static GLboolean brwProgramStringNotify( struct gl_context *ctx, shader_error(ctx, prog, "Variable indexing of variable arrays in the FS " "unsupported\n"); - return GL_FALSE; + return false; } } } - return GL_TRUE; + return true; } /* Per-thread scratch space is a power-of-two multiple of 1KB. */ diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index 08492d6b111..360724b5f12 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -58,7 +58,7 @@ brw_queryobj_get_results(struct gl_context *ctx, if (query->bo == NULL) return; - drm_intel_bo_map(query->bo, GL_FALSE); + drm_intel_bo_map(query->bo, false); results = query->bo->virtual; if (query->Base.Target == GL_TIME_ELAPSED_EXT) { if (intel->gen >= 6) @@ -86,8 +86,8 @@ brw_new_query_object(struct gl_context *ctx, GLuint id) query->Base.Id = id; query->Base.Result = 0; - query->Base.Active = GL_FALSE; - query->Base.Ready = GL_TRUE; + query->Base.Active = false; + query->Base.Ready = true; return &query->Base; } @@ -208,7 +208,7 @@ static void brw_wait_query(struct gl_context *ctx, struct gl_query_object *q) struct brw_query_object *query = (struct brw_query_object *)q; brw_queryobj_get_results(ctx, query); - query->Base.Ready = GL_TRUE; + query->Base.Ready = true; } static void brw_check_query(struct gl_context *ctx, struct gl_query_object *q) @@ -217,7 +217,7 @@ static void brw_check_query(struct gl_context *ctx, struct gl_query_object *q) if (query->bo == NULL || !drm_intel_bo_busy(query->bo)) { brw_queryobj_get_results(ctx, query); - query->Base.Ready = GL_TRUE; + query->Base.Ready = true; } } @@ -240,7 +240,7 @@ brw_prepare_query_begin(struct brw_context *brw) brw->query.bo = drm_intel_bo_alloc(intel->bufmgr, "query", 4096, 1); /* clear target buffer */ - drm_intel_bo_map(brw->query.bo, GL_TRUE); + drm_intel_bo_map(brw->query.bo, true); memset((char *)brw->query.bo->virtual, 0, 4096); drm_intel_bo_unmap(brw->query.bo); @@ -308,7 +308,7 @@ brw_emit_query_begin(struct brw_context *brw) query->first_index = brw->query.index; } query->last_index = brw->query.index; - brw->query.active = GL_TRUE; + brw->query.active = true; } /** Called at batchbuffer flush to get an ending PS_DEPTH_COUNT */ @@ -352,7 +352,7 @@ brw_emit_query_end(struct brw_context *brw) ADVANCE_BATCH(); } - brw->query.active = GL_FALSE; + brw->query.active = false; brw->query.index++; } diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 7a0cd924ff1..c11daf68359 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -76,18 +76,18 @@ static void compile_sf_prog( struct brw_context *brw, switch (key->primitive) { case SF_TRIANGLES: c.nr_verts = 3; - brw_emit_tri_setup( &c, GL_TRUE ); + brw_emit_tri_setup( &c, true ); break; case SF_LINES: c.nr_verts = 2; - brw_emit_line_setup( &c, GL_TRUE ); + brw_emit_line_setup( &c, true ); break; case SF_POINTS: c.nr_verts = 1; if (key->do_point_sprite) - brw_emit_point_sprite_setup( &c, GL_TRUE ); + brw_emit_point_sprite_setup( &c, true ); else - brw_emit_point_setup( &c, GL_TRUE ); + brw_emit_point_setup( &c, true ); break; case SF_UNFILLED_TRIS: c.nr_verts = 3; diff --git a/src/mesa/drivers/dri/i965/brw_sf.h b/src/mesa/drivers/dri/i965/brw_sf.h index 8de5f5a3489..4ef024043ec 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.h +++ b/src/mesa/drivers/dri/i965/brw_sf.h @@ -97,10 +97,10 @@ struct brw_sf_compile { }; -void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate ); -void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate ); -void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate ); -void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate ); +void brw_emit_tri_setup( struct brw_sf_compile *c, bool allocate ); +void brw_emit_line_setup( struct brw_sf_compile *c, bool allocate ); +void brw_emit_point_setup( struct brw_sf_compile *c, bool allocate ); +void brw_emit_point_sprite_setup( struct brw_sf_compile *c, bool allocate ); void brw_emit_anyprim_setup( struct brw_sf_compile *c ); int brw_sf_compute_urb_entry_read_offset(struct intel_context *intel); diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c index ebcbf944db4..fe3341c782b 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_emit.c +++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c @@ -70,8 +70,8 @@ static struct brw_reg get_vert_result(struct brw_sf_compile *c, return brw_vec4_grf(vert.nr + off, sub * 4); } -static GLboolean have_attr(struct brw_sf_compile *c, - GLuint attr) +static bool +have_attr(struct brw_sf_compile *c, GLuint attr) { return (c->key.attrs & BITFIELD64_BIT(attr)) ? 1 : 0; } @@ -323,13 +323,14 @@ static void invert_det( struct brw_sf_compile *c) } -static GLboolean calculate_masks( struct brw_sf_compile *c, - GLuint reg, - GLushort *pc, - GLushort *pc_persp, - GLushort *pc_linear) +static bool +calculate_masks(struct brw_sf_compile *c, + GLuint reg, + GLushort *pc, + GLushort *pc_persp, + GLushort *pc_linear) { - GLboolean is_last_attr = (reg == c->nr_setup_regs - 1); + bool is_last_attr = (reg == c->nr_setup_regs - 1); GLbitfield64 persp_mask; GLbitfield64 linear_mask; @@ -398,7 +399,7 @@ calculate_point_sprite_mask(struct brw_sf_compile *c, GLuint reg) -void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate) +void brw_emit_tri_setup(struct brw_sf_compile *c, bool allocate) { struct brw_compile *p = &c->func; GLuint i; @@ -426,7 +427,7 @@ void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate) struct brw_reg a1 = offset(c->vert[1], i); struct brw_reg a2 = offset(c->vert[2], i); GLushort pc, pc_persp, pc_linear; - GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); + bool last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); if (pc_persp) { @@ -486,7 +487,7 @@ void brw_emit_tri_setup( struct brw_sf_compile *c, GLboolean allocate) -void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate) +void brw_emit_line_setup(struct brw_sf_compile *c, bool allocate) { struct brw_compile *p = &c->func; GLuint i; @@ -510,7 +511,7 @@ void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate) struct brw_reg a0 = offset(c->vert[0], i); struct brw_reg a1 = offset(c->vert[1], i); GLushort pc, pc_persp, pc_linear; - GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); + bool last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); if (pc_persp) { @@ -558,7 +559,7 @@ void brw_emit_line_setup( struct brw_sf_compile *c, GLboolean allocate) } } -void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) +void brw_emit_point_sprite_setup(struct brw_sf_compile *c, bool allocate) { struct brw_compile *p = &c->func; GLuint i; @@ -573,7 +574,7 @@ void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) { struct brw_reg a0 = offset(c->vert[0], i); GLushort pc, pc_persp, pc_linear, pc_coord_replace; - GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); + bool last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); pc_coord_replace = calculate_point_sprite_mask(c, i); pc_persp &= ~pc_coord_replace; @@ -651,7 +652,7 @@ void brw_emit_point_sprite_setup( struct brw_sf_compile *c, GLboolean allocate) /* Points setup - several simplifications as all attributes are * constant across the face of the point (point sprites excluded!) */ -void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate) +void brw_emit_point_setup(struct brw_sf_compile *c, bool allocate) { struct brw_compile *p = &c->func; GLuint i; @@ -670,7 +671,7 @@ void brw_emit_point_setup( struct brw_sf_compile *c, GLboolean allocate) { struct brw_reg a0 = offset(c->vert[0], i); GLushort pc, pc_persp, pc_linear; - GLboolean last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); + bool last = calculate_masks(c, i, &pc, &pc_persp, &pc_linear); if (pc_persp) { @@ -741,7 +742,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c ) { saveflag = p->flag_value; brw_push_insn_state(p); - brw_emit_tri_setup( c, GL_FALSE ); + brw_emit_tri_setup( c, false ); brw_pop_insn_state(p); p->flag_value = saveflag; /* note - thread killed in subroutine, so must @@ -762,7 +763,7 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c ) { saveflag = p->flag_value; brw_push_insn_state(p); - brw_emit_line_setup( c, GL_FALSE ); + brw_emit_line_setup( c, false ); brw_pop_insn_state(p); p->flag_value = saveflag; /* note - thread killed in subroutine */ @@ -775,13 +776,13 @@ void brw_emit_anyprim_setup( struct brw_sf_compile *c ) { saveflag = p->flag_value; brw_push_insn_state(p); - brw_emit_point_sprite_setup( c, GL_FALSE ); + brw_emit_point_sprite_setup( c, false ); brw_pop_insn_state(p); p->flag_value = saveflag; } brw_land_fwd_jump(p, jmp); - brw_emit_point_setup( c, GL_FALSE ); + brw_emit_point_setup( c, false ); } diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index f193d94066e..aa198b62698 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -44,7 +44,7 @@ static void upload_sf_vp(struct brw_context *brw) const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport *sfv; GLfloat y_scale, y_bias; - const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); + const bool render_to_fbo = (ctx->DrawBuffer->Name != 0); const GLfloat *v = ctx->Viewport._WindowMap.m; sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE, diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 974905d6259..0858c4032bb 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -148,12 +148,12 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog) } if (!_mesa_ir_link_shader(ctx, prog)) - return GL_FALSE; + return false; if (!brw_shader_precompile(ctx, prog)) - return GL_FALSE; + return false; - return GL_TRUE; + return true; } diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 76ffa0daefe..24e83ff0fe1 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -470,7 +470,7 @@ void brw_validate_state( struct brw_context *brw ) if ((state->mesa | state->cache | state->brw) == 0) return; - brw->intel.Fallback = GL_FALSE; /* boolean, not bitfield */ + brw->intel.Fallback = false; /* boolean, not bitfield */ /* do prepare stage for all atoms */ for (i = 0; i < num_atoms; i++) { diff --git a/src/mesa/drivers/dri/i965/brw_urb.c b/src/mesa/drivers/dri/i965/brw_urb.c index b0419d8a420..cef44b56cbf 100644 --- a/src/mesa/drivers/dri/i965/brw_urb.c +++ b/src/mesa/drivers/dri/i965/brw_urb.c @@ -97,7 +97,7 @@ static const struct { }; -static GLboolean check_urb_layout( struct brw_context *brw ) +static bool check_urb_layout(struct brw_context *brw) { brw->urb.vs_start = 0; brw->urb.gs_start = brw->urb.nr_vs_entries * brw->urb.vsize; diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index eae841c6d03..848e298e80e 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -509,7 +509,7 @@ public: src_reg orig_src, int base_offset); - GLboolean try_emit_sat(ir_expression *ir); + bool try_emit_sat(ir_expression *ir); bool process_move_condition(ir_rvalue *ir); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index ccbad2527f8..09e7cfbc0da 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -903,7 +903,7 @@ brw_vs_emit(struct gl_shader_program *prog, struct brw_vs_compile *c) vec4_visitor v(c, prog, shader); if (!v.run()) { - prog->LinkStatus = GL_FALSE; + prog->LinkStatus = false; ralloc_strcat(&prog->InfoLog, v.fail_msg); return false; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index e0e4781fecd..e0030206863 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -965,7 +965,7 @@ vec4_visitor::visit(ir_function *ir) } } -GLboolean +bool vec4_visitor::try_emit_sat(ir_expression *ir) { ir_rvalue *sat_src = ir->as_rvalue_to_saturate(); diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 310a022d652..7b002e8cc34 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -223,7 +223,7 @@ do_vs_prog(struct brw_context *brw, if (0) { _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG, - GL_TRUE); + true); } /* Emit GEN4 code. diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h index 85a1d8247b9..8701116dd84 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.h +++ b/src/mesa/drivers/dri/i965/brw_vs.h @@ -103,7 +103,7 @@ struct brw_vs_compile { struct brw_reg stack; struct { - GLboolean used_in_src; + bool used_in_src; struct brw_reg reg; } output_regs[128]; @@ -115,7 +115,7 @@ struct brw_vs_compile { struct brw_reg reg; } current_const[3]; - GLboolean needs_stack; + bool needs_stack; }; bool brw_vs_emit(struct gl_shader_program *prog, struct brw_vs_compile *c); diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c index 4d1c4e03850..013a9cc4005 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_constval.c +++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c @@ -38,7 +38,7 @@ * are promoted to [0,0,0,1] for the purposes of this analysis. */ struct tracker { - GLboolean twoside; + bool twoside; GLubyte active[PROGRAM_OUTPUT+1][MAX_PROGRAM_TEMPS]; GLbitfield size_masks[4]; /**< one bit per fragment program input attrib */ }; diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 7326b3af2a2..e39b3dd0a95 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -40,7 +40,7 @@ /* Return the SrcReg index of the channels that can be immediate float operands * instead of usage of PROGRAM_CONSTANT values through push/pull. */ -static GLboolean +static bool brw_vs_arg_can_be_immediate(enum prog_opcode opcode, int arg) { int opcode_array[] = { @@ -68,11 +68,11 @@ brw_vs_arg_can_be_immediate(enum prog_opcode opcode, int arg) */ if (opcode == OPCODE_MAD || opcode == OPCODE_LRP) { if (arg == 1 || arg == 2) - return GL_TRUE; + return true; } if (opcode > ARRAY_SIZE(opcode_array)) - return GL_FALSE; + return false; return arg == opcode_array[opcode] - 1; } @@ -189,9 +189,9 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) */ if (c->vp->program.Base.Parameters->NumParameters + c->vp->program.Base.NumTemporaries + 20 > BRW_MAX_GRF) - c->vp->use_const_buffer = GL_TRUE; + c->vp->use_const_buffer = true; else - c->vp->use_const_buffer = GL_FALSE; + c->vp->use_const_buffer = false; /*printf("use_const_buffer = %d\n", c->vp->use_const_buffer);*/ @@ -265,7 +265,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) } if (inst->SrcReg[arg].RelAddr) { - c->vp->use_const_buffer = GL_TRUE; + c->vp->use_const_buffer = true; continue; } @@ -281,7 +281,7 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c ) * case) we need them all in place anyway. */ if (constant == max_constant) - c->vp->use_const_buffer = GL_TRUE; + c->vp->use_const_buffer = true; /* Set up the references to the pull parameters if present. This backend * uses a 1:1 mapping from Mesa IR's index to location in the pull constant @@ -665,11 +665,11 @@ static void emit_math1_gen4(struct brw_vs_compile *c, */ struct brw_compile *p = &c->func; struct brw_reg tmp = dst; - GLboolean need_tmp = GL_FALSE; + bool need_tmp = false; if (dst.file != BRW_GENERAL_REGISTER_FILE || dst.dw1.bits.writemask != 0xf) - need_tmp = GL_TRUE; + need_tmp = true; if (need_tmp) tmp = get_tmp(c); @@ -750,11 +750,11 @@ static void emit_math2_gen4( struct brw_vs_compile *c, { struct brw_compile *p = &c->func; struct brw_reg tmp = dst; - GLboolean need_tmp = GL_FALSE; + bool need_tmp = false; if (dst.file != BRW_GENERAL_REGISTER_FILE || dst.dw1.bits.writemask != 0xf) - need_tmp = GL_TRUE; + need_tmp = true; if (need_tmp) tmp = get_tmp(c); @@ -889,7 +889,7 @@ static void emit_log_noalias( struct brw_vs_compile *c, struct brw_reg tmp = dst; struct brw_reg tmp_ud = retype(tmp, BRW_REGISTER_TYPE_UD); struct brw_reg arg0_ud = retype(arg0, BRW_REGISTER_TYPE_UD); - GLboolean need_tmp = (dst.dw1.bits.writemask != 0xf || + bool need_tmp = (dst.dw1.bits.writemask != 0xf || dst.file != BRW_GENERAL_REGISTER_FILE); if (need_tmp) { @@ -1010,7 +1010,7 @@ static void emit_lit_noalias( struct brw_vs_compile *c, { struct brw_compile *p = &c->func; struct brw_reg tmp = dst; - GLboolean need_tmp = (dst.file != BRW_GENERAL_REGISTER_FILE); + bool need_tmp = (dst.file != BRW_GENERAL_REGISTER_FILE); if (need_tmp) tmp = get_tmp(c); @@ -1255,7 +1255,7 @@ get_src_reg( struct brw_vs_compile *c, { const GLuint file = inst->SrcReg[argIndex].File; const GLint index = inst->SrcReg[argIndex].Index; - const GLboolean relAddr = inst->SrcReg[argIndex].RelAddr; + const bool relAddr = inst->SrcReg[argIndex].RelAddr; if (brw_vs_arg_can_be_immediate(inst->Opcode, argIndex)) { const struct prog_src_register *src = &inst->SrcReg[argIndex]; @@ -1438,7 +1438,7 @@ static void emit_swz( struct brw_vs_compile *c, GLuint ones_mask = 0; GLuint src_mask = 0; GLubyte src_swz[4]; - GLboolean need_tmp = (src.Negate && + bool need_tmp = (src.Negate && dst.file != BRW_GENERAL_REGISTER_FILE); struct brw_reg tmp = dst; GLuint i; @@ -1741,20 +1741,20 @@ static void emit_vertex_write( struct brw_vs_compile *c) } } -static GLboolean +static bool accumulator_contains(struct brw_vs_compile *c, struct brw_reg val) { struct brw_compile *p = &c->func; struct brw_instruction *prev_insn = &p->store[p->nr_insn - 1]; if (p->nr_insn == 0) - return GL_FALSE; + return false; if (val.address_mode != BRW_ADDRESS_DIRECT) - return GL_FALSE; + return false; if (val.negate || val.abs) - return GL_FALSE; + return false; switch (prev_insn->header.opcode) { case BRW_OPCODE_MOV: @@ -1768,11 +1768,11 @@ accumulator_contains(struct brw_vs_compile *c, struct brw_reg val) prev_insn->bits1.da1.dest_reg_nr == val.nr && prev_insn->bits1.da16.dest_subreg_nr == val.subnr / 16 && prev_insn->bits1.da16.dest_writemask == 0xf) - return GL_TRUE; + return true; else - return GL_FALSE; + return false; default: - return GL_FALSE; + return false; } } @@ -1853,7 +1853,7 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) if (unlikely(INTEL_DEBUG & DEBUG_VS)) { printf("vs-mesa:\n"); _mesa_fprint_program_opt(stdout, &c->vp->program.Base, PROG_PRINT_DEBUG, - GL_TRUE); + true); printf("\n"); } @@ -1875,13 +1875,13 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) GLuint index = src->Index; GLuint file = src->File; if (file == PROGRAM_OUTPUT && index != VERT_RESULT_HPOS) - c->output_regs[index].used_in_src = GL_TRUE; + c->output_regs[index].used_in_src = true; } switch (inst->Opcode) { case OPCODE_CAL: case OPCODE_RET: - c->needs_stack = GL_TRUE; + c->needs_stack = true; break; default: break; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index f6af7815bb7..1880a1cdf88 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -172,8 +172,8 @@ brw_wm_payload_setup(struct brw_context *brw, if (c->fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { - c->source_depth_to_render_target = GL_TRUE; - c->computes_depth = GL_TRUE; + c->source_depth_to_render_target = true; + c->computes_depth = true; } } else { brw_wm_lookup_iz(intel, c); diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 29082c19088..efd18e96bec 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -268,15 +268,15 @@ struct brw_wm_compile { GLuint cur_inst; /**< index of current instruction */ - GLboolean out_of_regs; /**< ran out of GRF registers? */ + bool out_of_regs; /**< ran out of GRF registers? */ /** Mapping from Mesa registers to hardware registers */ struct { - GLboolean inited; + bool inited; struct brw_reg reg; } wm_regs[NUM_FILES][256][4]; - GLboolean used_grf[BRW_WM_MAX_GRF]; + bool used_grf[BRW_WM_MAX_GRF]; GLuint first_free_grf; struct brw_reg stack; struct brw_reg emit_mask_reg; @@ -308,7 +308,7 @@ void brw_wm_pass0( struct brw_wm_compile *c ); void brw_wm_pass1( struct brw_wm_compile *c ); void brw_wm_pass2( struct brw_wm_compile *c ); void brw_wm_emit( struct brw_wm_compile *c ); -GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg); +bool brw_wm_arg_can_be_immediate(enum prog_opcode, int arg); void brw_wm_print_value( struct brw_wm_compile *c, struct brw_wm_value *value ); @@ -357,7 +357,7 @@ void emit_cmp(struct brw_compile *p, void emit_ddxy(struct brw_compile *p, const struct brw_reg *dst, GLuint mask, - GLboolean is_ddx, + bool is_ddx, const struct brw_reg *arg0); void emit_delta_xy(struct brw_compile *p, const struct brw_reg *dst, @@ -461,7 +461,7 @@ void emit_tex(struct brw_wm_compile *c, struct brw_reg depth_payload, GLuint tex_idx, GLuint sampler, - GLboolean shadow); + bool shadow); void emit_txb(struct brw_wm_compile *c, struct brw_reg *dst, GLuint dst_flags, diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c index c20b07997fe..0736421f002 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_emit.c +++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c @@ -34,27 +34,27 @@ #include "brw_context.h" #include "brw_wm.h" -static GLboolean can_do_pln(struct intel_context *intel, - const struct brw_reg *deltas) +static bool +can_do_pln(struct intel_context *intel, const struct brw_reg *deltas) { struct brw_context *brw = brw_context(&intel->ctx); if (!brw->has_pln) - return GL_FALSE; + return false; if (deltas[1].nr != deltas[0].nr + 1) - return GL_FALSE; + return false; if (intel->gen < 6 && ((deltas[0].nr & 1) != 0)) - return GL_FALSE; + return false; - return GL_TRUE; + return true; } /* Return the SrcReg index of the channels that can be immediate float operands * instead of usage of PROGRAM_CONSTANT values through push/pull. */ -GLboolean +bool brw_wm_arg_can_be_immediate(enum prog_opcode opcode, int arg) { int opcode_array[] = { @@ -82,11 +82,11 @@ brw_wm_arg_can_be_immediate(enum prog_opcode opcode, int arg) */ if (opcode == OPCODE_MAD || opcode == OPCODE_LRP) { if (arg == 1 || arg == 2) - return GL_TRUE; + return true; } if (opcode > ARRAY_SIZE(opcode_array)) - return GL_FALSE; + return false; return arg == opcode_array[opcode] - 1; } @@ -461,7 +461,7 @@ void emit_frontfacing(struct brw_compile *p, void emit_ddxy(struct brw_compile *p, const struct brw_reg *dst, GLuint mask, - GLboolean is_ddx, + bool is_ddx, const struct brw_reg *arg0) { int i; @@ -1044,7 +1044,7 @@ void emit_tex(struct brw_wm_compile *c, struct brw_reg depth_payload, GLuint tex_idx, GLuint sampler, - GLboolean shadow) + bool shadow) { struct brw_compile *p = &c->func; struct intel_context *intel = &p->brw->intel; @@ -1356,7 +1356,7 @@ static void fire_fb_write( struct brw_wm_compile *c, nr, 0, eot, - GL_TRUE); + true); } @@ -1737,11 +1737,11 @@ void brw_wm_emit( struct brw_wm_compile *c ) break; case OPCODE_DDX: - emit_ddxy(p, dst, dst_flags, GL_TRUE, args[0]); + emit_ddxy(p, dst, dst_flags, true, args[0]); break; case OPCODE_DDY: - emit_ddxy(p, dst, dst_flags, GL_FALSE, args[0]); + emit_ddxy(p, dst, dst_flags, false, args[0]); break; case OPCODE_DP2: diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index bd46bd8de43..6c9a38eed0a 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -104,7 +104,7 @@ static struct prog_src_register src_undef( void ) return src_reg(PROGRAM_UNDEFINED, 0); } -static GLboolean src_is_undef(struct prog_src_register src) +static bool src_is_undef(struct prog_src_register src) { return src.File == PROGRAM_UNDEFINED; } @@ -766,7 +766,7 @@ static void precalc_tex( struct brw_wm_compile *c, */ if (c->key.yuvtex_mask & (1 << unit)) { /* convert ycbcr to RGBA */ - GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<unit); + bool swap_uv = c->key.yuvtex_swap_mask & (1<<unit); /* CONST C0 = { -.5, -.0625, -.5, 1.164 } @@ -882,11 +882,11 @@ static void precalc_tex( struct brw_wm_compile *c, /** * Check if the given TXP instruction really needs the divide-by-W step. */ -static GLboolean projtex( struct brw_wm_compile *c, - const struct prog_instruction *inst ) +static bool +projtex(struct brw_wm_compile *c, const struct prog_instruction *inst) { const struct prog_src_register src = inst->SrcReg[0]; - GLboolean retVal; + bool retVal; assert(inst->Opcode == OPCODE_TXP); @@ -898,13 +898,13 @@ static GLboolean projtex( struct brw_wm_compile *c, * user-provided fragment programs anyway: */ if (inst->TexSrcTarget == TEXTURE_CUBE_INDEX) - retVal = GL_FALSE; /* ut2004 gun rendering !?! */ + retVal = false; /* ut2004 gun rendering !?! */ else if (src.File == PROGRAM_INPUT && GET_SWZ(src.Swizzle, W) == W && (c->key.proj_attrib_mask & (1 << src.Index)) == 0) - retVal = GL_FALSE; + retVal = false; else - retVal = GL_TRUE; + retVal = true; return retVal; } @@ -1051,7 +1051,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) if (unlikely(INTEL_DEBUG & DEBUG_WM)) { printf("pre-fp:\n"); _mesa_fprint_program_opt(stdout, &fp->program.Base, PROG_PRINT_DEBUG, - GL_TRUE); + true); printf("\n"); } @@ -1124,7 +1124,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c ) case OPCODE_RSQ: out = emit_scalar_insn(c, inst); - out->SrcReg[0].Abs = GL_TRUE; + out->SrcReg[0].Abs = true; break; case OPCODE_TEX: diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.c b/src/mesa/drivers/dri/i965/brw_wm_iz.c index 471ea1c18d6..878f5d079de 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_iz.c +++ b/src/mesa/drivers/dri/i965/brw_wm_iz.c @@ -124,7 +124,7 @@ void brw_wm_lookup_iz(struct intel_context *intel, struct brw_wm_compile *c) { GLuint reg = 2; - GLboolean kill_stats_promoted_workaround = GL_FALSE; + bool kill_stats_promoted_workaround = false; int lookup = c->key.iz_lookup; bool uses_depth = (c->fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0; @@ -139,7 +139,7 @@ void brw_wm_lookup_iz(struct intel_context *intel, if (c->key.stats_wm && (lookup & IZ_PS_KILL_ALPHATEST_BIT) && wm_iz_table[lookup].mode == P) { - kill_stats_promoted_workaround = GL_TRUE; + kill_stats_promoted_workaround = true; } if (lookup & IZ_PS_COMPUTES_DEPTH_BIT) diff --git a/src/mesa/drivers/dri/i965/gen6_scissor_state.c b/src/mesa/drivers/dri/i965/gen6_scissor_state.c index dc73b10f4cd..feeca28d459 100644 --- a/src/mesa/drivers/dri/i965/gen6_scissor_state.c +++ b/src/mesa/drivers/dri/i965/gen6_scissor_state.c @@ -35,7 +35,7 @@ gen6_upload_scissor_state(struct brw_context *brw) { struct intel_context *intel = &brw->intel; struct gl_context *ctx = &intel->ctx; - const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); + const bool render_to_fbo = (ctx->DrawBuffer->Name != 0); struct gen6_scissor_rect *scissor; uint32_t scissor_state_offset; diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c index d65bfda6c00..67b649e7b79 100644 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c @@ -121,7 +121,7 @@ upload_sf_state(struct brw_context *brw) uint32_t dw1, dw2, dw3, dw4, dw16, dw17; int i; /* _NEW_BUFFER */ - GLboolean render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; + bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; int attr = 0, input_index = 0; int urb_entry_read_offset = 1; float point_size; diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c index a4bfa54837d..ab378d3fc0e 100644 --- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c @@ -70,7 +70,7 @@ prepare_sf_vp(struct brw_context *brw) const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport *sfv; GLfloat y_scale, y_bias; - const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); + const bool render_to_fbo = (ctx->DrawBuffer->Name != 0); const GLfloat *v = ctx->Viewport._WindowMap.m; sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE, diff --git a/src/mesa/drivers/dri/i965/gen7_clip_state.c b/src/mesa/drivers/dri/i965/gen7_clip_state.c index 2f512f59346..da8d73a698e 100644 --- a/src/mesa/drivers/dri/i965/gen7_clip_state.c +++ b/src/mesa/drivers/dri/i965/gen7_clip_state.c @@ -37,7 +37,7 @@ upload_clip_state(struct brw_context *brw) uint32_t dw1 = GEN6_CLIP_STATISTICS_ENABLE; /* _NEW_BUFFERS */ - GLboolean render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; + bool render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0; dw1 |= GEN7_CLIP_EARLY_CULL; diff --git a/src/mesa/drivers/dri/i965/gen7_viewport_state.c b/src/mesa/drivers/dri/i965/gen7_viewport_state.c index e9aacd56317..b1aa38bc357 100644 --- a/src/mesa/drivers/dri/i965/gen7_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen7_viewport_state.c @@ -32,7 +32,7 @@ prepare_sf_clip_viewport(struct brw_context *brw) struct gl_context *ctx = &brw->intel.ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; GLfloat y_scale, y_bias; - const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0); + const bool render_to_fbo = (ctx->DrawBuffer->Name != 0); const GLfloat *v = ctx->Viewport._WindowMap.m; struct gen7_sf_clip_viewport *vp; |