diff options
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_tex_image.c | 3 |
4 files changed, 4 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 4b0b15cf4f6..9922c59f6e1 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -121,7 +121,7 @@ brw_blorp_init(struct brw_context *brw) static void blorp_surf_for_miptree(struct brw_context *brw, struct blorp_surf *surf, - struct intel_mipmap_tree *mt, + const struct intel_mipmap_tree *mt, enum isl_aux_usage aux_usage, bool is_render_target, unsigned *level, @@ -156,10 +156,6 @@ blorp_surf_for_miptree(struct brw_context *brw, .tile_y_sa = mt->level[*level].level_y, }; - if (mt->format == MESA_FORMAT_S_UINT8 && is_render_target && - devinfo->gen <= 7) - mt->r8stencil_needs_update = true; - if (surf->aux_usage == ISL_AUX_USAGE_HIZ && !intel_miptree_level_has_hiz(mt, *level)) surf->aux_usage = ISL_AUX_USAGE_NONE; diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index b097dfe346c..30e09861491 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -261,14 +261,6 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) } } - if (mask & BUFFER_BIT_STENCIL) { - struct intel_renderbuffer *stencil_irb = - intel_get_renderbuffer(fb, BUFFER_STENCIL); - struct intel_mipmap_tree *mt = stencil_irb->mt; - if (mt && mt->stencil_mt) - mt->stencil_mt->r8stencil_needs_update = true; - } - if (mask & BUFFER_BITS_COLOR) { brw_blorp_clear_color(brw, fb, mask, partial_clear, ctx->Color.sRGBEnabled); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index cc51176a3e8..90ebad412ea 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2462,11 +2462,13 @@ intel_miptree_finish_write(struct brw_context *brw, uint32_t start_layer, uint32_t num_layers, enum isl_aux_usage aux_usage) { + const struct gen_device_info *devinfo = &brw->screen->devinfo; num_layers = miptree_layer_range_length(mt, level, start_layer, num_layers); switch (mt->aux_usage) { case ISL_AUX_USAGE_NONE: - /* Nothing to do */ + if (mt->format == MESA_FORMAT_S_UINT8 && devinfo->gen <= 7) + mt->r8stencil_needs_update = true; break; case ISL_AUX_USAGE_MCS: diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index fae179214dd..3d948381f4a 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -325,9 +325,6 @@ intel_upload_tex(struct gl_context * ctx, bool tex_busy = mt && brw_bo_busy(mt->bo); - if (mt && mt->format == MESA_FORMAT_S_UINT8) - mt->r8stencil_needs_update = true; - if (_mesa_is_bufferobj(packing->BufferObj) || tex_busy || mt->aux_usage == ISL_AUX_USAGE_CCS_E) { ok = intel_texsubimage_blorp(brw, dims, texImage, |