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-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp7
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h1
2 files changed, 0 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index dfe6afcf6d0..21977a23130 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1046,13 +1046,6 @@ backend_shader::calculate_cfg()
cfg = new(mem_ctx) cfg_t(&this->instructions);
}
-void
-backend_shader::invalidate_cfg()
-{
- ralloc_free(this->cfg);
- this->cfg = NULL;
-}
-
/**
* Sets up the starting offsets for the groups of binding table entries
* commong to all pipeline stages.
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 82374a46c18..15bed78cb7c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -217,7 +217,6 @@ public:
virtual void dump_instructions(const char *name);
void calculate_cfg();
- void invalidate_cfg();
virtual void invalidate_live_intervals() = 0;
};