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Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_blorp.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 05204a97bef..58e1f8a09f3 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -332,7 +332,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
enum isl_format dst_isl_format =
brw_blorp_to_isl_format(brw, dst_format, true);
enum isl_aux_usage dst_aux_usage =
- intel_miptree_render_aux_usage(brw, dst_mt, encode_srgb, false);
+ intel_miptree_render_aux_usage(brw, dst_mt, dst_isl_format, false);
const bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1,
dst_aux_usage, dst_clear_supported);
@@ -1277,9 +1277,9 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
irb->mt, irb->mt_level, irb->mt_layer, num_layers);
enum isl_aux_usage aux_usage =
- intel_miptree_render_aux_usage(brw, irb->mt, encode_srgb, false);
+ intel_miptree_render_aux_usage(brw, irb->mt, isl_format, false);
intel_miptree_prepare_render(brw, irb->mt, level, irb->mt_layer,
- num_layers, encode_srgb, false);
+ num_layers, isl_format, false);
struct isl_surf isl_tmp[2];
struct blorp_surf surf;
@@ -1298,7 +1298,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
blorp_batch_finish(&batch);
intel_miptree_finish_render(brw, irb->mt, level, irb->mt_layer,
- num_layers, encode_srgb, false);
+ num_layers, isl_format, false);
}
return;